MD1820
High-Speed 4-Channel MOSFET Driver with Non-Inverting Outputs
Features
General Description
•
•
•
•
•
•
•
•
•
The MD1820 is a high-speed, 4-channel MOSFET
driver designed to drive high-voltage P-channel and
N-channel MOSFETs for medical ultrasound
applications and other applications requiring a high
output current for a capacitive load. The high-speed
input stage of the MD1820 can operate from a
1.8V to 5V logic interface with an optimum operating
input signal range of 1.8V to 3.3V. An adaptive
threshold circuit is used to set the level translator
switch threshold to the average of the input logic 0 and
logic 1 levels. The input logic levels may be ground
referenced, even though the driver is putting out bipolar
signals. The level translator uses a proprietary circuit,
which provides DC coupling together with high-speed
operation.
Non-inverting, 4-channel MOSFET Driver
6 ns Rise and Fall Time
2A Peak Output Source and Sink Currents
1.8V to 5V Input CMOS Compatible
5V to 10V Total Supply Voltage
Smart Logic Threshold
Low-jitter Design
Four Matched Channels
Drives Two P-channel and Two N-channel
MOSFETs
• Outputs can Swing below Ground
• Low-inductance Quad Flat No-lead Package
• High-performance, Thermally Enhanced Package
The output stage of the MD1820 has separate power
connections, enabling the output signal L and H levels
to be chosen independently from the supply voltages
used for the majority of the circuit. As an example, the
input logic levels may be 0V and 1.8V, the control logic
may be powered by +5V and –5V and the output L and
H levels may be varied anywhere over the range of
–5V to +5V. The output stage is capable of peak
currents of up to ±2A, depending on the supply
voltages used and load capacitance present. The PE
pin serves a dual purpose. First, its logic H level is used
to compute the threshold voltage level for the channel
input level translators. Second, when PE is low, the
outputs are High Z. This assists in properly precharging
the AC coupling capacitors that may be used in series
in the gate drive circuit of an external PMOS and
NMOS transistor pair.
Applications
•
•
•
•
•
•
Medical Ultrasound Imaging
Piezoelectric Transducer Drivers
Non-destructive Testing (NDT)
PIN Diode Driver
CCD Clock Driver/buffer
High-speed Level Translator
Package Type
16-lead QFN
(Top view)
1
See Table 2-1 for pin information.
2017 Microchip Technology Inc.
DS20005767A-page 1
MD1820
Functional Block Diagrams
MD1820
VDD
VH
PE
INA
OUTA
INB
OUTB
INC
OUTC
IND
OUTD
GND
VSS
VL
Simplified Block Diagram
MD1820
PE
VDD
VH
Level
Shifter
VSS
OUTA
VDD
INA
VSS
Level
Shifter
VDD
VL
VH
VSS
OUTB
VDD
INB
VSS
Level
Shifter
VDD
VL
VH
VSS
OUTC
VDD
INC
VSS
Level
Shifter
VL
VH
VDD
VSS
OUTD
VDD
IND
Level
Shifter
SUB
GND
VSS
VL
Detailed Block Diagram
DS20005767A-page 2
2017 Microchip Technology Inc.
MD1820
Typical Application Circuits
+100V
+10V
+10V
0.1μF
0.47μF
0.47μF
VDD
10nF
VH
To Piezoelectric
Transducer
PE
OUTA
INA
10nF
-100V
0.1μF
OUTB
INB
TC6320
3.3V CMOS
Logic Inputs
+100V
OUTC
INC
0.1μF
OUTD
10nF
IND
To Piezoelectric
Transducer
GND VSS VL
10nF
-100V
MD1820
0.1μF
TC6320
Typical 2-Channel +/–100V Application Diagram
+100V
+5.0V
+5.0V
0.1μF
0.47μF
0.47μF
VDD
10nF
VH
To Piezoelectric
Transducer
PE
OUTA
INA
10nF
-100V
OUTB
0.1μF
INB
TC6320
3.3V CMOS
Logic Inputs
OUTC
INC
OUTD
IND
GND
VSS VL
-5.0V
-5.0V
0.47μF
MD1820
0.47μF
TC2320
Typical 1-Channel +/–100V RTZ Application Diagram
2017 Microchip Technology Inc.
DS20005767A-page 3
MD1820
1.0μF
0.47μF
0.47μF
VDD
VH
10nF
PE
OUTA
INA
3.3V CMOS
Logic Inputs
+100V
+10V
+10V
10nF
-100V
OUTB
INB
1.0μF
TC6320
INC
HVOUT
+10V
OUTC
1.0μF
OUTD
IND
GND
VSS
MD1820
VL
10nF
10nF
-10V
1.0μF
TC6320
DS20005767A-page 4
2017 Microchip Technology Inc.
MD1820
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Logic Supply Voltage, VDD–VSS ............................................................................................................ –0.5V to +12.5V
Output High Supply Voltage, VH ................................................................................................... VL–0.5V to VDD +0.5V
Output Low Supply Voltage, VL .................................................................................................... VSS–0.5V to VH +0.5V
Low-side Supply Voltage, VSS .................................................................................................................... –6V to +0.5V
Logic Input Levels .................................................................................................................... VSS–0.5V to GND +5.5V
Maximum Junction Temperature, TJ ................................................................................................................... +125°C
Operating Ambient Temperature, TA ..................................................................................................... –20°C to +85°C
Storage Temperature, TS ..................................................................................................................... –65°C to +150°C
Package Power Dissipation:
16-lead QFN ............................................................................................................................................... 2.2W
ESD Rating (Note 1) ............................................................................................................................... ESD Sensitive
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
Note 1: Device is ESD sensitive. Handling precautions are recommended.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: VH = VDD = 10V, VL = VSS = GND = 0V, VPE = 3.3V, TA = 25°C
Parameter
Logic Supply Voltage
Sym.
Min.
Typ.
Max.
Unit
VDD–VSS
4.75
—
11.5
V
Low-side Supply Voltage
VSS
–5.5
—
0
V
Output High Supply Voltage
VH
VSS+2
—
VDD
V
Output Low Supply Voltage
VL
VSS
—
VDD–4
V
VDD Quiescent Current
IDDQ
—
60
VH Quiescent Current
IHQ
—
2
—
μA
μA
Conditions
4V ≤ VDD ≤ 11.5V
No input transitions, PE = 0
VDD Quiescent Current
IDDQ
—
0.8
—
mA
VH Quiescent Current
IHQ
—
2
—
μA
VDD Average Current
IDD
—
3.5
—
mA
VH Average Current
IH
—
10
—
mA
Input Logic Voltage High
VIH
VPE–0.3
—
VPE
V
Input Logic Voltage Low
VIL
0
—
0.3
V
Input Logic Current High
IIH
—
—
1
μA
Input Logic Current Low
IIL
—
—
1
μA
PE Input logic Voltage High
VIH
1.7
3.3
5.25
V
PE Input Logic Voltage Low
VIL
0
—
0.3
V
RIN_PE
100
—
—
kΩ
Logic Input Capacitance
CIN
—
5
10
pF
Output Sink Resistance
RSINK
—
1.5
—
Ω
ISINK = 50 mA
Output Source Resistance
RSOURCE
—
2
—
Ω
ISOURCE = 50 mA
Peak Output Sink Current
ISINK
—
2
—
A
ISOURCE
—
2
—
A
PE Input Resistance
Peak Output Source Current
2017 Microchip Technology Inc.
No input transitions, PE = 1
One channel on at 5 MHz, no load
For logic inputs INA, INB, INC and
IND
For logic input PE
DS20005767A-page 5
MD1820
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: VH = VDD = 10V, VL = VSS = GND = 0V, VPE = 3.3V, TA = 25°C
Parameter
Sym.
Min.
Typ.
Max.
Unit
tirf
—
—
10
ns
Propagation Delay when Output is
from Low to High
tPLH
—
6.5
—
ns
Propagation Delay when Output is
from High to Low
tPHL
—
6.5
—
ns
Output Rise Time
tr
—
7
—
ns
Output Fall Time
tf
—
7
—
ns
l tr–tf l
—
1
—
ns
l tPLH–tPHL l
—
1
—
ns
Input or PE Rise and Fall Time
Rise and Fall Time Matching
Propagation Low to High and High
to Low Matching
Propagation Delay Matching
Conditions
Logic input edge speed
requirement
CLOAD = 1000 pF (See Timing
Diagram.), input signal rise/fall
time 2 ns
For each channel
∆tdm
—
±2
—
ns
Device-to-device delay match
PE On Time
tPE–ON
—
—
5
µs
PE Off-time
tPE–OFF
—
—
4
µs
VPE = 1.7V~5.25V,
VDD = 7.5V~11.5V,
–20°C~85°C
Sym.
Min.
Typ.
Max.
Unit
TJ
—
—
+125
°C
Operating Ambient Temperature
TA
–20
—
+85
°C
Storage Temperature
TS
–65
—
+150
°C
JA
—
55
—
TEMPERATURE SPECIFICATIONS
Parameter
Conditions
TEMPERATURE RANGE
Maximum Junction Temperature
PACKAGE THERMAL RESISTANCE
16-lead QFN
Note 1: 1 oz four-layer 3” x 4” PCB
DS20005767A-page 6
°C/W Note 1
2017 Microchip Technology Inc.
MD1820
Timing Diagram
3.3V
50%
50%
IN
0V
tPLH
tPHL
10V
90%
90%
OUT
0V
TABLE 1-1:
10%
10%
tr
tf
TRUTH FUNCTION TABLE
Logic Inputs
Output
PE
IN
H
L
VL
H
H
VH
L
X
High Z
2017 Microchip Technology Inc.
DS20005767A-page 7
MD1820
2.0
PIN DESCRIPTION
The details on the pins of MD1820 are listed on
Table 2-1. See Package Type for the location of pins.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
1
INB
Logic input
2
VDD
High-side supply voltage
3
VSS
Low-side supply voltage. VSS is also connected to the IC substrate. It is required to
connect to the most negative potential of voltage supplies.
4
INC
5
IND
6
GND
7
VL
8
OUTC
9
OUTD
10, 11
VH
12
OUTA
13
OUTB
14
VL
Supply voltage for N-channel output stage
15
PE
Power enable logic input. When PE is high, the input logic threshold is set. When PE is
low, all outputs are at default state and the IC is in Standby mode. (See Table 1-1 and
Figure 3-1.)
16
INA
Logic input
Substrate
DS20005767A-page 8
Description
Logic input
Logic input ground reference
Supply voltage for N-channel output stage
Output drivers
Supply voltage for P-channel output stage
Output drivers
The IC substrate is internally connected to the thermal pad. The thermal pad and VSS
must be connected externally.
2017 Microchip Technology Inc.
MD1820
3.0
APPLICATION INFORMATION
For proper operation of the MD1820, low-inductance
bypass capacitors should be used on the various
supply pins. The GND pin should be connected to the
logic ground. The INA, INB, INC, IND and PE pins
should be connected to a logic source with a swing of
GND to PE, where PE is 1.8V to 5V. Good trace
practices should be followed corresponding to the
desired operating speed. The internal circuitry of the
MD1820 is capable of operating up to 100 MHz, with
the primary speed limitation being the loading effects of
the load capacitance. Because of this speed and the
high transient currents due to capacitive loads, the
bypass capacitors should be as close to the chip pins
as possible. Unless the load specifically requires
bipolar drive, the VSS and VL pins should have a
low-inductance bypass capacitor to GND and supply
power connections. If these voltages are not zero, they
need bypass capacitors similar to the positive power
supplies. The power connection VDD should have a
ceramic bypass capacitor to the ground plane with
short leads and decoupling components to prevent
resonance in the powerleads.
1.5
VTH
1.0
0.5
0
8
Time (ns)
8
tPHL
5
tPLH
4
3
1.0
2.0
FIGURE 3-1:
9
6
0
4.0
5.0
VTH/VPE Curve.
tr
tf
7
6
5
4
-50
0
50
3
125
-50
0
50
125
Temperature (OC)
Temperature (OC)
MD1820 Delay vs VDD
MD1820 tr & tf vs VDD
14
14
12
12
tPHL
10
8
Time (ns)
Delay Time (ns)
3.0
VPE
9
7
VPE/2
2.0
MD1820 tr & tf vs Temperature
MD1820 Delay vs Temperature
Delay Time (ns)
VTH vs VPE
tPLH
6
4
10
tf
8
tr
6
4
2
5
8
10
12
2
5
VDD Voltage (V)
FIGURE 3-2:
8
10
12
VDD Voltage (V)
Timing Characteristics vs.Temperature and VDD.
The voltages of VH and VL decide the output signal
levels. These two pins can draw fast transient currents
of up to 2A, so they should be provided with an
appropriate bypass capacitor located next to the chip
pins. A ceramic capacitor of up to 1 µF may be
appropriate, with a series ferrite bead to prevent
resonance in the power supply lead going to the
capacitor. Pay particular attention to minimizing trace
lengths, current loop area and using sufficient trace
2017 Microchip Technology Inc.
width
to
reduce
inductance.
Surface-mount
components are highly recommended. Since the
output impedance of this driver is very low, in some
cases, it may be desirable to add a small series resistor
in series with the output signal to obtain better
waveform transitions at the load terminals. This will
reduce the output voltage slew rate at the terminals of
a capacitive load.
DS20005767A-page 9
MD1820
Make sure that parasitic couplings are minimized from
the output to the input signal terminals. The parasitic
feedback may cause oscillations or spurious waveform
shapes on the edges of signal transitions. Since the
input operates with signals down to 1.8V, even small
coupled voltages may cause problems. The use of a
solid ground plane and good power and signal layout
practices will prevent this problem. Make sure that the
circulating ground return current from a capacitive load
will not react with common inductance to cause noise
voltages in the input logic circuitry.
DS20005767A-page 10
2017 Microchip Technology Inc.
MD1820
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
16-lead QFN
XXXXX
XYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Example
182
0725
321
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2017 Microchip Technology Inc.
DS20005767A-page 11
MD1820
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
DS20005767A-page 12
2017 Microchip Technology Inc.
MD1820
APPENDIX A:
REVISION HISTORY
Revision A (May 2017)
• Converted Supertex Doc# DSFP-MD1820 to
Microchip DS20005767A
• Changed the package marking format
• Changed the quantity of the K6 package from
3000/Reel to 3300/Reel
• Made minor text changes throughout the
document
2017 Microchip Technology Inc.
DS20005767A-page 13
MD1820
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
XX
PART NO.
Device
-
Package
Options
X
-
Environmental
X
Media Type
Device:
MD1820
=
High-Speed 4-Channel MOSFET Driver
with Non-Inverting Outputs
Package:
K6
=
16-lead QFN
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Type:
(blank)
=
3300/Reel for a K6 Package
DS20005767A-page 14
Example:
a)
MD1820K6-G:
High-Speed 4-Channel MOSFET
Driver with Non-Inverting Outputs,
16-lead QFN, 3300/Reel
2017 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
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© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-1748-4
== ISO/TS 16949 ==
2017 Microchip Technology Inc.
DS20005767A-page 15
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DS20005767A-page 16
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Fax: 86-21-3326-8021
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
India - Pune
Tel: 91-20-3019-1500
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
France - Saint Cloud
Tel: 33-1-30-60-70-00
Germany - Garching
Tel: 49-8931-9700
Germany - Haan
Tel: 49-2129-3766400
Germany - Heilbronn
Tel: 49-7131-67-3636
Germany - Karlsruhe
Tel: 49-721-625370
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Rosenheim
Tel: 49-8031-354-560
Israel - Ra’anana
Tel: 972-9-744-7705
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Padova
Tel: 39-049-7625286
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Norway - Trondheim
Tel: 47-7289-7561
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
Taiwan - Kaohsiung
Tel: 886-7-213-7830
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Poland - Warsaw
Tel: 48-22-3325737
Romania - Bucharest
Tel: 40-21-407-87-50
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Gothenberg
Tel: 46-31-704-60-40
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
2017 Microchip Technology Inc.
11/07/16
