MIC2127A
75V, Synchronous Buck Controller Featuring Adaptive
On-Time Control
Features
General Description
• Hyper Speed Control® Architecture Enables:
- High input to output voltage conversion ratio
capability
- Any Capacitor™ stable
- Ultra-fast load transient response
• Wide 4.5V-75V Input Voltage Range
• Adjustable Output Voltage from 0.6V to 30V
• 270 kHz-800 kHz Programmable Switching
Frequency
• Built-In 5V Regulator for Single-Supply Operation
• Auxiliary Bootstrap LDO for Improving System
Efficiency
• Internal Bootstrap Diode
• Selectable Light Load Operating Mode
• Enable Input and Power Good Output
• Programmable Current Limit
• Hiccup Mode Short-Circuit Protection
• Soft Start, Internal Compensation and Thermal
Shutdown
• Supports Safe Start-Up into a Prebiased Output
• AEC-Q100 Qualified (VAO suffix)
The MIC2127A device is a constant-frequency
synchronous buck controller featuring a unique
adaptive on-time control architecture. The MIC2127A
device operates over an input voltage range from
4.5V-75V. The output voltage is adjustable down to
0.6V with an accuracy of ±1%. The device operates
with programmable switching frequency from 270 kHz
to 800 kHz.
The MIC2127A device features a MODE pin that allows
the user to select either Continuous Conduction mode
or HyperLight Load® (HLL) mode under light loads. An
auxiliary bootstrap LDO improves the system efficiency
by supplying the MIC2127A internal circuit bias power
and gate drivers from the output of the converter. A
logic level enable (EN) signal can be used to enable or
disable the controller. MIC2127A can start-up
monotonically into a prebiased output. The MIC2127A
device features an open drain power good signal (PG)
that signals when the output is in regulation and can be
used for simple power supply sequencing.
MIC2127A offers a full suite of protection features to
ensure protection of the IC during Fault conditions.
These include undervoltage lockout to ensure proper
operation under power-sag conditions, “hiccup” mode
short-circuit protection, internal soft start of 5 ms to
reduce inrush current during start-up and thermal shutdown.
The MIC2127A device is available in a 16-pin
3 mm × 3 mm VQFN package, with an operating
junction temperature range from –40°C to +125°C.
Applications
•
•
•
•
•
Networking/Telecom Equipment
Base Station, Servers
Distributed Power Systems
Industrial Power Supplies
Automotive Power Supplies
Typical Application Circuit
VIN
PVDD
4.7 μF
VIN
*
4.5V to 75V
0.1 μF
Q1
2.2 μFX3
DH
10
BST
VDD
L1
10 μH
0.1 μF
4.7 μF
VOUT
5V@5A
SW
MIC2127A
ILIM
+ C1
330 μF
1.3 k
47 μF
0.1 μF
PG
Q2
DL
VIN
7.5 k
EN
4.7 nF
36 k
VDD
MODE
FB
1 k
100 k
EXTVDD
FREQ
VIN
60 k
AGND
2016-2020 Microchip Technology Inc.
PGND
VOUT
1 μF
Q1,Q3: SiR878ADP
L1: SRP1265A-100M, Bourns
C1: 10SVP330M
*Output voltage follows input voltage when the input is below the target output voltage
DS20005676F-page 1
MIC2127A
Package Type
FB
AGND
VDD
VIN
MIC2127A
3 x 3 VQFN*
(Top View)
16 15 14 13
PG 1
12 MODE
ILIM 2
11 FREQ
EP
SW 3
10 EN
BST 4
PGND
7
8
PVDD
6
DL
5
DH
9 EXTVDD
* Includes Exposed Thermal Pad (EP); see Table 3-1.
Functional Block Diagram
VDD
EXTVDD
PVDD
EN
VIN
15
9
8
10
16
LINEAR
REGULATOR
UVLO
LINEAR
REGULATOR
THERMAL
SHUTDOWN
MODE
12
FREQ
11
Control
Logic
TON
ESTIMATION
Zero Crossing
Detection (ZCD) and
Negative Current Limit
4
BST
5
DH
3
SW
7
DL
2
ILIM
6
PGND
COMPENSATION
PVDD
FB
13
gm
Soft
Start
PG
CURRENT
LIMIT
DETECTION
VREF
0.6V
100 μA
1
0.9
VREF
FB
14
AGND
2016-2020 Microchip Technology Inc.
DS20005676F-page 2
MIC2127A
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
VIN, FREQ, ILIM, SW to PGND .................................................................................................................... –0.3V to +76V
VSW to PGND (Transient < 50 ns) ............................................................................................................................... –5V
VDD, PVDD, FB, PG, MODE to AGND ........................................................................................................... –0.3V to +6V
EXTVDD to AGND ...................................................................................................................................... –0.3V to +16V
BST to SW .................................................................................................................................................. –0.3V to +6V
BST to AGND ............................................................................................................................................. –0.3V to +82V
EN to AGND ...................................................................................................................................... –0.3V to (VIN +0.3V)
DH, DL to AGND .............................................................................................................................. –0.3V to (VDD +0.3V)
PGND to AGND ........................................................................................................................................... –0.3V to +0.3V
Junction Temperature........................................................................................................................................... +150°C
Storage Temperature (TS)..................................................................................................................... –65°C to +150°C
Lead Temperature (soldering, 10s) ........................................................................................................................ 260°C
ESD Rating(1) ......................................................................................................................................................... 1000V
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods
may affect device reliability.
Note 1: Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5 k in series with
100 pF.
Operating Ratings(1)
Supply Voltage (VIN) ..................................................................................................................................... 4.5V to 75V
SW, FREQ, ILIM, EN........................................................................................................................................... 0V to VIN
EXTVDD ....................................................................................................................................................... 0V to 13.2V
Junction Temperature (TJ)..................................................................................................................... –40°C to +125°C
Package Thermal Resistance (3 mm × 3 mm VQFN 16LD)
Junction-to-Ambient (JA) ................................................................................................................................. 50.8°C/W
Junction-to-Case (JC) ...................................................................................................................................... 25.3°C/W
Note 1: The device is not ensured to function outside the operating range.
2016-2020 Microchip Technology Inc.
DS20005676F-page 3
MIC2127A
ELECTRICAL CHARACTERISTICS
(Note
1)
Electrical Specifications: unless otherwise specified, VIN = 12V, VOUT = 1.2V; VBST – VSW = 5V, TA = +25°C.
Boldface values indicate –40°C TJ +125°C (Note 4)
Parameter
Symbol
Min.
Typ.
Max.
Units
Test Conditions
VVIN
4.5
—
5.5
V
PVDD and VDD shorted to VIN
(VPVDD = VVIN = VVDD)
Power Supply Input
Input Voltage Range (Note 2)
Quiescent Supply Current
Shutdown Supply Current
IQ
IVIN(SHDN)
5.5
—
75
—
1.4
1.8
mA
VFB = 1.5V, MODE = VDD,
no switching
—
—
300
600
µA
VFB = 1.5V, MODE = AGND,
no switching
—
0.1
5
µA
EN = Low
—
30
60
µA
EN = Low, VIN = VDD = 5.5V
5.1
5.4
V
VVIN = 7V to 75V,
IPVDD = 10 mA
PVDD,VDD and EXTVDD
PVDD Output Voltage
VPVDD
4.8
VDD UVLO Threshold
VVDD_UVLO_Rise
3.7
4.2
4.5
V
VDD UVLO Hysteresis
VVDD_UVLO_Hys
—
600
—
mV
EXTVDD Bypass Threshold
VEXTVDD_Rise
4.4
4.6
4.85
V
EXTVDD Bypass Hysteresis
VEXTVDD_Hys
—
200
—
mV
—
—
—
250
—
mV
VEXTVDD = 5V, IPVDD = 25 mA
VREF
0.597
0.6
0.603
V
0.594
0.6
0.606
V
–40°C TJ 125°C
IFB
—
50
500
nA
VFB = 0.6V
VEN_H
1.6
—
—
V
—
—
EXTVDD Dropout Voltage
VDD rising
VDD falling (Note 5)
EXTVDD rising
Reference
Feedback Reference Voltage
FB Bias Current (Note 3)
TJ = 25°C
Enable Control
EN Logic Level High
EN Logic Level Low
EN Hysteresis
EN Bias Current
VEN_L
—
—
0.6
V
VEN_Hys
—
100
—
mV
Note 5
IEN
—
6
30
µA
VEN = 12V
kHz
VFREQ = VVIN, VVIN = 12V
ON Timer
Switching Frequency
fSW
—
800
—
230
270
300
VFREQ = 33% of VVIN,
VVIN = 12V
Maximum Duty Cycle
DMAX
—
85
—
%
VFREQ = VVIN = 12V
Minimum Duty Cycle
DMIN
—
0
—
%
VFB > 0.6V (Note 5)
Minimum ON Time
tON(MIN)
—
80
—
ns
—
Minimum OFF Time
tOFF(MIN)
150
230
350
ns
—
Note 1:
2:
3:
4:
5:
Specification for packaged product only.
The application is fully functional at low VDD (supply of the control section) if the external MOSFETs have
low voltage VTH.
Design specification.
Temperature limits apply for automotive AEC-Q100 qualified part.
Not production tested.
2016-2020 Microchip Technology Inc.
DS20005676F-page 4
MIC2127A
ELECTRICAL CHARACTERISTICS
Electrical Specifications: unless otherwise specified, VIN = 12V, VOUT = 1.2V; VBST – VSW = 5V, TA = +25°C.
Boldface values indicate –40°C TJ +125°C (Note 4)
Parameter
Symbol
Min.
Typ.
Max.
Units
Test Conditions
VMODE_H
1.6
—
—
V
—
—
MODE
MODE Logic High Level
MODE Logic Low Level
VMODE_L
—
—
0.6
V
VMODE_Hys
—
70
—
mV
Note 5
VOFFSET
–15
0
15
mV
VFB = 0.59V
ICL
85
100
115
µA
VFB = 0.59V
TCICL
—
0.3
—
µA/°C
VNCLTH
—
48
—
mV
—
VZCDTH
–15
–8
10
mV
—
DH On-Resistance, High
State
RDH(PULL-UP)
—
2
3
—
DH On-Resistance, Low
State
RDH(PULL_DOWN)
—
2
4
—
DL On-Resistance, High
State
RDL(PULL-UP)
—
2
4
—
—
0.36
0.8
—
MODE Hysteresis
Current Limit
Current Limit Comparator
Offset
ILIM Source Current
ILIM Source Current Tempco
Negative Current Limit
Comparator Threshold
Note 5
Zero Crossing Detection Comparator
Zero Crossing Detection
Comparator Threshold
FET Drivers
DL On-Resistance, Low State RDL(PULL_DOWN)
SW, VIN, and BST Leakage
BST Leakage
ILK(BST)
—
—
30
µA
—
VIN Leakage
ILK(VIN)
—
—
50
µA
—
SW Leakage
ILK(SW)
—
—
50
µA
—
PG Threshold Voltage
VPG_Rise
85
—
95
%VOUT VFB rising
PG Hysteresis
VPG_Hys
—
6
—
%VOUT VFB falling
PG Delay Time
PG_R_DLY
—
150
—
µs
VFB rising
PG Low Voltage
VOL_PG
—
140
200
mV
VFB < 90% × VNOM,
IPG = 1 mA
Overtemperature Shutdown
TSHDN
—
150
—
°C
Junction temperature rising
Overtemperature Shutdown
Hysteresis
TSHDN_Hys
—
15
—
°C
—
Power Good (PG)
Thermal Protection
Note 1:
2:
3:
4:
5:
Specification for packaged product only.
The application is fully functional at low VDD (supply of the control section) if the external MOSFETs have
low voltage VTH.
Design specification.
Temperature limits apply for automotive AEC-Q100 qualified part.
Not production tested.
2016-2020 Microchip Technology Inc.
DS20005676F-page 5
MIC2127A
TEMPERATURE SPECIFICATIONS
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Operating Junction Temperature
TJ
–40
—
+125
°C
Note 1
Maximum Junction Temperature
TJ(MAX)
—
—
+150
°C
—
Temperature Ranges
TS
–65
—
+150
°C
—
TLEAD
—
—
+260
°C
Soldering, 10s
Junction-to-Ambient
JA
—
50.8
—
°C/W
—
Junction-to-Case
JC
—
25.3
—
°C/W
—
Storage Temperature
Lead Temperature
Package Thermal Resistances
Thermal Resistance,
16 Lead,
3 x 3 mm VQFN
Note 1:
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction-to-air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.
2016-2020 Microchip Technology Inc.
DS20005676F-page 6
MIC2127A
2.0
TYPICAL CHARACTERISTIC CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
1.8
VOUT = 5V
IOUT = 0A
FSW = 300 kHz
VEN = VVIN
20
Input Supply Current (mA)
Input Supply Current (mA)
25
15
10
5
6
1.2
1
VEXTVDD = VOUT
0.8
0.6
VVIN = 48V
IOUT = 0A
FSW = 300 kHz
VEN = VIN
HLL Mode
0.4
0.2
-50
12 18 24 30 36 42 48 54 60 66 72 78
Input Voltage (V)
FIGURE 2-1:
Input Voltage.
Input Supply Current vs.
30
600
25
500
EXTVDD = GND
20
15
VEXTVDD = VOUT
10
VVIN = 48V
IOUT = 0A
FSW = 300 kHz
5
-25
0
25
50
Temperature (°C)
75
100
FIGURE 2-4:
Input Supply Current vs.
Temperature (HLL Mode).
Input Current (μA)
Input Supply Current (mA)
EXTVDD = GND
1.4
0
0
VVIN = 48V, with resistor divider
between VIN and AGND at FREQ pin
(100 k and 60 k)
EN = GND
400
300
200
100
0
0
-50
-25
FIGURE 2-2:
Temperature.
0
25
50
Temperature (°C)
75
6
100
Input Supply Current vs.
0.4
0.3
VOUT =5V
IOUT =0A
FSW =300 kHz
VEN =VVIN
HLL Mode
0.2
0.1
0
6
12 18 24 30 36 42 48 54 60 66 72 78
Input Voltage (V)
FIGURE 2-3:
Input Supply Current vs.
Input Voltage (HLL Mode).
2016-2020 Microchip Technology Inc.
Input Current (μA)
0.6
0.5
18
FIGURE 2-5:
Input Voltage.
0.7
Input Supply Current (mA)
1.6
350
340
330
320
310
300
290
280
270
260
250
30
42
Input Voltage (V)
54
66
78
Input Shutdown Current vs.
VVIN = 48V, with resistor divider between VIN
and AGND at FREQ pin
(100 k and 60 k)
EN = GND
-50
FIGURE 2-6:
Temperature.
-25
0
25
Temperature (°C)
50
75
100
Input Shutdown Current vs.
DS20005676F-page 7
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
4.5
5.4
IPVDD = 10 mA
VEN = VVIN
EXTVDD = GND
VDD Voltage (V)
5.2
5.1
5
3.9
3.7
VDD falling
3.5
3.3
4.8
3.1
12 18 24 30 36 42 48 54 60 66 72 78
Input Voltage (V)
FIGURE 2-7:
VVDD rising
4.1
4.9
6
IVDD = 0 mA
EXTVDD = GND
-50
-25
0
25
50
Temperature (°C)
FIGURE 2-10:
Temperature.
PVDD Line Regulation.
75
100
125
VDD UVLO Threshold vs.
4.8
5.4
PVDD Voltage (V)
4.3
VVIN = 48V
IPVDD = 10 mA
VEN = VVIN
5.3
EXTVDD Voltage (V)
PVDD Voltage (V)
5.3
5.2
VEXTVDD = 12V
5.1
5
EXTVDD = GND
4.9
4.7
VEXTVDD rising
4.6
4.5
4.4
VEXTVDD falling
4.3
VEXTVDD = 5V
4.8
4.2
-50
-25
FIGURE 2-8:
Temperature.
0
25
Temperature (°C)
50
75
100
PVDD Voltage vs.
-50
0
25
50
Temperature (°C)
FIGURE 2-11:
Temperature.
5.2
75
100
125
EXTVDD Threshold vs.
1.6
5
VEXTVDD = 12V
EXTVDD = GND
4.8
Enable Voltage (V)
PVDD Voltage (V)
-25
4.6
VEXTVDD = 5V
4.4
4.2
VVIN = 48V
VEN = VVIN
4
0
10
20
30
40
50
IPVDD (mA)
FIGURE 2-9:
PVDD Load Regulation.
2016-2020 Microchip Technology Inc.
60
1.4
1.2
VEN rising
1.0
VEN falling
0.8
0.6
-50
-25
FIGURE 2-12:
Temperature.
0
25
50
Temperature (°C)
75
100
125
Enable Threshold vs.
DS20005676F-page 8
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
140
5.6
EN Current (µA)
ILIM Source Current (µA)
VVIN = 12V
VEN = 5V
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
-50
-25
0
25
50
Temperature (°C)
320
310
300
290
280
270
260
250
240
230
220
100
110
100
90
80
70
125
-50
-25
FIGURE 2-16:
Temperature.
Enable Bias Current vs.
0
25
50
Temperature (°C)
75
100
125
ILIM Source Current vs.
1.4
IOUT = 5A
IOUT = 0A
VOUT = 5V
FSW_SETPONIT = 300 kHz
VEXTVDD = VOUT
VEN = VVIN
6
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-50
12 18 24 30 36 42 48 54 60 66 72 78
Input Voltage (V)
FIGURE 2-14:
Input Voltage.
Switching Frequency vs.
-25
0
25
50
Temperature (°C)
75
100
125
FIGURE 2-17:
Current Limit Comparator
Offset vs Temperature.
606.0
310
TA = 25°C
305
Feedback Voltage (mV)
Switching Frequency (kHz)
120
Current Limit Comparator
Offset Voltgae (mV)
Switching frequency (kHz)
FIGURE 2-13:
Temperature.
75
130
TA = -40°C
300
TA = 85°C
295
290
285
280
VVIN = 48V
VOUT = 5V
FSW_SETPONIT = 300 kHz
VEXTVDD = VOUT
VEN = VVIN
275
270
265
604.0
602.0
600.0
598.0
596.0
594.0
0
0.5
FIGURE 2-15:
Load Current.
1
1.5
2
2.5
3
Load Current (A)
3.5
4
4.5
Switching Frequency vs.
2016-2020 Microchip Technology Inc.
5
-50
-25
FIGURE 2-18:
Temperature.
0
25
50
Temperature (°C)
75
100
125
Feedback Voltage vs.
DS20005676F-page 9
MIC2127A
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
Efficiency
Efficiency
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
VOUT=1.0V
V
OUT = 1.0V
VOUT=1.2V
V
OUT = 1.2V
VOUT=1.5V
V
OUT = 1.5V
VOUT=1.8V
V
OUT = 1.8V
VOUT=2.5V
V
OUT = 2.5V
V
VOUT=3.3V
OUT = 3.3V
VOUT=5V
V
OUT = 5V
0
0.5
1
1.5 2 2.5 3
Output Current (A)
3.5
4
4.5
0.5
1
1.5
2
2.5
3
3.5
4
4.5
Efficiency
Efficiency
VOUT=1.5V
VOUT = 1.5V
VOUT=1.8V
VOUT = 1.8V
VOUT=2.5V
VOUT = 2.5V
VOUT=3.3V
VOUT = 3.3V
VOUT=5V
VOUT = 5V
0.5
1
5
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
0
Efficiency
Efficiency
VOUT=1.0V
V
OUT = 1.0V
V
VOUT=1.2V
OUT = 1.2V
VOUT=1.5V
V
OUT = 1.5V
V
VOUT=1.8V
OUT = 1.8V
VOUT=2.5V
VOUT = 2.5V
VOUT=3.3V
V
OUT = 3.3V
V
VOUT=5V
OUT = 5V
0.5
1
1.5 2 2.5 3
Output Current (A)
3.5
4
4.5
FIGURE 2-21:
Efficiency vs. Output
Current (Input Voltage = 36V, CCM Mode).
2016-2020 Microchip Technology Inc.
4
4.5
5
VOUT=1.0V
VOUT = 1.0V
VOUT=1.5V
VOUT = 1.5V
V
VOUT=1.2V
OUT = 1.2V
VOUT=2.5V
VOUT = 2.5V
VOUT = 3.3V
VOUT=3.3V
VOUT = 1.8V
VOUT=1.8V
0.5
1
1.5 2 2.5 3
Output Current (A)
3.5
4
4.5
5
FIGURE 2-23:
Efficiency vs. Output
Current (Input Voltage = 60V, CCM Mode).
FIGURE 2-20:
Efficiency vs. Output
Current (Input Voltage = 24V, CCM Mode).
0
3.5
VOUT=5V
VOUT = 5V
Output Current (A)
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
1.5 2 2.5 3
Output Current (A)
FIGURE 2-22:
Efficiency vs. Output
Current (Input Voltage = 48V, CCM Mode).
VOUT=1.0V
VOUT = 1.0V
VOUT=1.2V
VOUT = 1.2V
VOUT = 1.5V
VOUT=1.5V
VOUT=1.8V
VOUT = 1.8V
VOUT=2.5V
VOUT = 2.5V
VOUT = 3.3V
VOUT=3.3V
VOUT=5V
VOUT = 5V
0
VOUT=1.0V
VOUT = 1.0V
VOUT=1.2V
VOUT = 1.2V
0
5
FIGURE 2-19:
Efficiency vs. Output
Current (Input Voltage = 12V, CCM Mode).
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
5
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
VOUT=1.0V
VOUT = 1.0V
VOUT = 1.5V
VOUT=1.5V
VOUT = 1.2V
VOUT=1.2V
VOUT=2.5V
VOUT = 2.5V
VOUT = 3.3V
VOUT=3.3V
VOUT = 1.8V
VOUT=1.8V
VOUT = 5V
VOUT=5V
0
0.5
1
1.5 2 2.5 3
Output Current (A)
3.5
4
4.5
5
FIGURE 2-24:
Efficiency vs. Output
Current (Input Voltage = 75V, CCM Mode).
DS20005676F-page 10
MIC2127A
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
100%
90%
80%
70%
VOUT=5.0V
VOUT = 5V
Efficiency
Efficiency
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
VOUT=3.3V
VOUT = 3.3V
VOUT = 2.5V
VOUT=2.5V
VOUT = 1.8V
VOUT=1.8V
0
0.5
1
1.5 2 2.5 3
Load Current (A)
3.5
40%
30%
V
VOUT=1.2V
OUT = 1.2V
20%
VOUT=1.0V
VOUT = 1.0V
10%
4
4.5
80%
70%
70%
Efficiency
90%
80%
VOUT=5.0V
VOUT = 5V
VOUT=3.3V
VOUT = 3.3V
VOUT=2.5V
VOUT = 2.5V
VOUT=1.8V
VOUT = 1.8V
VOUT = 1.5V
VOUT=1.5V
VOUT = 1.2V
VOUT=1.2V
30%
20%
10%
0.5
1
1.5 2 2.5 3
Load Current (A)
3.5
0.5
1
1.5 2 2.5 3
Load Current (A)
3.5
4
4.5
5
VOUT=3.3V
VOUT = 3.3V
40%
VOUT=2.5V
VOUT = 2.5V
30%
VOUT = 1.8V
VOUT=1.8V
20%
VOUT = 1.5V
VOUT=1.5V
5
VOUT=1.2V
VOUT = 1.2V
VOUT=1.0V
VOUT = 1.0V
0
0.5
1
1.5 2 2.5 3
Load Current (A)
3.5
4
4.5
5
FIGURE 2-29:
Efficiency vs. Output
Current (Input Voltage = 60V, HLL Mode).
FIGURE 2-26:
Efficiency vs. Output
Current (Input Voltage = 24V, HLL Mode).
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
4.5
VOUT = 5V
VOUT=5.0V
50%
0%
0
4
60%
10%
VOUT = 1.0V
VOUT=1.0V
0%
VOUT=1.0V
V
OUT = 1.0V
FIGURE 2-28:
Efficiency vs. Output
Current (Input Voltage = 48V, HLL Mode).
100%
40%
V
VOUT=1.2V_D4
OUT = 1.2V
0
90%
50%
V
VOUT=1.8V
OUT = 1.8V
V
VOUT=1.5V_D4
OUT = 1.5V
0%
5
100%
60%
VOUT=5V_D4
V
OUT = 5V
VOUT=3.3V_D4
V
OUT = 3.3V
V
VOUT=2.5V_D4
OUT = 2.5V
50%
VOUT = 1.5V
VOUT=1.5V
FIGURE 2-25:
Efficiency vs. Output
Current (Input Voltage = 12V, HLL Mode).
Efficiency
60%
100%
90%
80%
Efficiency
Efficiency
70%
VOUT=5.0V
VOUT = 5V
VOUT=3.3V
VOUT = 3.3V
VOUT=2.5V
VOUT = 2.5V
VOUT = 1.8V
VOUT=1.8V
VOUT = 1.5V
VOUT=1.5V
VOUT = 1.2V
VOUT=1.2V
0.5
1
1.5 2 2.5 3
Load Current (A)
3.5
4
4.5
FIGURE 2-27:
Efficiency vs. Output
Current (Input Voltage = 36V, HLL Mode).
2016-2020 Microchip Technology Inc.
50%
40%
30%
VOUT=5.0V
VOUT = 5V
VOUT = 3.3V
VOUT=3.3V
20%
VOUT=2.5V
VOUT = 2.5V
VOUT=1.8V
VOUT = 1.8V
VOUT = 1.5V
VOUT=1.5V
VOUT = 1.2V
VOUT=1.2V
10%
VOUT = 1.0V
VOUT=1.0V
0
60%
5
VOUT = 1.0V
VOUT=1.0V
0%
0
0.5
1
1.5 2 2.5 3
Load Current (A)
3.5
4
4.5
5
FIGURE 2-30:
Efficiency vs. Output
Current (Input Voltage = 75V, HLL Mode).
DS20005676F-page 11
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
VVIN
20V/div
VVIN
20V/div
VSW
20V/div
VVIN = 0V to 48V
VOUT = 5V
IOUT = 5A
VOUT
2V/div
IL
5A/div
FIGURE 2-31:
IL
2A/div
10 ms/div
Power-Up.
10 ms/div
FIGURE 2-34:
Power-Up at Light Load in
HLL Mode (IOUT = 0.1A).
VVIN = 48V to 0V
VOUT = 5V
IOUT = 5A
VVIN = 48V
VOUT = 5V
IOUT = 5A
VEN
2V/div
VSW
20V/div
VOUT
2V/div
VOUT
2V/div
IL
5A/div
IL
5A/div
VPG
5V/div
10 ms/div
Power-Down.
FIGURE 2-35:
VVIN
20V/div
4 ms/div
Enable Turn-On/Turn-Off.
VEN
2V/div
VSW
20V/div
VVIN = 0V to 48V
VOUT = 5V
IOUT = 0.1A
VOUT
2V/div
IL
2A/div
VVIN = 0V to 48V
VOUT = 5V
IOUT = 0.1A
VOUT
2V/div
VVIN
20V/div
FIGURE 2-32:
VSW
20V/div
VVIN = 48V
VOUT = 5V
IOUT = 5A
VOUT
2V/div
IL
5A/div
10 ms/div
FIGURE 2-33:
Power-Up at Light Load in
CCM Mode (IOUT = 0.1A).
2016-2020 Microchip Technology Inc.
VPG
5V/div
FIGURE 2-36:
2 ms/div
Enable Turn-On Delay.
DS20005676F-page 12
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
VVIN = 48V
VOUT = 5V
IOUT = 5A
VEN
2V/div
VEN
2V/div
VOUT
2V/div
VOUT
2V/div
IL
5A/div
VSW
50V/div
VPG
5V/div
IL
2A/div
2 ms/div
FIGURE 2-37:
Enable Turn-Off Delay.
VVIN = 48V
VOUT = 5V
IOUT = 0.2A
VEN
2V/div
4 ms/div
FIGURE 2-40:
Enable Turn-On with
Prebiased Output (CCM Mode).
VEN
2V/div
VOUT
2V/div
VOUT
2V/div
VVIN = 48V
VOUT = 5V
IOUT = 0A
VOUT_PREBIAS = 2.5V
VSW
50V/div
IL
2A/div
VPG
5V/div
VVIN = 48V
VOUT = 5V
IOUT = 0A
VOUT_PREBIAS = 2.5V
IL
2A/div
10 ms/div
FIGURE 2-38:
Enable Turn-On/Turn-Off at
Light Load in CCM Mode.
4 ms/div
FIGURE 2-41:
Enable Turn-On with
Prebiased Output (HLL Mode).
VVIN = 48V
VOUT = 5V
IOUT = 0.2A
VEN
2V/div
VVIN = 48V
VOUT = 5V
IOUT = 0A
VEN
1V/div
VOUT
2V/div
VOUT
2V/div
IL
2A/div
VPG
5V/div
VSW
50V/div
4 ms/div
10 ms/div
FIGURE 2-39:
Enable Turn-On/Turn-Off at
Light Load in HLL Mode.
2016-2020 Microchip Technology Inc.
FIGURE 2-42:
Enable Thresholds.
DS20005676F-page 13
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
VVIN = Rising
VOUT = 5V
IOUT = 0A
VVDD
1V/div
VVIN = 0V to 48V
VOUT = 5V
Load = Short
RCL = 1.3 k
VVIN
20V/div
VOUT
500 mV/div
VOUT
2V/div
VSW
5V/div
FIGURE 2-43:
Rising.
IL
5A/div
10 ms/div
4 ms/div
VDD UVLO Threshold-
VVDD
1V/div
VVIN = Falling
VOUT = 5V
IOUT = 0A
FIGURE 2-46:
Power-Up into Output Short.
VVIN = 48V
VOUT = 5V
RCL = 1.3 k
VOUT
2V/div
VOUT
2V/div
VSW
5V/div
IOUT
5A/div
2 ms/div
100 ms/div
FIGURE 2-44:
Falling.
VDD UVLO Threshold-
VEN
2V/div
VVIN = 48V
VOUT = 5V
Load = Short
RCL = 1.3 k
FIGURE 2-47:
Threshold.
Output Current Limit
VVIN = 48V
VOUT = 5V
Load = Short
RCL = 1.3 k
VOUT
2V/div
VOUT
500 mV/div
IL
5A/div
IL
5A/div
4 ms/div
FIGURE 2-45:
Enable into Output Short.
2016-2020 Microchip Technology Inc.
2 ms/div
FIGURE 2-48:
Output Short Circuit.
DS20005676F-page 14
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
VOUT
2V/div
VVIN = 48V
VOUT = 5V
Load = Short
RCL = 1.3 k
VOUT
100 mV/div
AC coupled
VVIN = 48V
VOUT = 5V
IOUT = 0A to 2.5A
IL
5A/div
IOUT
2A/div
4 ms/div
FIGURE 2-49:
Circuit.
100 µs/div
Recovery from Output Short
VOUT
200 mV/div
AC coupled
VVIN = 48V
VOUT = 5V
IOUT = 0A to 5A
IOUT
2A/div
FIGURE 2-52:
(CCM Mode).
VOUT
100 mV/div
AC coupled
2 ms/div
Load Transient Response
VOUT
200 mV/div
AC coupled
VVIN = 48V
VOUT = 5V
IOUT = 0A to 5A
IOUT
2A/div
FIGURE 2-53:
(HLL Mode).
IOUT
2A/div
Load Transient Response
2016-2020 Microchip Technology Inc.
Load Transient Response
VOUT
100 mV/div
AC coupled
2 ms/div
FIGURE 2-51:
(HLL Mode).
VVIN = 48V
VOUT = 5V
IOUT = 0A to 2.5A
IOUT
2A/div
100 µs/div
FIGURE 2-50:
(CCM Mode).
Load Transient Response
FIGURE 2-54:
(HLL Mode).
VVIN = 48V
VOUT = 5V
IOUT = 2.5A to 5A
100 µs/div
Load Transient Response
DS20005676F-page 15
MIC2127A
Note: Unless otherwise indicated, VVIN = 12V, fSW = 300 kHz, RCL = 1.3 k, L = 10 µH, VEXTVDD = VOUT, TA = +25°C
(refer to the Typical Application Circuit circuit).
VVIN = 48V
VOUT = 5V
IOUT = 0A
VOUT
50 mV/div
AC coupled
VVIN = 48V
VOUT = 5V
IOUT = 5A
VOUT
50 mV/div
AC coupled
VSW
50V/div
IL
2A/div
IL
5A/div
VSW
50 V/div
2 µs/div
2 µs/div
FIGURE 2-55:
Switching Waveform at No
Load (CCM Mode).
FIGURE 2-57:
Load.
Switching Waveform at Full
VVIN = 48V
VOUT = 5V
IOUT = 0A
VOUT
50 mV/div
AC coupled
IL
2A/div
VSW
50V/div
10 µs/div
FIGURE 2-56:
Switching Waveform at No
Load (HLL Mode).
2016-2020 Microchip Technology Inc.
DS20005676F-page 16
MIC2127A
3.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
1
PG
3.1
Pin Function
Open-drain Power Good Output Pin
2
ILIM
Current Limit Setting Resistor Connection Pin
3
SW
Switch Pin and Current Sense Input for negative current limit
4
BST
Bootstrap Capacitor Connection Pin
5
DH
High-side N-MOSFET Gate Driver Output
6
PGND
7
DL
8
PVDD
9
EXTVDD
Power Ground
Low-side N-MOSFET Gate Driver Output
Internal Low Dropout Regulators Output of the MIC2127A
Supply Input for the internal low voltage LDO
10
EN
11
FREQ
Switching Frequency Programming Input
Enable Input
12
MODE
Light Load Mode Selection Input
13
FB
Feedback Input
Analog Ground
14
AGND
15
VDD
Supply Input for the MIC2127A internal analog circuits
16
VIN
Supply Input for the internal high-voltage LDO
17
EP
Exposed Pad
Power Good Output Pin (PG)
3.5
High-Side N-MOSFET Gate Driver
Output Pin (DH)
Connect PG to VDD through a pull-up resistor. PG is low
when the FB voltage is 10% below the 0.6V reference
voltage.
High-side N-MOSFET gate driver Output. Connect DH
to the gate of external high-side N-MOSFET.
3.2
3.6
Current Limit Pin (ILIM)
Connect a resistor from ILIM to SW to set the current
limit. Refer to Section 4.3 “Current Limit (ILIM)” for
more details.
3.3
Switch Pin (SW)
The SW pin provides the return path for the high-side
N-MOSFET gate driver when High-Side MOSFET
Gate Drive (DH) is low and is also used to sense
low-side MOSFET current by monitoring the SW node
voltage for negative current limit function.
Connect SW to the pin where the high-side MOSFET
source and the low-side MOSFET drain terminal are
connected together.
3.4
Bootstrap Capacitor Pin (BST)
BST capacitor acts as supply for the high-side
N-MOSFET driver. Connect a minimum of 0.1 µF low
ESR ceramic capacitor between BST and SW. Refer to
Section 4.5 “High-Side MOSFET Gate Drive (DH)”
for more details.
2016-2020 Microchip Technology Inc.
Power Ground Pin (PGND)
PGND provides the return path for the internal low-side
N-MOSFET gate driver output and also acts as
reference for the current limit comparator. Connect
PGND to the external low-side N-MOSFET source
terminal and to the return terminal of PVDD bypass
capacitor.
3.7
Low-Side N-MOSFET Gate Driver
Output Pin (DL)
Low-side N-MOSFET gate driver output. Connect to
the gate terminal of the external low-side N-MOSFET.
3.8
Internal Low Dropout Regulators
Output Pin (PVDD)
Combined output of the two internal LDOs (one LDO
powered by VIN and the other LDO powered by
EXTVDD). PVDD is the supply for the low-side
MOSFET driver and for the floating high-side MOSFET
driver. Connect a minimum of 4.7 µF low ESR ceramic
capacitor from PVDD to PGND.
DS20005676F-page 17
MIC2127A
3.9
EXTVDD
3.13
Feedback Input Pin (FB)
Supply to the internal low voltage LDO. Connect
EXTVDD to the output of the buck converter if it is
between 4.7V to 14V to improve system efficiency.
Bypass EXTVDD with a minimum of 1 µF low ESR
ceramic capacitor. Refer to Section 4.7 “Auxiliary
Bootstrap LDO (EXTVDD)” for more details.
FB is input to the transconductance amplifier of the
control loop. The control loop regulates the FB voltage
to 0.6V. Connect the FB node to the mid-point of the
resistor divider between output and AGND.
3.10
AGND is the reference to the analog control circuits
inside the MIC2127A. Connect AGND to PGND at one
point on the PCB.
Enable Input Pin (EN)
EN is a logic input. Connect to logic high to enable the
converter, and connect to logic low to disable the
converter.
3.11
Switching Frequency
Programming Input Pin (FREQ)
Switching Frequency Programming Input. Connect to
mid-point of the resistor divider formed between VIN
and AGND to set the switching frequency of the
converter. Tie FREQ to VIN to set the switching
frequency to 800 kHz. Refer to Section 5.1 “Setting
the Switching Frequency” for more details.
3.12
Light Load Mode Selection Input
Pin (MODE)
Light Load Mode Selection Input. Connect MODE pin
to VDD to select Continuous Conduction mode under
light loads, or connect to AGND to select HyperLight
Load (HLL) mode of operation under light loads. Refer
to Section 4.2 “Light Load Operating Mode
(MODE)” for further details.
2016-2020 Microchip Technology Inc.
3.14
3.15
Analog Ground Pin (AGND)
Bias Voltage Pin (VDD)
Supply for the MIC2127A internal analog circuits.
Connect VDD to PVDD of the MIC2127A through a
low-pass filter. Connect a minimum of 4.7 µF low ESR
ceramic capacitor from VDD to AGND for decoupling.
3.16
Input Voltage Pin (VIN)
Supply Input to the internal high-voltage LDO. Connect
to the main power source and bypass to PGND with a
minimum of 0.1 µF low ESR ceramic capacitor.
3.17
Exposed Pad (EP)
Connect to the AGND copper plane to improve thermal
performance of the MIC2127A device.
DS20005676F-page 18
MIC2127A
4.0
FUNCTIONAL DESCRIPTION
The MIC2127A device is an adaptive on-time
synchronous buck controller, designed to cover a wide
range of input voltage applications ranging from
4.5V-5V. An adaptive on-time control scheme is
employed to get a fast transient response and to obtain
high-voltage conversion ratios at constant switching
frequency. Overcurrent protection is implemented by
sensing low-side MOSFET's RDS(ON), which eliminates
lossy current sense resistor. The device features
internal soft-start, enable input, UVLO, power good
output (PG), secondary bootstrap LDO and thermal
shutdown.
4.1
Theory of Operation
The MIC2127A is an adaptive on-time synchronous
buck controller that operates based on ripple at the
feedback node. The output voltage is sensed by the
MIC2127A feedback pin (FB) and is compared to a
0.6V reference voltage (VREF) at the low-gain
transconductance error amplifier (gM), as shown in the
Functional Block Diagram. Figure 4-1 shows the
MIC2127A control loop timing during steady-state
operation.
The error amplifier behaves as the short circuit for the
ripple voltage frequency on the FB pin, which causes
the error amplifier output voltage ripple to follow the
feedback voltage ripple. When the transconductance
error amplifier output (VgM) is below the reference
voltage of the comparator, which is same as the error
amplifier reference (VREF), the comparator triggers and
generates an on-time event. The on-time period is
predetermined by the fixed tON estimator circuitry,
which is given by Equation 4-1:
EQUATION 4-1:
The maximum duty cycle can be calculated using
Equation 4-2:
EQUATION 4-2:
t SW – tOFF MIN
230 ns
DMAX = --------------------------------------- = 1 – ---------------t SW
tSW
Where:
tSW
= Switching period, equal to 1/fSW
It is not recommended to use the MIC2127A device
with an OFF time close to tOFF(MIN) during steady-state
operation.
The adaptive on-time control scheme results in a
constant switching frequency over the wide range of
input voltage and load current. The actual ON time and
resulting switching frequency varies with the different
rising and falling times of the external MOSFETs. The
minimum controllable ON time (tON(MIN)) results in a
lower switching frequency than the target switching
frequency in high VIN to VOUT ratio applications.
Equation 4-3 shows the output-to-input voltage ratio,
below which the MIC2127A device lowers the switching
frequency in order to regulate the output to set value.
EQUATION 4-3:
VOUT
------------- tON(MIN) f SW
V IN
Where:
VOUT
= Output voltage
VIN
= Input voltage
fSW
= Switching frequency
tON(MIN)
= Minimum controllable ON time (80 ns typ.)
VOUT
t ON ESTIMATED = -------------------------V VIN f SW
Where:
VOUT
= Output voltage
VVIN
= Power stage input voltage
fSW
= Switching frequency
At the end of the ON time, the internal high-side driver
turns off the high-side MOSFET and the low-side driver
turns on the low-side MOSFET. The OFF time of the
high-side MOSFET depends on the feedback voltage.
When the feedback voltage decreases, the output of
the gM amplifier (VgM) also decreases. When the output
of the gM amplifier (VgM) is below the reference voltage
of the comparator (which is same as the error amplifier
reference (VREF)), the OFF time ends and ON time is
triggered. If the OFF time determined by the feedback
voltage is less than the minimum OFF time (tOFF(MIN))
of the MIC2127A, which is about 230 ns (typical), the
MIC2127A control logic applies the tOFF(MIN), instead.
2016-2020 Microchip Technology Inc.
DS20005676F-page 19
MIC2127A
Full Load
ǻIL
IL
IL
No Load
ǻVOUT
VOUT
ǻVOUT = ESR*ǻIL
VOUT
ǻVFB
VREF
VFB
ǻVFB = ǻVOUT *(VREF/VOUT)
ǻVFB
VREF
VgM
VREF
VFB
MIC2127A Triggers ON-Time event if
the error amplifier output (VgM) is below VREF
VDH
VREF
VgM
Estimated ON-Time
FIGURE 4-1:
Timing.
MIC2127A Control Loop
Figure 4-2 shows operation of the MIC2127A during
load transient. The output voltage drops due to a
sudden increase in load, which results in the error
amplifier output (VgM) falling below VREF. This causes
the comparator to trigger an on-time event. At the end
of the ON time, a minimum OFF time tOFF(MIN) is
generated to charge the bootstrap capacitor. The next
ON time is triggered immediately after the tOFF(MIN) if
the error amplifier output voltage (VgM) is still below
VREF due to the low feedback voltage. This operation
results in higher switching frequency during load
transients. The switching frequency returns to the
nominal set frequency once the output stabilizes at new
load current level. The output recovery time is fast and
the output voltage deviation is small in the MIC2127A
converter due to the varying duty cycle and switching
frequency.
2016-2020 Microchip Technology Inc.
VDH
toff(MIN)
FIGURE 4-2:
Response.
MIC2127A Load Transient
Unlike true current-mode control, the MIC2127A uses
the output voltage ripple to trigger an on-time event. In
order to meet the stability requirements, the MIC2127A
feedback voltage ripple should be in phase with the
inductor current ripple and large enough to be sensed
by the internal error amplifier. The recommended
feedback voltage ripple is approximately 20 mV100 mV over the full input voltage range. If a low-ESR
output capacitor is selected, then the feedback voltage
ripple may be too small to be sensed by the internal
error amplifier. Also, the output voltage ripple and the
feedback voltage ripple are not necessarily in phase
with the inductor current ripple if the ESR of the output
capacitor is very low. For these applications, ripple
injection is required to ensure proper operation. Refer
to Section 5.7 “Ripple Injection” for details about the
ripple injection technique.
DS20005676F-page 20
MIC2127A
4.2
Light Load Operating Mode
(MODE)
4.3
MIC2127A features a MODE pin that allows the user to
select either Continuous Conduction mode or
HyperLight Load (HLL) mode under light loads. HLL
mode increases the system efficiency at light loads by
reducing the switching frequency. Continuous
Conduction mode keeps the switching frequency
almost constant over the load current range.
Figure 4-3 shows the control loop timing in HLL mode.
The MIC2127A device has a zero crossing comparator
(ZC Detection) that monitors the inductor current by
sensing the voltage drop across the low-side MOSFET
during its ON time. The zero crossing comparator
triggers whenever the low-side MOSFET current goes
negative and turns off the low-side MOSFET. The
switching instant of the high-side MOSFET depends on
the error amplifier output, which is same as the
comparator inverting input (see the Functional Block
Diagram). If the error amplifier output is higher than the
comparator reference, then the MIC2127A enters into
Sleep mode. During Sleep mode, both the high-side
and low-side MOSFETs are kept off and the efficiency
is optimized by shutting down all the nonessential
circuits inside the MIC2127A. The load current is
supplied by the output capacitor during Sleep mode.
The control circuitry wakes up when the error amplifier
output falls below the comparator reference and a tON
pulse is triggered.
Low side MOSFET current crosses 0A and the comparator inverting input, VgM, is higher than its reference.
This condition triggers the HLL mode
The comparator inverting input, VgM, is lower than its reference. The
MIC2127A comes out of HLL mode
IL
Current Limit (ILIM)
The MIC2127A device uses the low-side MOSFET
RDS(ON) to sense inductor current. In each switching
cycle of the MIC2127A converter, the inductor current
is sensed by monitoring the voltage across the low-side
MOSFET during the OFF period of the switching cycle,
during which low-side MOSFET is ON. An internal
current source of 100 µA generates a voltage across
the external current limit setting resistor RCL as shown
in Figure 4-4.
VIN
DH
MIC2127A
L1
SW
Control
Logic
DL
RCL
PGND
CURRENT
LIMIT
DETECTION
ICL
ILIM
FIGURE 4-4:
Circuit.
MIC2127A Current Limiting
The ILIM pin voltage (VILIM) is the difference of the
voltage across the low-side MOSFET and the voltage
across the resistor (VRCL). The sensed voltage VILIM is
compared with the power ground (PGND) after a
blanking time of 150 ns.
0A
VREF
VFB
VREF
VgM
ZCD
VDH
If the absolute value of the voltage drop across the
low-side MOSFET is greater than the absolute value of
the voltage across the current setting resistor (VRCL),
the MIC2127A triggers the current limit event.
Consecutive eight-current limit events trigger the
Hiccup mode. Once the controller enters into Hiccup
mode, it initiates a soft start sequence after a hiccup
timeout of 4 ms (typical). Both the high-side and
low-side MOSFETs are turned off during hiccup
timeout. The hiccup sequence, including the soft start,
reduces the stress on the switching FETs and protects
the load and supply from severe short conditions.
The current limit can be programmed by using the
following Equation 4-4.
VDL
FIGURE 4-3:
MIC2127A Control Loop
Timing (HLL Mode).
The typical no-load supply current during HLL mode is
only about 300 µA, allowing the MIC2127A device to
achieve high efficiency at light load operation.
2016-2020 Microchip Technology Inc.
DS20005676F-page 21
MIC2127A
EQUATION 4-4:
RCL
IL PP
I
+ ---------------- R DS ON + V OFFSET
CLIM
2
= -------------------------------------------------------------------------------------------------I CL
Where:
ICLIM
= Load current limit
RDS (ON) = On-resistance of low-side power MOSFET
ILPP
= Inductor peak-to-peak ripple current
VOFFSET = Current-limit comparator offset (15 mV max.)
ICL
= Current-limit source current (100 µA typ)
Since MOSFET RDS(ON) varies from 30%-40% with
temperature, it is recommended to consider the
RDS(ON) variation while calculating RCL in the above
equation, to avoid false current limiting due to
increased MOSFET junction temperature rise. Also
connect the SW pin directly to the drain of the low-side
MOSFET to accurately sense the MOSFETs RDS(ON).
To improve the current limit variation, the MIC2127A
adjusts the internal source current of the current limit
(ICL) at a rate of 0.3 µA/°C when the MIC2127A
junction temperature changes to compensate the
RDS(ON) variation of external low-side MOSFET. The
effectiveness of this method depends on the thermal
gradient between the MIC2127A and the external
low-side MOSFET. The lower the thermal gradient, the
better the current limit variation.
A small capacitor (CCL) can be connected from the ILIM
pin to PGND to filter the switch node ringing during the
OFF time, allowing a better current sensing. The time
constant of RCL and CCL should be less than the
minimum OFF time.
4.4
Negative Current Limit
The MIC2127A device implements negative current
limit by sensing the SW voltage when the low-side FET
is ON. If the SW node voltage exceeds 48 mV typical,
the device turns off the low-side FET for 500 ns.
Negative current limit value is shown in Equation 4-5.
EQUATION 4-5:
48mV
I NLIM = -------------------R DS ON
Where:
INLIM
= Negative current limit
bootstrap diode between the PVDD and BST pins. This
circuit supplies energy to the high-side drive circuit. A
low ESR ceramic capacitor should be connected
between BST and SW pins (refer to the Typical
Application Circuit circuit).The capacitor between BST
and SW pins, CBST, is charged while the low-side
MOSFET is on. When the high-side MOSFET driver is
turned on, energy from CBST is used to turn the
MOSFET on. A minimum of 0.1 µF low ESR ceramic
capacitor is recommended between BST and SW pins.
The required value of CBST can be calculated using the
following Equation 4-6:
EQUATION 4-6:
Q G_HS
C BST = ------------------ V CBST
Where:
QG_HS
= High-side MOSFET total gate charge
VCBST
= Voltage drop across the CBST,
generally 50 mV to 100 mV
A small resistor in series with CBST can be used to slow
down the turn-on time of the high-side N-channel
MOSFET.
4.6
Low-Side MOSFET Gate Drive (DL)
MIC2127A's low-side drive circuit is designed to switch
an N-Channel external MOSFET. The internal low-side
MOSFET driver is powered by PVDD. Connect a
minimum of 4.7 µF low-ESR ceramic capacitor to
supply the transient gate current of the external
MOSFET.
4.7
Auxiliary Bootstrap LDO
(EXTVDD)
MIC2127A features an auxiliary bootstrap LDO that
improves the system efficiency by supplying the
MIC2127A internal circuit bias power and gate drivers
from the converter output voltage. This LDO is enabled
when the voltage on the EXTVDD pin is above 4.6V
(typical) and, at the same time, the main LDO that
operates from VIN is disabled to reduce power
consumption. Connect EXTVDD to the output of the
buck converter if it is between 4.7V and 14V. When the
EXTVDD is tied to VOUT, a voltage spike will occur at
the PVDD and VDD during a fast hard short at VOUT.
Larger decoupling ceramic capacitors of 10 µF at PVDD
and VDD are recommended for such a situation.
RDS (ON) = On-resistance of low-side power MOSFET
4.5
High-Side MOSFET Gate Drive
(DH)
The MIC2127A’s high-side drive circuit is designed to
switch an N-Channel external MOSFET. The
MIC2127A Functional Block Diagram shows a
2016-2020 Microchip Technology Inc.
DS20005676F-page 22
MIC2127A
5.0
APPLICATIONS INFORMATION
5.2
5.1
Setting the Switching Frequency
The output voltage can be adjusted using a resistor
divider from output to AGND whose mid-point is
connected to the FB pin, as shown the Figure 5-3.
The MIC2127A device is an adjustable-frequency, synchronous buck controller, featuring a unique adaptive
on-time control architecture. The switching frequency
can be adjusted between 270 kHz-800 kHz by changing the resistor divider network between VIN and AGND
pins consisting of R1 and R2, as shown in Figure 5-1.
Output Voltage Setting
MIC2127A
MIC2127A
VOUT
R1
VIN
16
COMPENSATION
VIN
4.5V to 75V
FB
13
gm
R1
11 FREQ
SOFTSTART
Comparator
R2
VREF
R2
0.6V
14
AGND
FIGURE 5-3:
FIGURE 5-1:
Adjustment.
Switching Frequency
Equation 5-1 shows the estimated switching frequency.
The output voltage
Equation 5-2.
VREF
800
Switching Frequency (kHz)
calculated
using
Where:
fO is the switching frequency when R1 is 100 k and R2
being open; fO is typically 800 kHz. For more precise
setting, it is recommended to use Figure 5-2.
VOUT = 5V
R1 = 100 k
IOUT = 5A
600
VIN = 48V
VIN = 75V
400
be
R1
V OUT = V REF 1 + ------
R 2
R2
f SW_ADJ = fO ------------------R1 + R2
500
can
EQUATION 5-2:
EQUATION 5-1:
700
Output Voltage Adjustment.
VIN = 24V
300
= 0.6V
The maximum output voltage that can be programmed
using the MIC2127A is limited to 30V, if not limited by
the maximum duty cycle (see Equation 4-2).
A typical value of R1 is less than 30 k. If R1 is too
large, it may allow noise to be introduced into the
voltage feedback loop. It also increases the offset
between the set output voltage and actual output
voltage because of the error amplifier bias current. If R1
is too small in value, it will decrease the efficiency of the
power supply, especially at light loads. Once R1 is
selected, R2 can be calculated using Equation 5-3.
EQUATION 5-3:
200
50
FIGURE 5-2:
500
R2 (k)
5000
Switching Frequency vs. R2.
2016-2020 Microchip Technology Inc.
R1
R 2 = ----------------------V OUT
------------- – 1
V REF
DS20005676F-page 23
MIC2127A
5.3
MOSFET Selection
EQUATION 5-5:
Important parameters for MOSFET selection are:
• Voltage rating
• On-resistance
• Total gate charge
The voltage rating for the high-side and low-side
MOSFETs is essentially equal to the power stage input
voltage VIN. A safety factor of 30% should be added to
the VIN(MAX) while selecting the voltage rating of the
MOSFETs to account for voltage spikes due to circuit
parasitic elements.
5.3.1
HIGH-SIDE MOSFET POWER
LOSSES
I RMS HS = I LOAD D
ILOAD is the load current and D is the operating duty
cycle, given by Equation 5-6.
EQUATION 5-6:
VOUT
D = ------------V IN
EQUATION 5-7:
The total power loss in the high-side MOSFET
(PHSFET) is the sum of the power losses because of
conduction (PCONDUCTION), switching (PSW), reverse
recovery charge of low-side MOSFET body diode
(PQrr) and MOSFET's output capacitance discharge, as
calculated in the Equation 5-4.
Q SW HS R DH PULL_UP + R HS GATE
t R = -----------------------------------------------------------------------------------------------------V DD – VTH
EQUATION 5-8:
Q SW HS RDH PULL_DOWN + RHS GATE
t F = ------------------------------------------------------------------------------------------------------------V TH
EQUATION 5-4:
PHSFET = PCONDUCTION HS + PSW HS + P Qrr + P COSS
Where:
RDH(PULL-UP)
2
P CONDUCTION HS = I RMS HS R DS ON_HS
P SW HS = 0.5 VIN I LOAD tR + t F f SW
P Qrr = VIN Q rr f SW
1
2
P COSS = --- C OSS HS + C OSS HS VIN f SW
2
RDH(PULL-DOWN) = High-side gate driver pull-down
resistance
RHS(GATE)
= High-side MOSFET gate resistance
VTH
= Gate to Source threshold voltage of
the high-side MOSFET
QSW(HS)
= Switching gate charge of the
high-side MOSFET which can be
approximated by Equation 5-9.
Where:
RDS(ON_HS)
=
On-resistance of the high-side MOSFET
VIN
=
Operating input voltage
ILOAD
=
Load current
fSW
=
Operating switching frequency
Qrr
=
Reverse recovery charge of low-side
MOSFET body diode or of external
diode across low-side MOSFET
EQUATION 5-9:
COSS(HS)
=
Effective high-side MOSFET output
capacitance
COSS(LS)
=
Effective low-side
capacitance
IRMS(HS)
=
RMS current of the high-side MOSFET
which can be calculated using
Equation 5-5.
tR, tF
=
The high-side MOSFET turn-on and
turn-off transition times which can be
approximated by Equation 5-7 and
Equation 5-8
2016-2020 Microchip Technology Inc.
MOSFET
= High-side gate driver pull-up
resistance
output
Q GS HS
Q SW HS = -------------------- + Q GD HS
2
Where:
QGS(HS)
= High-side MOSFET gate to source
charge
QGD(HS)
= High-side MOSFET gate to drain charge
DS20005676F-page 24
MIC2127A
5.3.2
LOW-SIDE MOSFET POWER
LOSSES
The total power loss in the low-side MOSFET (PLSFET)
is the sum of the power losses because of conduction
(PCONDUCTION(LS)) and body diode conduction during
the dead time (PDT), as calculated in Equation 5-10.
EQUATION 5-10:
PLSFET = PCONDUCTION LS + P DT
2
P CONDUCTION LS = I RMS LS RDS ON_LS
P DT = 2 V F I LOAD t DT f SW
Where:
EQUATION 5-12:
VOUT VIN – VOUT
L = -----------------------------------------------------V IN f SW 0.3 IFL
Where:
= Input voltage
VIN
fSW
= Switching frequency
IFL
= Full load current
VOUT
= Output voltage
For a selected Inductor, the peak-to-peak inductor
current ripple can be calculated using Equation 5-13.
EQUATION 5-13:
V
RDS(ON_LS) = On-resistance of the low-side MOSFET
VF
= Low-side MOSFET body diode forward
voltage drop
tDT
= Dead time which is approximately 20 ns
fSW
= Switching Frequency
IRMS(LS)
= RMS current of the low-side MOSFET
which can be calculated using
Equation 5-11
Where:
ILOAD = load current
D
= operating duty cycle
The peak inductor current is equal to the load current
plus one half of the peak-to-peak inductor current ripple
which is shown in Equation 5-14.
EQUATION 5-14:
I L_PP
IL_PK = I LOAD + ---------------2
EQUATION 5-11:
I RMS LS = I LOAD 1 – D
V – V
V IN f SW L
OUT
IN
OUT
I L_PP = -----------------------------------------------------
The RMS and saturation current ratings of the selected
inductor should be at least equal to the RMS current
and saturation current calculated in Equation 5-15 and
Equation 5-16.
EQUATION 5-15:
5.4
Inductor Selection
Inductance value, saturation and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine
the peak-to-peak inductor ripple current.
The lower the inductance value, the higher the
peak-to-peak ripple current through the inductor, which
increases the core losses in the inductor. Higher
inductor ripple current also requires more output
capacitance to smooth out the ripple current. The
greater the inductance value, the lower the
peak-to-peak ripple current, which results in a larger
and more expensive inductor.
A good compromise between size, loss and cost is to
set the inductor ripple current to be equal to 30% of the
maximum output current.
2
I L_RMS =
2 I L_PP
I LOAD(MAX) + -----------------------12
Where:
ILOAD(MAX)
= Maximum load current
EQUATION 5-16:
R CL I CL + 15mV
I L_SAT = -------------------------------------------------RDS(ON)
Where:
RCL
= Current limit resistor
ICL
= Current-Limit Source Current
(100 µA typical)
RDS (ON)
= On-resistance of low-side power MOSFET
The inductance value is calculated by Equation 5-12.
2016-2020 Microchip Technology Inc.
DS20005676F-page 25
MIC2127A
Maximizing efficiency requires the proper selection of
core material and minimizing the winding resistance.
Use of ferrite materials is recommended in the higher
switching frequency applications. Lower-cost iron
powder cores may be used, but the increase in core
loss reduces the efficiency of the power supply. This is
especially noticeable at low output power. The winding
resistance decreases efficiency at the higher output
current levels. The winding resistance must be
minimized, although this usually comes at the expense
of a larger inductor. The power dissipated in the
inductor is equal to the sum of the core and copper
losses. At higher output loads, the core losses are
usually insignificant and can be ignored. At lower
output currents, the core losses can be a significant
contributor. Core loss information is usually available
from the magnetic’s vendor.
The amount of copper loss in the inductor is calculated
by Equation 5-17.
EQUATION 5-17:
2
P INDUCTOR CU = I L_RMS R DCR
5.5
Output Capacitor Selection
The main parameters for selecting the output capacitor
are capacitance value, voltage rating and RMS current
rating. The type of the output capacitor is usually
determined by its equivalent series resistance (ESR).
Recommended capacitor types are ceramic, tantalum,
low-ESR aluminum electrolytic, OS-CON and
POSCAP. The output capacitor ESR also affects the
control loop from a stability point of view. The maximum
value of ESR can be calculated using Equation 5-18.
EQUATION 5-18:
VOUT_PP
ESR ------------------------- I L_PP
EQUATION 5-19:
I L_PP
C OUT = -------------------------------------------------8 f SW V OUT_PP
Where:
COUT
= Output capacitance value
fSW
= Switching frequency
VOUT_PP
= Steady state output voltage ripple
As described in Section 4.1 “Theory of Operation”,
the MIC2127A device requires at least 20 mV
peak-to-peak ripple at the FB pin to ensure that the gM
amplifier and the comparator behave properly. Also,
the output voltage ripple should be in phase with the
inductor current. Therefore, the output voltage ripple
caused by the output capacitor’s value should be much
smaller than the ripple caused by the output capacitor
ESR. If low-ESR capacitors, such as ceramic
capacitors, are selected as the output capacitors, a
ripple injection circuit should be used to provide
enough feedback-voltage ripple. Refer to the
Section 5.7 “Ripple Injection” for details.
The voltage rating of the capacitor should be twice the
output voltage for tantalum and 20% greater for aluminum electrolytic, ceramic or OS-CON. The output
capacitor RMS current is calculated in Equation 5-20.
EQUATION 5-20:
I L_PP
I C_OUT(RMS) = ---------------12
The power dissipated in the output capacitor is shown
in Equation 5-21.
EQUATION 5-21:
2
P DIS(C_OUT) = IC_OUT(RMS) ESRC_OUT
Where:
VOUT_PP
= Peak-to-peak output voltage ripple
IL_PP
= Peak-to-peak inductor current ripple
The required output capacitance to meet steady state
output voltage ripple can be calculated using
Equation 5-19.
2016-2020 Microchip Technology Inc.
DS20005676F-page 26
MIC2127A
5.6
Input Capacitor Selection
The input capacitor reduces peak current drawn from
the power supply and reduces noise and voltage ripple
on the input. The input voltage ripple depends on the
input capacitance and ESR. The input capacitance and
ESR values can be calculated using Equation 5-22.
EQUATION 5-22:
The applications are divided into three situations
according to the amount of the feedback voltage ripple:
1.
Enough ripple at the feedback due to the large
ESR of the output capacitor (Figure 5-4). The
converter is stable without any additional ripple
injection at the FB node. The feedback voltage
ripple is given by Equation 5-25.
EQUATION 5-25:
I LOAD D 1 – D
C IN = ------------------------------------------------ fSW V IN_C
V IN_ESR
ESRC_IN = ----------------------I L_PK
R
R2 + R1
2
VFB PP = ----------------- ESR I L_PP
IL_PP is the peak-to-peak value of the inductor current
ripple.
Where:
ILOAD
= Load Current
IL_PK
= Peak Inductor Current
VINC
= Input ripple due to capacitance
VINESR
= Input ripple due to input capacitor ESR
η
= Power conversion efficiency
The input capacitor should be rated for ripple current
rating and voltage rating. The RMS value of input
capacitor current is determined at the maximum output
current. The RMS current rating of the input capacitor
should be greater than or equal to the input capacitor
RMS current calculated using Equation 5-23.
EQUATION 5-23:
I C_IN(RMS) = I LOAD(MAX) D 1 – D
The power dissipated in the input capacitor is
calculated using Equation 5-24.
R1
COUT
MIC2127A
FB
ESR
R2
FIGURE 5-4:
2.
Enough Ripple at FB.
Inadequate ripple at the feedback voltage due to
the small ESR of the output capacitor.
The output voltage ripple can be fed into the FB pin
through a feed forward capacitor, CFF in this case, as
shown in Figure 5-5. The typical CFF value is between
1 nF-100 nF. With the feed forward capacitor, the feedback voltage ripple is very close to the output voltage
ripple, which is shown in Equation 5-26.
EQUATION 5-26:
EQUATION 5-24:
2
PDISS(C_IN) = I C_IN(RMS) ESR C_IN
5.7
L
SW
V FB PP = ESR I L_PP
Ripple Injection
The minimum recommended ripple at the FB pin for
proper operation of the MIC2127A error amplifier and
comparator is 20 mV. However, the output voltage
ripple is generally designed as 1%-2% of the output
voltage. For low output voltages, such as a 1V, the
output voltage ripple is only 10 mV-20 mV, and the
feedback voltage ripple is less than 20 mV. If the
feedback voltage ripple is so small that the gM amplifier
and comparator cannot sense it, then the MIC2127A
loses control and the output voltage is not regulated. In
order to have sufficient VFB ripple, the ripple injection
method should be applied for low output voltage ripple
applications.
2016-2020 Microchip Technology Inc.
L
SW
R1
MIC2127A
FB
CFF
COUT
ESR
R2
FIGURE 5-5:
Inadequate Ripple at FB.
DS20005676F-page 27
MIC2127A
3.
Virtually no ripple at the FB pin voltage due to
the very-low ESR of the output capacitors.
In this case, additional ripple can be injected into the
FB pin from the switching node SW, via a resistor RINJ
and a capacitor CINJ, as shown in Figure 5-6.
Once all the ripple injection component values are calculated, ensure that the criterion shown in
Equation 5-28 is met.
For high duty cycle applications with D > 40%, the procedures to design the ripple injection circuit components are as below:
1.
L
SW
RINJ
R1
CFF
CINJ
MIC2127A
FB
COUT
ESR
R2
FIGURE 5-6:
For given feedback divider resistor values,
select CFF such that the time constant formed by
CFF and feedback divider is 50% of the switching period as given in Equation 5-30:
EQUATION 5-30:
C FF R FBEQ = 0.5 T SW
R1 R 2
RFBEQ = R1 R 2 = -----------------R 1 + R2
Invisible Ripple at FB.
The injected ripple at the FB pin in this case is given by
the Equation 5-27.
2.
Calculate RINJ using the Equation 5-29 Make
sure that the injected ripple voltage into FB pin
is in the range of 20 mV to 100 mV.
EQUATION 5-27:
3.
Choose CINJ = 100 nF or at least 10 times the
CFF value.
VFB PP
V OUT 1 – D
= -----------------------------------------CFF RINJ f SW
In Equation 5-27, it is assumed that the time constant
associated with the CFF meets the criterion shown in
Equation 5-28.
EQUATION 5-28:
T SW
= C FF R 1 R 2 RINJ
The process of sizing the ripple injection resistor and
capacitors is:
Select CINJ in the range of 47 nF-100 nF, which
can be considered as short for a wide range of
the frequencies.
Select CFF in the range of 0.47 nF-10 nF, if R1
and R2 are in k range.
Select RINJ according to Equation 5-29.
1.
2.
3.
EQUATION 5-29:
R INJ
Where:
V OUT 1 – D
= ------------------------------------------------------CFF fSW V FB PP
VOUT
= Output voltage
D
= Duty cycle
fSW
= Switching frequency
VFB(PP)
= Injected Feedback Ripple (20 mV to
100 mV)
2016-2020 Microchip Technology Inc.
5.8
Power Dissipation in MIC2127A
The MIC2127A features two Low Dropout Regulators
(LDOs) to supply power at the PVDD pin from either VIN
or EXTVDD depending on the voltage at the EXTVDD
pin. PVDD powers MOSFET drivers and VDD pin, which
is recommended to connect to PVDD through a low
pass filter, powers the internal circuitry. In the
applications where the output voltage is 5V and above
(up to 14V), it is recommended to connect EXTVDD to
the output to reduce the power dissipation in the
MIC2127A, to reduce the MIC2127A junction
temperature and to improve the system efficiency.
The power dissipation in the MIC2127A depends on
the internal LDO being in use, on the gate charge of the
external MOSFETs and on the switching frequency.
The power dissipation and the junction temperature of
the MIC2127A can be estimated using Equations 5-31,
5-32 and 5-33.
Power dissipation in the MIC2127A when EXTVDD is
not used.
EQUATION 5-31:
P IC = V IN ISW + IQ
Power dissipation in the MIC2127A when EXTVDD is
used.
DS20005676F-page 28
MIC2127A
EQUATION 5-32:
PIC = V EXTVDD I SW + I Q
I SW = Q G f SW
Q G = Q G_HS + Q G_LS
Where:
ISW
= Switching current into the VIN pin
IQ
= Quiescent current
QG
= Total gate charge of the external MOSFETs which is sum of the gate charge of
high-side MOSFET (QG_HS) and the
low-side MOSFET (QG_LS) at 5V gate to
source voltage. Gate charge information
can be obtained from the MOSFETs
datasheet.
VEXTVDD
= Voltage at the EXTVDD pin
(4.6 ≤ VEXTVDD ≤ 14 V typ.)
EQUATION 5-34:
·
P IC = 48V 10 mA + 1.5 mA
PIC = 0.552W
T J = 0.552W 50.8 C W + 85 C
T J = 113 C
When the 5V output is used as the input to the
EXTVDD pin, the MIC2127A junction temperature
reduces from +113°C to +88°C, as calculated in
Equation 5-35.
EQUATION 5-35:
P IC = 5V 10 mA + 1.5 mA
PIC = 0.058W
T J = 0.058W 50.8 C W + 85 C
T J = 88 C
The junction temperature of the MIC2127A can be
estimated using Equation 5-33.
EQUATION 5-33:
T J = P IC JA + T A
Where:
TJ
= Junction temperature
PIC
= Power dissipation
θJA
= Junction Ambient Thermal resistance
(50.8°C/W)
The maximum recommended operating junction
temperature for the MIC2127A is +125°C.
Using the output voltage of the same switching
regulator, when it is between 4.6V (typ.) to 14V, as the
voltage at the EXTVDD pin significantly reduces the
power dissipation inside the MIC2127A. This reduces
the junction temperature rise as illustrated in
Equation 5-35.
For the typical case of VVIN = 48V, VOUT = 5V,
maximum ambient temperature of +85°C and 10 mA of
ISW, the MIC2127A junction temperature when the
EXTVDD is not used is given by Equation 5-34.
2016-2020 Microchip Technology Inc.
DS20005676F-page 29
MIC2127A
6.0
PCB LAYOUT GUIDELINES
The PCB layout is critical to achieve reliable, stable and
efficient performance. The following guidelines should
be followed to ensure proper operation of the
MIC2127A converter.
6.1
IC
• The ceramic bypass capacitors, which are connected to the VDD and PVDD pins, must be located
right at the IC. Use wide traces to connect to the
VDD, PVDD and AGND, and PGND pins respectively.
• The signal ground pin (AGND) must be connected
directly to the ground planes.
• Place the IC close to the point-of-load (POL).
• Signal and power grounds should be kept
separate and connected at only one location.
6.2
Input Capacitor
• Place the input ceramic capacitors as closely as
possible to the MOSFETs.
• Place several vias to the ground plane closely to
the input capacitor ground terminal.
6.3
6.4
Output Capacitor
• Use a copper plane to connect the output
capacitor ground terminal to the input capacitor
ground terminal.
• The feedback trace should be separate from the
power trace and connected as closely as possible
to the output capacitor. Sensing a long
high-current load trace can degrade the DC load
regulation.
6.5
MOSFETs
• MOSFET gate drive traces must be short and
wide. The ground plane should be the connection
between the MOSFET source and PGND.
• Chose a low-side MOSFET with a high CGS/CGD
ratio and a low internal gate resistance to
minimize the effect of dV/dt inducted turn-on.
• Use a 4.5V VGS rated MOSFET. Its higher gate
threshold voltage is more immune to glitches than
a 2.5V or 3.3V rated MOSFET.
Inductor
• Keep the inductor connection to the switch node
(SW) short.
• Do not route any digital lines underneath or close
to the inductor.
• Keep the switch node (SW) away from the
feedback (FB) pin.
• The SW pin should be connected directly to the
drain of the low-side MOSFET to accurately
sense the voltage across the low-side MOSFET.
2016-2020 Microchip Technology Inc.
DS20005676F-page 30
MIC2127A
7.0
PACKAGING INFORMATION
7.1
Package Marking Information
16-Pin VQFN (3 x 3 mm)
Example
2127A
WNNN
2127A
2256
Legend: XX...X
Y
YY
WW
NNN
e3
*
Product code or customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (‾) symbol may not be to scale.
2016-2020 Microchip Technology Inc.
DS20005676F-page 31
MIC2127A
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2016-2020 Microchip Technology Inc.
DS20005676F-page 32
MIC2127A
APPENDIX A:
REVISION HISTORY
Revision F (April 2020)
The following is the list of modifications:
1.
2.
3.
4.
5.
6.
7.
Updated content in the Features section.
Updated the Typical Application Circuit.
Updated content in the Electrical Characteristics table.
Updated content in Section 2.0, Typical Characteristic Curves.
Updated content in Section 4.3, Current Limit
(ILIM).
Updated content in Section 4.5, High-Side
MOSFET Gate Drive (DH).
Updated content in Section 5.0, Applications
Information.
Revision E (September 2019)
The following is the list of modifications:
1.
Adds AEC-Q100 qualification for new
automotive option: the MIC2127AYML-TRVAO
75V Synchronous Buck Controller.
Revision D (March 2019)
The following is the list of modifications:
2.
Updated the ILIM Source Current and the Zero
Crossing Detection Comparator Threshold
values in the Electrical Characteristics table.
Revision C (June 2018)
The following is the list of modifications:
1.
2.
3.
4.
Updated Section 1.0 “Electrical Characteristics”.
Minor editorial corrections.
Updated Current Limit values in Electrical
Characteristics.
Updated content in Section 3.9 “EXTVDD” and
Section 4.7 “Auxiliary Bootstrap LDO
(EXTVDD)”.
Revision B (December 2016)
The following is the list of modifications:
1.
2.
Minor editorial corrections.
Updated the Product Identification System
page.
Revision A (December 2016)
• Original release of this document.
2016-2020 Microchip Technology Inc.
DS20005676F-page 33
MIC2127A
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
Device:
XX
X
-XX
Temperature Package Code Media Type
XXX
Qualification
MIC2127A: 75V, Synchronous Buck Controller Featuring
Adaptive On-Time Control
Temperature:
Y
= Industrial Temperature Grade
(-40°C to +125°C)
Package:
ML
=
16 Lead, 3x3 mm VQFN
Media Type:
TR
=
5000/reel
Qualification:
Blank
VAO
=
=
Standard Part
Automotive AEC-Q100 Qualified
2016-2020 Microchip Technology Inc.
Examples:
a)
MIC2127AYML-TR: 75V, Synchronous Buck
Controller Featuring Adaptive
On-Time Control, –40°C to
+125°C junction temperature
range, 16-LD VQFN
package, 5000/reel
b)
MIC2127AYML-TRVAO: 75V, Synchronous
Buck Controller Featuring
Adaptive On-Time Control,
Automotive AEC-Q100
Qualified, –40°C to +125°C
junction temperature range,
16-LD VQFN package,
5000/reel
DS20005676F-page 34
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,
flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,
Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,
PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,
Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,
SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA
are registered trademarks of Microchip Technology Incorporated in
the U.S.A. and other countries.
APT, ClockWorks, The Embedded Control Solutions Company,
EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load,
IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision
Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire,
SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,
TimePictra, TimeProvider, Vite, WinPath, and ZL are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2019, Microchip Technology Incorporated, All Rights Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
2016-2020 Microchip Technology Inc.
ISBN: 978-1-5224-5885-2
DS20005676F-page 35
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