MIC24056YJL-TR

MIC24056 12V, 12A High-Efficiency Buck Regulator SuperSwitcher II General Description Features • HyperLight Load efficiency – up to 80% at 10mA The Micrel MIC24056 is a constant-frequency, synchronous DC/DC buck regulator featuring adaptive on• Hyper Speed Control architecture enables time control architecture. The MIC24056 operates over a − High delta V operation (VIN = 19V and VOUT = 0.8V) supply range of 4.5V to 19V. It has an internal linear − Small output capacitance regulator which provides a regulated 5V to power the • Input voltage range: 4.5V to 19V internal control circuitry. MIC24056 operates at a constant 600kHz switching frequency in continuous-conduction • Output current up to 12A mode and can be used to provide up to 12A of output • Up to 95% efficiency current. The output voltage is adjustable down to 0.8V. • Adjustable output voltage from 0.8V to 5.5V ® Micrel’s HyperLight Load architecture provides the same • ±1% FB accuracy high efficiency and ultra-fast transient response as the • Any Capacitor™ stable − zero-to-high ESR Hyper Speed Control architecture under medium to • 600kHz switching frequency heavy loads, but also maintains high efficiency under light load conditions by transitioning to variable frequency, • Power good (PG) output discontinuous mode operation. • Foldback current-limit and “hiccup” mode short-circuit The MIC24056 offers a full suite of protection features to protection ensure protection of the IC during fault conditions. These • Safe start-up into pre-biased loads include undervoltage lockout to ensure proper operation • –40°C to +125°C junction temperature range under power-sag conditions, thermal shutdown, internal • Available in 28-pin 5mm × 6mm QFN package soft start to reduce the inrush current, foldback currentlimit and “hiccup” mode short-circuit protection. The Applications MIC24056 includes a power good (PG) output to allow simple sequencing. • Servers, work stations The 12A Hyper Speed Control part, MIC24055, is also • Routers, switches, and telecom equipment available on Micrel’s web site. • Base stations All support documentation can be found on Micrel’s web site at: www.micrel.com. ___________________________________________________________________________________________________________ Typical Application Efficiency (VIN = 12V) vs. Output Current 100 95 5.0V 3.3V 2.5V 1.8V 1.5V 1.2V 1.0V 0.9V 0.8V EFFICIENCY (%) 90 85 80 75 70 65 60 55 VIN = 12V 50 0 3 6 9 12 15 OUTPUT CURRENT (A) HyperLight Load is a registered trademark of Micrel, Inc. Hyper Speed Control, SuperSwitcher II, and Any Capacitor are trademarks of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com December 2012 M9999-121012-A Micrel, Inc. MIC24056 Ordering Information Part Number Switching Frequency MIC24056YJL 600kHz Voltage Package Adjustable 28-Pin 5mm × 6mm QFN Junction Temperature Range Lead Finish −40°C to +125°C Pb-Free Pin Configuration 28-Pin 5mm x 6mm QFN (JL) (Top View) Pin Description Pin Number Pin Name 1 PVDD 5V Internal Linear Regulator Output. PVDD supply is the power MOSFET gate drive supply voltage and created by internal LDO from VIN. When VIN < +5.5V, PVDD should be tied to PVIN pins. A 2.2µF ceramic capacitor from the PVDD pin to PGND (Pin 2) must be place next to the IC. 2, 5, 6, 7, 8, 21 PGND Power Ground. PGND is the ground path for the MIC24056 buck converter power stage. The PGND pins connect to the low-side N-Channel internal MOSFET gate drive supply ground, the sources of the MOSFETs, the negative terminals of input capacitors, and the negative terminals of output capacitors. The loop for the power ground should be as small as possible and separate from the signal ground (SGND) loop. 3 NC No Connect. 4, 9, 10, 11, 12 SW Switch Node Output. Internal connection for the high-side MOSFET source and low-side MOSFET drain. Due to the high-speed switching on this pin, the SW pin should be routed away from sensitive nodes. PVIN High-Side N-Internal MOSFET Drain Connection Input. The PVIN operating voltage range is from 4.5V to 19V. Input capacitors between the PVIN pins and the Power Ground (PGND) are required to keep the connection short. BST Boost Output. Bootstrapped voltage to the high-side N-channel MOSFET driver. A Schottky diode is connected between the PVDD pin and the BST pin. A boost capacitor of 0.1μF is connected between the BST pin and the SW pin. Adding a small resistor at the BST pin can slow down the turn-on time of high-side N-Channel MOSFETs. 13,14,15, 16,17,18,19 20 December 2012 Pin Function 2 M9999-121012-A Micrel, Inc. MIC24056 Pin Description (Continued) Pin Number Pin Name Pin Function Current Sense Input. The CS pin senses current by monitoring the voltage across the low-side MOSFET during the OFF-time. The current sensing is necessary for short circuit protection. In order to sense the current accurately, connect the low-side MOSFET drain to SW using a Kelvin connection. The CS pin is also the high-side MOSFET’s output driver return. 22 CS 23 SGND Signal Ground. SGND must be connected directly to the ground planes. Do not route the SGND pin to the PGND Pad on the top layer (see PCB Layout Guidelines for details). 24 FB Feedback Input. Input to the transconductance amplifier of the control loop. The FB pin is regulated to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the desired output voltage. 25 PG Power Good Output. Open Drain Output. The PG pin is externally tied with a resistor to VDD. A high output is asserted when VOUT > 92% of nominal. 26 EN Enable Input. A logic level control of the output. The EN pin is CMOS-compatible. Logic high = enable, logic low = shutdown. In the off state, supply current of the device is greatly reduced (typically 5µA). The EN pin should not be left floating. 27 VIN Power Supply Voltage Input. Requires bypass capacitor to SGND. VDD 5V Internal Linear Regulator Output. VDD supply is the power MOSFET gate drive supply voltage and the supply bus for the IC. VDD is created by internal LDO from VIN. When VIN < +5.5V, VDD should be tied to PVIN pins. A 1µF ceramic capacitor from the VDD pin to SGND pins must be place next to the IC. 28 December 2012 3 M9999-121012-A Micrel, Inc. MIC24056 Absolute Maximum Ratings(1) Operating Ratings(3) PVIN to PGND............................................... −0.3V to +29V VIN to PGND ................................................. −0.3V to PVIN PVDD, VDD to PGND ..................................... −0.3V to +6V VSW , VCS to PGND ............................. −0.3V to (PVIN +0.3V) VBST to VSW ........................................................ −0.3V to 6V VBST to PGND .................................................. −0.3V to 35V VFB, VPG to PGND ............................. −0.3V to (VDD + 0.3V) VEN to PGND ....................................... −0.3V to (VIN +0.3V) PGND to SGND............................................ −0.3V to +0.3V Junction Temperature .............................................. +150°C Storage Temperature (TS) ......................... −65°C to +150°C Lead Temperature (soldering, 10sec) ........................ 260°C (2) ESD Rating ................................................. ESD Sensitive Supply Voltage (PVIN, VIN) ............................ 4.5V to 19V PVDD, VDD Supply Voltage (PVDD, VDD) ..... 4.5V to 5.5V Enable Input (VEN) ................................................. 0V to VIN Junction Temperature (TJ) ........................ −40°C to +125°C Maximum Power Dissipation ...................................... Note 4 (4) Package Thermal Resistance 5mm x 6mm QFN-28 (θJA) ................................ 28°C/W 5mm x 6mm QFN-28 (θJC) ............................... 2.5°C/W Electrical Characteristics(5) PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate –40°C ≤ TJ ≤ +125°C. Parameter Condition Min. Typ. Max. Units 19 V Power Supply Input 4.5 Input Voltage Range (VIN, PVIN) Quiescent Supply Current VFB = 1.5V (non-switching) Shutdown Supply Current VEN = 0V 450 750 µA 5 10 µA VDD Supply Voltage VDD Output Voltage VIN = 7V to 19V, IDD = 40mA 4.8 5 5.4 V VDD UVLO Threshold VDD Rising 3.7 4.2 4.5 V VDD UVLO Hysteresis Dropout Voltage (VIN – VDD) 400 IDD = 25mA 380 mV 600 mV 5.5 V DC/DC Controller Output-Voltage Adjust Range (VOUT) 0.8 Reference Feedback Reference Voltage 0°C ≤ TJ ≤ 85°C (±1.0%) 0.792 0.8 0.808 –40°C ≤ TJ ≤ 125°C (±1.5%) 0.788 0.8 0.812 Load Regulation IOUT = 3A to 12A (Continuous Mode) 0.25 Line Regulation VIN = 4.5V to 19V 0.25 FB Bias Current VFB = 0.8V 50 V % % 500 nA Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5kΩ in series with 100pF. 3. The device is not guaranteed to function outside operating range. 4. PD(MAX) = (TJ(MAX) – TA)/ θJA, where θJA depends upon the printed circuit layout. A 5 square inch 4 layer, 0.62”, FR-4 PCB with 2oz finish copper weight per layer is used for the θJA. 5. Specification for packaged product only. 6. Measured in test mode. 7. The maximum duty-cycle is limited by the fixed mandatory off-time tOFF of typically 300ns. December 2012 4 M9999-121012-A Micrel, Inc. MIC24056 Electrical Characteristics(5) (Continued) PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C, unless noted. Bold values indicate −40°C ≤ TJ ≤ +125°C. Parameter Condition Min. Typ. Max. Units Enable Control 1.8 EN Logic Level High V 0.6 V 6 30 µA 600 750 kHz EN Logic Level Low EN Bias Current VEN = 12V Oscillator Switching Frequency (6) Maximum Duty Cycle (7) Minimum Duty Cycle 450 VFB = 0V 82 % VFB = 1.0V 0 % 300 ns 3 ms Minimum Off-Time Soft-Start Soft-Start time Short-Circuit Protection Current-Limit Threshold Short-Circuit Current VFB = 0.8V, TJ = 25°C 18.75 VFB = 0.8V, TJ = 125°C 17.36 21 38.5 38.5 A VFB = 0V 12 A Top-MOSFET RDS (ON) ISW = 3A 13 mΩ Bottom-MOSFET RDS (ON) ISW = 3A 5.3 Internal FETs mΩ SW Leakage Current VEN = 0V 60 VIN Leakage Current VEN = 0V 25 µA 95 %VOUT µA Power Good 85 PG Threshold Voltage Sweep VFB from Low to High PG Hysteresis Sweep VFB from High to Low 5.5 92 %VOUT PG Delay Time Sweep VFB from Low to High 100 µs PG Low Voltage Sweep VFB < 0.9 × VNOM, IPG = 1mA 70 TJ Rising 160 °C 15 °C 200 mV Thermal Protection Over-Temperature Shutdown Over-Temperature Shutdown Hysteresis December 2012 5 M9999-121012-A Micrel, Inc. MIC24056 Typical Characteristics VIN Operating Supply Current vs. Input Voltage 10 60 0.6 0.4 VOUT = 1.8V IOUT = 0A SWITCHING 0.2 VEN = 0V REN = OPEN 30 15 4 7 10 13 16 7 10 13 16 19 4 7 10 0.796 VOUT = 1.8V IOUT = 3A 25 0.5% 0.0% -0.5% 13 16 15 10 VOUT = 1.8V 0 4 19 20 5 VOUT = 1.8V IOUT = 3A to 12A -1.0% 0.792 7 10 13 16 4 19 7 10 Enable Input Current vs. Input Voltage Switching Frequency vs. Input Voltage 550 VOUT = 1.8V IOUT = 3A 12 8 4 95% 90% 85% VFB = 0.8V VEN = VIN 0 500 4 7 10 13 INPUT VOLTAGE (V) December 2012 16 19 19 100% VPG THRESHOLD/VREF (%) EN INPUT CURRENT (µA) 600 16 PG/VREF Ratio vs. Input Voltage 16 650 13 INPUT VOLTAGE (V) INPUT VOLTAGE (V) INPUT VOLTAGE (V) 700 19 30 CURRENT LIMIT (A) TOTAL REGULATION (%) 0.800 16 Output Current Limit vs. Input Voltage 1.0% 0.804 13 INPUT VOLTAGE (V) Total Regulation vs. Input Voltage 0.808 10 2 INPUT VOLTAGE (V) Feedback Voltage vs. Input Voltage 7 4 0 4 19 INPUT VOLTAGE (V) 4 6 VFB = 0.9V IDD = 10mA 0 0.0 FEEDBACK VOLTAGE (V) 8 45 VDD VOLTAGE (V) 0.8 SHUTDOWN CURRENT (µA) SUPPLY CURRENT (mA) 1.0 FREQUENCY (kHz) VDD Output Voltage vs. Input Voltage VIN Shutdown Current vs. Input Voltage 80% 4 7 10 13 INPUT VOLTAGE (V) 6 16 19 4 7 10 13 16 19 INPUT VOLTAGE (V) M9999-121012-A Micrel, Inc. MIC24056 Typical Characteristics (Continued) VIN Operating Supply Current vs. Temperature 5 14 VIN = 12V VOUT = 1.8V IOUT = 0A SWITCHING 1.0 0.5 VDD THRESHOLD (V) 1.5 RISING 12 SUPPLY CURRENT (µA) 10 8 6 4 VIN = 12V IOUT = 0A VEN = 0V 2 -50 -25 0 25 50 75 100 -50 125 -25 50 75 100 -50 125 0.800 VIN = 12V VOUT = 1.8V IOUT = 3A LOAD REGULATION (%) 0.804 0.792 25 50 0.5% 0.0% -0.5% VIN = 12V VOUT = 1.8V IOUT =3A to 12A 75 100 125 -25 0 25 50 75 100 -50 25 50 75 100 125 30 4 3 VIN = 12V VOUT = 1.8V IOUT = 0A 500 125 20 15 10 VIN = 12V VOUT = 1.8V 5 2 100 0 Output Current Limit vs. Temperature CURRENT LIMIT (A) VDD (V) 550 December 2012 -25 25 600 TEMPERATURE (°C) VIN = 4.5V to 19V VOUT = 1.8V IOUT = 3A TEMPERATURE (°C) 5 75 0.0% VDD vs. Temperature 650 50 125 0.1% 125 6 25 100 0.2% -0.1% VIN = 12V VOUT = 1.8V IOUT = 3A 0 75 0.3% TEMPERATURE (°C) 700 50 -0.2% -50 Switching Frequency vs. Temperature -25 25 0.4% TEMPERATURE (°C) -50 0 Line Regulation vs. Temperature -1.0% 0 -25 TEMPERATURE (°C) 1.0% -25 1 Load Regulation vs. Temperature 0.808 FEEBACK VOLTAGE (V) 25 0 Feedback Voltage vs. Temperature -50 2 TEMPERATURE (°C) TEMPERATURE (°C) 0.796 FALLING 3 0 0 0.0 4 HYST LINE REGULATION (%) SUPPLY CURRENT (mA) 2.0 FREQUENCY (kHz) VDD UVLO Threshold vs. Temperature VIN Shutdown Current vs. Temperature 0 -50 -25 0 25 50 75 TEMPERATURE (°C) 7 100 125 -50 -25 0 25 50 75 100 125 TEMPERATURE (°C) M9999-121012-A Micrel, Inc. MIC24056 Typical Characteristics (Continued) 1.0% 1.819 0.804 0.800 0.796 VIN = 12V VOUT = 1.8V LINE REGULATION (%) 1.814 OUTPUT VOLTAGE (V) 1.810 1.805 1.800 1.796 1.791 1.787 0 2 4 6 8 10 0 12 2 OUTPUT CURRENT (A) 4 6 8 10 0 12 OUTPUT VOLTAGE (V) 650 600 550 VIN = 12V VOUT = 1.8V 10.5 4.6 3.8 3.4 80 75 70 65 VIN = 5V 50 3 6 9 12 OUTPUT CURRENT (A) OUTPUT CURRENT (A) IC Power Dissipation (VIN = 5V) vs. Output Current Die Temperature* (VIN = 5V) vs. Output Current 15 0 3 6 9 12 15 OUTPUT CURRENT (A) Efficiency (VIN = 12V) vs. Output Current 100 100 VIN = 5V 95 3.0 VOUT = 3.3V 2.5 2.0 1.5 VOUT = 0.8V 1.0 60 40 20 3 6 9 12 80 75 70 65 55 0 OUTPUT CURRENT (A) 85 60 VIN = 5V VOUT = 1.8V 0.5 0.0 5.0V 3.3V 2.5V 1.8V 1.5V 1.2V 1.0V 0.9V 0.8V 90 80 EFFICIENCY (%) DIE TEMPERATURE (°C) POWER DISSIPATION (W) 85 60 3.5 0 12 3.3V 2.5V 1.8V 1.5V 1.2V 1.0V 0.9V 0.8V 90 TA 25ºC 85ºC 125º 0 4.0 10 95 4.2 12 8 100 VIN = 5V VFB < 0.8V 3.0 9 6 4 Efficiency (VIN = 5V) vs. Output Current 55 500 7.5 2 OUTPUT CURRENT (A) 5.0 6 VIN = 4.5V to 19V VOUT = 1.8V Output Voltage (VIN = 5V) vs. Output Current 700 4.5 -0.5% OUTPUT CURRENT (A) Switching Frequency vs. Output Current 3 0.0% -1.0% 1.782 0.792 0.5% VIN = 12V VOUT = 1.8V EFFICIENCY (%) FEEDBACK VOLTAGE (V) 0.808 FREQUENCY (kHz) Line Regulation vs. Output Current Output Voltage vs. Output Current Feedback Voltage vs. Output Current VIN = 12V 50 0 2 4 6 8 OUTPUT CURRENT (A) 10 12 0 3 6 9 12 15 OUTPUT CURRENT (A) Die Temperature* : The temperature measurement was taken at the hottest point on the MIC24056 case mounted on a 5 square inch 4 layer, 0.62 inch, FR-4 PCB with 2oz finish copper weight per layer; see Thermal Measurement section. Actual results will depend upon the size of the PCB, ambient temperature and proximity to other heat emitting components. December 2012 8 M9999-121012-A Micrel, Inc. MIC24056 Typical Characteristics (Continued) IC Power Dissipation (VIN = 12V) vs. Output Current Die Temperature* (VIN = 12V) vs. Output Current 4.5 100 VIN = 12V 3.5 DIE TEMPERATURE (°C) POWER DISSIPATION (W) 4.0 VOUT = 5V 3.0 2.5 2.0 1.5 VOUT = 0.8V 1.0 80 60 40 20 VIN = 12V VOUT = 1.8V 0.5 0 0.0 0 3 6 9 OUTPUT CURRENT (A) 12 0 2 4 6 8 10 12 OUTPUT CURRENT (A) Die Temperature* : The temperature measurement was taken at the hottest point on the MIC24056 case mounted on a 5 square inch 4 layer, 0.62 inch, FR-4 PCB with 2oz finish copper weight per layer; see Thermal Measurement section. Actual results will depend upon the size of the PCB, ambient temperature and proximity to other heat emitting components. December 2012 9 M9999-121012-A Micrel, Inc. MIC24056 Functional Characteristics December 2012 10 M9999-121012-A Micrel, Inc. MIC24056 Functional Characteristics (Continued) December 2012 11 M9999-121012-A Micrel, Inc. MIC24056 Functional Characteristics (Continued) December 2012 12 M9999-121012-A Micrel, Inc. MIC24056 Functional Diagram Figure 1. MIC24056 Block Diagram December 2012 13 M9999-121012-A Micrel, Inc. MIC24056 The maximum duty cycle is obtained from the 300ns tOFF(min): Functional Description The MIC24056 is an adaptive ON-time synchronous step-down DC/DC regulator with an internal 5V linear regulator and a power good (PG) output. It is designed to operate over a wide input voltage range from 4.5V to 19V and provides a regulated output voltage at up to 12A of output current. An adaptive ON-time control scheme is employed in to obtain a constant switching frequency and to simplify the control compensation. Over-current protection is implemented without the use of an external sense resistor. The device includes an internal soft-start function which reduces the power supply input surge current at start-up by controlling the output voltage rise time. Dmax = Continuous Mode In continuous mode, the output voltage is sensed by the MIC24056 feedback pin FB via the voltage divider R1 and R2, and compared to a 0.8V reference voltage VREF at the error comparator through a low gain transconductance (gm) amplifier. If the feedback voltage decreases and the output of the gm amplifier is below 0.8V, then the error comparator will trigger the control logic and generate an ON-time period. The ON-time period length is predetermined by the “FIXED tON ESTIMATION” circuitry: VOUT VIN × 600kHz Eq. 1 where VOUT is the output voltage and VIN is the power stage input voltage. At the end of the ON-time period, the internal high-side driver turns off the high-side MOSFET and the low-side driver turns on the low-side MOSFET. The OFF-time period length depends upon the feedback voltage in most cases. When the feedback voltage decreases and the output of the gm amplifier is below 0.8V, the ON-time period is triggered and the OFF-time period ends. If the OFF-time period determined by the feedback voltage is less than the minimum OFF-time tOFF(MIN), which is about 300ns, then the MIC24056 control logic will apply the tOFF(MIN) instead. tOFF(MIN) is required to maintain enough energy in the boost capacitor (CBST) to drive the highside MOSFET. December 2012 tS = 1- 300ns tS Eq. 2 where tS = 1/600kHz = 1.66µs. It is not recommended to use the MIC24056 with a OFFtime close to tOFF(MIN) during steady-state operation. Also, as VOUT increases, the internal ripple injection will increase and reduce the line regulation performance. Therefore, the maximum output voltage of the MIC24056 should be limited to 5.5V and the maximum external ripple injection should be limited to 200mV. Please refer to “Setting Output Voltage” subsection in Application Information for more details. The actual ON-time and resulting switching frequency will vary with the part-to-part variation in the rise and fall times of the internal MOSFETs, the output load current, and variations in the VDD voltage. Also, the minimum tON results in a lower switching frequency in high VIN to VOUT applications, such as 18V to 1.0V. The minimum tON measured on the MIC24056 evaluation board is about 100ns. During load transients, the switching frequency is changed due to the varying OFF-time. To illustrate the control loop operation, both the steadystate and load transient scenarios will be analyzed. Figure 2 shows the MIC24056 control loop timing during steady-state operation. During steady-state, the gm amplifier senses the feedback voltage ripple, which is proportional to the output voltage ripple and the inductor current ripple, to trigger the ON-time period. The ONtime is predetermined by the tON estimator. The termination of the OFF-time is controlled by the feedback voltage. At the valley of the feedback voltage ripple, which occurs when VFB falls below VREF, the OFF period ends and the next ON-time period is triggered through the control logic circuitry. Theory of Operation The MIC24056 is able to operate in either continuous mode or discontinuous mode. The operating mode is determined by the output of the zero cross comparator (ZC) as shown in Figure 1. t ON(estimated) = t S - t OFF(min) 14 M9999-121012-A Micrel, Inc. MIC24056 Unlike true current-mode control, the MIC24056 uses the output voltage ripple to trigger an ON-time period. The output voltage ripple is proportional to the inductor current ripple if the ESR of the output capacitor is large enough. The MIC24056 control loop has the advantage of eliminating the need for slope compensation. In order to meet the stability requirements, the MIC24056 feedback voltage ripple should be in phase with the inductor current ripple and large enough to be sensed by the gm amplifier and the error comparator. The recommended feedback voltage ripple is 20mV~100mV. If a low-ESR output capacitor is selected, then the feedback voltage ripple may be too small to be sensed by the gm amplifier and the error comparator. Also, the output voltage ripple and the feedback voltage ripple are not necessarily in phase with the inductor current ripple if the ESR of the output capacitor is very low. In these cases, ripple injection is required to ensure proper operation. Please refer to “Ripple Injection” subsection in Application Information for more details about the ripple injection technique. Figure 2. MIC24056 Control Loop Timing Figure 3 shows the operation of the MIC24056 during a load transient. The output voltage drops due to the sudden load increase, which causes the VFB to be less than VREF. This will cause the error comparator to trigger an ON-time period. At the end of the ON-time period, a minimum OFF-time tOFF(MIN) is generated to charge CBST since the feedback voltage is still below VREF. Then, the next ON-time period is triggered due to the low feedback voltage. Therefore, the switching frequency changes during the load transient, but returns to the nominal fixed frequency once the output has stabilized at the new load current level. With the varying duty cycle and switching frequency, the output recovery time is fast and the output voltage deviation is small in MIC24056 converter. Discontinuous Mode In continuous mode, the inductor current is always greater than zero; however, at light loads the MIC24056 is able to force the inductor current to operate in discontinuous mode. Discontinuous mode is where the inductor current falls to zero, as indicated by trace (IL) shown in Figure 4. During this period, the efficiency is optimized by shutting down all the non-essential circuits and minimizing the supply current. The MIC24056 wakes up and turns on the high-side MOSFET when the feedback voltage VFB drops below 0.8V. The MIC24056 has a zero crossing comparator that monitors the inductor current by sensing the voltage drop across the low-side MOSFET during its ON-time. If the VFB > 0.8V and the inductor current goes slightly negative, then the MIC24056 automatically powers down most of the IC circuitry and goes into a low-power mode. Once the MIC24056 goes into discontinuous mode, both LSD and HSD are low, which turns off the high-side and low-side MOSFETs. The load current is supplied by the output capacitors and VOUT drops. If the drop of VOUT causes VFB to go below VREF, then all the circuits will wake up into normal continuous mode. First, the bias currents of most circuits reduced during the discontinuous mode are restored, and then a tON pulse is triggered before the drivers are turned on to avoid any possible glitches. Finally, the high-side driver is turned on. Figure 4 shows the control loop timing in discontinuous mode. Figure 3. MIC24056 Load Transient Response December 2012 15 M9999-121012-A Micrel, Inc. MIC24056 Current Limit The MIC24056 uses the RDS(ON) of the internal low-side power MOSFET to sense over-current conditions. This method will avoid adding cost, board space and power losses taken by a discrete current sense resistor. The low-side MOSFET is used because it displays much lower parasitic oscillations during switching than the high-side MOSFET. In each switching cycle of the MIC24056 converter, the inductor current is sensed by monitoring the low-side MOSFET in the OFF period. If the inductor current is greater than 21A, then the MIC24056 turns off the highside MOSFET and a soft-start sequence is triggered. This mode of operation is called “hiccup mode” and its purpose is to protect the downstream load in case of a hard short. The load current-limit threshold has a fold back characteristic related to the feedback voltage as shown in Figure 5. Figure 4. MIC24056 Control Loop Timing (Discontinuous Mode) During discontinuous mode, the zero crossing comparator and the current limit comparator are turned off. The bias current of most circuits are reduced. As a result, the total power supply current during discontinuous mode is only about 450µA, allowing the MIC24056 to achieve high efficiency in light load applications. VDD Regulator The MIC24056 provides a 5V regulated output for input voltage VIN ranging from 5.5V to 19V. When VIN < 5.5V, VDD should be tied to PVIN pins to bypass the internal linear regulator. Soft-Start Soft-start reduces the power supply input surge current at startup by controlling the output voltage rise time. The input surge appears while the output capacitor is charged up. A slower output rise time will draw a lower input surge current. The MIC24056 implements an internal digital soft-start by making the 0.8V reference voltage VREF ramp from 0 to 100% in about 3ms with 9.7mV steps. Therefore, the output voltage is controlled to increase slowly by a staircase VFB ramp. Once the soft-start cycle ends, the related circuitry is disabled to reduce current consumption. VDD must be powered up at the same time or after VIN to make the soft-start function correctly. December 2012 Figure 5. MIC24056 Current-Limit Foldback Characteristic Power Good (PG) The power good (PG) pin is an open drain output which indicates logic high when the output is nominally 92% of its steady state voltage. A pull-up resistor of more than 10kΩ should be connected from PG to VDD. 16 M9999-121012-A Micrel, Inc. MIC24056 MOSFET Gate Drive The block diagram (Figure 1) shows a bootstrap circuit, consisting of D1 (a Schottky diode is recommended) and CBST. This circuit supplies energy to the high-side drive circuit. Capacitor CBST is charged, while the low-side MOSFET is on, and the voltage on the SW pin is approximately 0V. When the high-side MOSFET driver is turned on, energy from CBST is used to turn the MOSFET on. As the high-side MOSFET turns on, the voltage on the SW pin increases to approximately VIN. Diode D1 is reverse biased and CBST floats high while continuing to keep the high-side MOSFET on. The bias current of the high-side driver is less than 10mA so a 0.1μF to 1μF is sufficient to hold the gate voltage with minimal droop for the power stroke (high-side switching) cycle, i.e. ΔBST = 10mA x 1.67μs/0.1μF = 167mV. When the low-side MOSFET is turned back on, CBST is then recharged through D1. A small resistor RG, which is in series with CBST, can be used to slow down the turn-on time of the high-side N-channel MOSFET. The drive voltage is derived from the VDD supply voltage. The nominal low-side gate drive voltage is VDD and the nominal high-side gate drive voltage is approximately VDD – VDIODE, where VDIODE is the voltage drop across D1. An approximate 30ns delay between the high-side and low-side driver transitions is used to prevent current from simultaneously flowing unimpeded through both MOSFETs. December 2012 17 M9999-121012-A Micrel, Inc. MIC24056 Maximizing efficiency requires the proper selection of core material and minimizing the winding resistance. The high frequency operation of the MIC24056 requires the use of ferrite materials for all but the most cost sensitive applications. Lower cost iron powder cores may be used but the increase in core loss will reduce the efficiency of the power supply. This is especially noticeable at low output power. The winding resistance decreases efficiency at the higher output current levels. The winding resistance must be minimized although this usually comes at the expense of a larger inductor. The power dissipated in the inductor is equal to the sum of the core and copper losses. At higher output loads, the core losses are usually insignificant and can be ignored. At lower output currents, the core losses can be a significant contributor. Core loss information is usually available from the magnetics vendor. Copper loss in the inductor is calculated by Equation 7: Application Information Inductor Selection Values for inductance, peak, and RMS currents are required to select the output inductor. The input and output voltages and the inductance value determine the peak-to-peak inductor ripple current. Generally, higher inductance values are used with higher input voltages. Larger peak-to-peak ripple currents will increase the power dissipation in the inductor and MOSFETs. Larger output ripple currents will also require more output capacitance to smooth out the larger ripple current. Smaller peak-to-peak ripple currents require a larger inductance value and therefore a larger and more expensive inductor. A good compromise between size, loss and cost is to set the inductor ripple current to be equal to 20% of the maximum output current. The inductance value is calculated by Equation 3: 2 L= PINDUCTOR(Cu) = IL(RMS) × RWINDING VOUT × (VIN(max) − VOUT ) VIN(max) × fsw × 20% × IOUT(max) Eq. 3 The resistance of the copper wire, RWINDING, increases with the temperature. The value of the winding resistance used should be at the operating temperature. where: fSW = switching frequency, 600kHz 20% = ratio of AC ripple current-to-DC output current VIN(max) = maximum power stage input voltage The peak-to-peak inductor current ripple is: ∆IL(pp) = VOUT × (VIN(max) − VOUT ) VIN(max) × fsw × L PWINDING(Ht) = RWINDING(20°C) × (1 + 0.0042 × Eq. 8 (TH – T20°C)) where: TH = temperature of wire under full load T20°C = ambient temperature RWINDING(20°C) = room temperature winding resistance (usually specified by the manufacturer) Eq. 4 The peak inductor current is equal to the average output current plus one half of the peak-to-peak inductor current ripple. IL(pk) = IOUT(max) + 0.5 × ΔIL(pp) Output Capacitor Selection The type of the output capacitor is usually determined by its equivalent series resistance (ESR). Voltage and RMS current capability are two other important factors for selecting the output capacitor. Recommended capacitor types are tantalum, low-ESR aluminum electrolytic, OSCON and POSCAP. The output capacitor’s ESR is usually the main cause of the output ripple. The output capacitor ESR also affects the control loop from a stability point of view. Eq. 5 2 The RMS inductor current is used to calculate the I R losses in the inductor. 2 IL(RMS) = IOUT(max) + December 2012 ΔIL(PP) 12 Eq. 7 2 Eq. 6 18 M9999-121012-A Micrel, Inc. MIC24056 Input Capacitor Selection The input capacitor for the power stage input VIN should be selected for ripple current rating and voltage rating. Tantalum input capacitors may fail when subjected to high inrush currents, caused by turning the input supply on. A tantalum input capacitor’s voltage rating should be at least two times the maximum input voltage to maximize reliability. Aluminum electrolytic, OS-CON, and multilayer polymer film capacitors can handle the higher inrush currents without voltage de-rating. The input voltage ripple will primarily depend on the input capacitor’s ESR. The peak input current is equal to the peak inductor current, so: The maximum value of ESR is calculated: ESR COUT ≤ ΔVOUT(pp) Eq. 9 ΔIL(PP) where: ΔVOUT(pp) = peak-to-peak output voltage ripple ΔIL(PP) = peak-to-peak inductor current ripple The total output ripple is a combination of the ESR and output capacitance. The total ripple is calculated by Equation 10: 2 ΔVOUT(pp) ΔIL(PP)    + ΔIL(PP) × ESR C =  OUT  C × f × 8 OUT SW   ( ΔVIN = IL(pk) × ESRCIN )2 The input capacitor must be rated for the input current ripple. The RMS value of input capacitor current is determined at the maximum output current. Assuming the peak-to-peak inductor current ripple is low: Eq. 10 where: D = Duty cycle COUT = Output capacitance value fSW = Switching frequency ICIN(RMS) ≈ IOUT(max) × D × (1 − D) ΔIL(PP) Eq. 14 The power dissipated in the input capacitor is: As described in the “Theory of Operation” subsection in the Functional Description section, the MIC24056 requires at least 20mV peak-to-peak ripple at the FB pin to make the gm amplifier and the error comparator behave properly. Also, the output voltage ripple should be in phase with the inductor current. Therefore, the output voltage ripple caused by the output capacitors value should be much smaller than the ripple caused by the output capacitor ESR. If low-ESR capacitors, such as ceramic capacitors, are selected as the output capacitors, a ripple injection method should be applied to provide enough feedback voltage ripple. Please refer to the “Ripple Injection” subsection for more details. The voltage rating of the capacitor should be twice the output voltage for a tantalum and 20% greater for aluminum electrolytic or OS-CON. The output capacitor RMS current is calculated by Equation 11: ICOUT (RMS) = Eq. 13 2 PDISS(CIN) = ICIN(RMS) × ESRCIN Eq. 15 Ripple Injection The VFB ripple required for proper operation of the MIC24056 gm amplifier and error comparator is 20mV to 100mV. However, the output voltage ripple is generally designed as 1% to 2% of the output voltage. For a low output voltage, such as a 1V, the output voltage ripple is only 10mV to 20mV, and the feedback voltage ripple is less than 20mV. If the feedback voltage ripple is so small that the gm amplifier and error comparator can’t sense it, then the MIC24056 will lose control and the output voltage is not regulated. In order to have some amount of VFB ripple, a ripple injection method is applied for low output voltage ripple applications. Eq. 11 12 The power dissipated in the output capacitor is: 2 PDISS(COUT ) = ICOUT (RMS) × ESR COUT December 2012 Eq. 12 19 M9999-121012-A Micrel, Inc. MIC24056 The applications are divided into three situations according to the amount of the feedback voltage ripple: 1. Enough ripple at the feedback voltage due to the large ESR of the output capacitors. As shown in Figure 6, the converter is stable without any ripple injection. The feedback voltage ripple is: ΔVFB(pp) = R2 × ESR COUT × ΔIL (pp) R1 + R2 Figure 8. Invisible Ripple at FB Eq. 16 In this situation, the output voltage ripple is less than 20mV. Therefore, additional ripple is injected into the FB pin from the switching node SW via a resistor Rinj and a capacitor Cinj, as shown in Figure 8. The injected ripple is: where ΔIL(pp) is the peak-to-peak value of the inductor current ripple. 2. Inadequate ripple at the feedback voltage due to the small ESR of the output capacitors. ΔVFB(pp) = VIN × K div × D × (1 - D) × The output voltage ripple is fed into the FB pin through a feedforward capacitor Cff in this situation, as shown in Figure 7. The typical Cff value is between 1nF and 100nF. With the feedforward capacitor, the feedback voltage ripple is very close to the output voltage ripple: ΔVFB(pp) ≈ ESR × ΔIL (pp) 1 fSW × τ Eq. 18 K div = Eq. 17 R1//R2 R inj + R1//R2 Eq. 19 where VIN = Power stage input voltage D = Duty cycle fSW = Switching frequency τ = (R1//R2//Rinj) × Cff 3. Virtually no ripple at the FB pin voltage due to the very-low ESR of the output capacitors. In Equations 18 and 19, it is assumed that the time constant associated with Cff must be much greater than the switching period: 1 fSW × τ Figure 6. Enough Ripple at FB = T τ