MIC4423/4/5
Dual 3A Peak Low-Side MOSFET Drivers
Features
General Description
• Reliable, Low-Power Bipolar/CMOS/DMOS
Construction
• Latch-Up Protected to >500 mA Reverse Current
• Logic Input withstands Swing to –5V
• High 3A Peak Output Current
• Wide 4.5V to 18V Operating Range
• Drives 1800 pF Capacitance in 25 ns
• Short 500
—
—
mA
—
High Output Voltage
VOH
Low Output Voltage
VOL
Output Resistance HI State
RO
Output Resistance LO State
Peak Output Resistance
Latch-Up Protection Withstand
Reverse Current
2022 Microchip Technology Inc. and its subsidiaries
DS20006638A-page 3
MIC4423/4/5
Electrical Characteristics: 4.5V ≤ VS ≤ 18V; TA = +25°C, Bold values indicate –40°C ≤ TA ≤ +85°C; unless
otherwise specified. Specifications for packaged product only.
Parameter
Symbol
Min.
Typ.
Max.
Units
Conditions
Switching Time (Switching times guaranteed by design)
Rise Time
tR
Fall time
tF
tD1
Delay Time
tD2
Pulse Width
Power Supply
Power Supply Current
DS20006638A-page 4
tPW
IS
—
23
35
—
28
60
—
25
35
—
32
60
—
33
75
—
32
100
—
38
75
—
38
100
400
—
—
—
ns
Figure 1-1, CL = 1800 pF
ns
Figure 1-1, CL = 1800 pF
ns
Figure 1-1, CL = 1800 pF
ns
Figure 1-1, CL = 1800 pF
—
ns
Figure 1-1
—
2.5
3.5
mA
VIN = 3.0V (both inputs)
—
0.25
0.3
mA
VIN = 0.0V (both inputs)
2022 Microchip Technology Inc. and its subsidiaries
MIC4423/4/5
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Storage Temperature Range
TS
–65
—
+150
°C
—
Lead Temperature
TA
—
—
+300
°C
—
Thermal Resistance DIP
JA
—
130
—
—
Thermal Resistance DIP
JC
—
42
—
—
Thermal Resistance Wide-SOIC
JA
—
120
—
Thermal Resistance Wide-SOIC
JC
—
75
—
Thermal Resistance SOIC
JA
—
120
—
—
Thermal Resistance SOIC
JC
—
75
—
—
Temperature Ranges
Package Thermal Resistances
Note 1:
°C/W
—
—
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA).
Test Circuit
VS = 18V
INPUT
5V
90%
2.5V
tP W 0.5μs
10%
0V
VS
90%
tD1
tP W
tF
tD2
tR
0.1μF
INA
OUTA
A
MIC4423
OUTPUT
INB
B
1800pF
OUTB
1800pF
10%
0V
FIGURE 1-1:
4.7μF
Inverting Driver Switching Time.
VS = 18V
INPUT
5V
90%
2.5V
tP W 0.5μs
10%
0V
VS
90%
tD1
tP W
tR
tD2
tF
INA
A
MIC4424
OUTPUT
INB
B
4.7μF
OUTA
1800pF
OUTB
1800pF
10%
0V
FIGURE 1-2:
0.1μF
Non-Inverting Driver Switching Time.
2022 Microchip Technology Inc. and its subsidiaries
DS20006638A-page 5
MIC4423/4/5
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
100
100
4700pF
80
80
3300pF
60
TFALL (ns)
TRISE (ns)
1800pF
1000pF
2200pF
40
5V
60
12V
40
18V
20
20
470pF
0
4
6
8
FIGURE 2-1:
Voltage.
10 12 14
VSUPPLY (V)
16
18
Rise Time vs. Supply
0
100
FIGURE 2-4:
Load.
VS = 18V
CLOAD = 1800pF
4700pF
80
30
TFALL (ns)
3300pF
60
1000pF
20
2200pF
40
TF
TIME (ns)
1800pF
10000
Fall Time vs. Capacitive
40
100
1000
CLOAD (pF)
T
R
10
20
470pF
0
4
6
FIGURE 2-2:
Voltage.
8
10 12 14
VSUPPLY (V)
16
0
-75
-30
15
60
105 150
-81&7,217(03(5$785(Û&
18
Fall Time vs. Supply
FIGURE 2-5:
Temperature.
100
50
5V
12V
40
20
0
100
FIGURE 2-3:
Load.
DS20006638A-page 6
TD2
30
TD1
20
10
18V
1000
CLOAD (pF)
VS = 18V
CLOAD = 1800pF
40
T (ns)
TRISE (ns)
80
60
Rise and Fall Time vs.
10000
Rise Time vs. Capacitive
0
FIGURE 2-6:
Amplitude.
0
2
4
6
8
INPUT (V)
10
12
Propagation Delay vs. Input
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MIC4423/4/5
Supply Current vs.
ISUPPLY (mA)
100
VSUPPLY = 18V
90
80
10000pF
70
60
50
1000pF
3300pF
40
100pF
30
20
10
0
10
100
1000
FREQUENCY (kHz)
FIGURE 2-8:
Frequency.
Supply Current vs.
ISUPPLY (mA)
100
V
= 12V
90 SUPPLY
80
2MHz
70
60
500kHz
50
40
30
20kHz
20
100kHz
10
0
100
1000
10000
CLOAD (pF)
FIGURE 2-9:
Capacitive Load.
Supply Current vs.
2022 Microchip Technology Inc. and its subsidiaries
ISUPPLY (mA)
FIGURE 2-10:
Frequency.
Supply Current vs.
100
V
= 5V
90 SUPPLY
80
70
60
2MHz
50
40
30
100kHz
500kHz
20
10
0
100
1000
10000
CLOAD (pF)
ISUPPLY (mA)
FIGURE 2-7:
Capacitive Load.
100
VSUPPLY = 12V
90
80
10000pF
70
60
50
1000pF
40
100pF
3300pF
30
20
10
0
10
100
1000
FREQUENCY (kHz)
FIGURE 2-11:
Capacitive Load.
Supply Current vs.
100
VSUPPLY = 5V
90
80
10000pF
70
4700pF
60
50
2200pF
40
1000pF
30
100pF
20
10
0
10
100
1000
FREQUENCY (kHz)
ISUPPLY (mA)
ISUPPLY (mA)
100
VSUPPLY = 18V
90
80
70
60
500kHz
50
40
20kHz
30
100kHz
20
10
0
100
1000
10000
CLOAD (pF)
FIGURE 2-12:
Frequency.
Supply Current vs.
DS20006638A-page 7
MIC4423/4/5
60
1.4
CLOAD = 2200 pF
1.2
IQUIESCENT (mA)
50
40
T (ns)
TD2
30
TD1
20
10
0
1.0
INPUTS = 1
0.8
0.6
0.4
INPUTS = 0
0.2
4
6
FIGURE 2-13:
Voltage.
60
8
10 12 14
VSUPPLY (V)
16
0
-55
18
Delay Time vs. Supply
-25 5
35 65 95
7(03(5$785(Û&
FIGURE 2-16:
Temperature.
125
Quiescent Current vs.
6
&LOAD = 2200 pF
5
RDS(ON) ()
50
40
T (ns)
TD2
30
TD1
20
4
125ÛC
3
25ÛC
2
1
10
0
-55
0
-25 5
35 65 95
7(03(5$785(Û&
FIGURE 2-14:
Temperature.
125
4
6
8
10 12 14
VSUPPLY (V)
16
18
FIGURE 2-17:
Output Resistance (Output
High) vs. Supply Voltage.
Delay Time vs.
6
10
TJ = 25ÛC
5
BOTH INPUTS = 1
1
RDS(ON) ()
IQUIESCENT (mA)
VS = 10V
BOTH INPUTS = 0
0.1
125ÛC
4
25ÛC
3
2
1
0.01
0
4
6
FIGURE 2-15:
vs. Voltage.
DS20006638A-page 8
8
10
12 14
VSUPPLY (V)
16
18
Quiescent Supply Current
4
6
8
10 12 14
VSUPPLY (V)
16
18
FIGURE 2-18:
Output Resistance (Output
Low) vs. Supply Voltage.
2022 Microchip Technology Inc. and its subsidiaries
MIC4423/4/5
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Pin Number
DIP, SOIC
Pin Number
Wide SOIC
Pin
Name
2, 4
2, 7
INA/B
Control Input.
3
4, 5
GND
Ground: Duplicate pins must be externally connected
together.
6
12, 13
VS
7, 5
14, 15, 10, 11
OUTA/B
1, 8
1, 3, 6, 8, 9, 16
NC
Description
Supply Input: Duplicate pins must be externally connected
together.
Output: Duplicate pins must be externally connected
together.
Not connected.
Device Configuration
MIC4423xN/M
MIC4423xWM
INA 2
A
7 OUTA
INA 2
INB 4
B
5 OUTB
INB 7
MIC4424xN/M
B
10 OUTB
11 OUTB
MIC4423xWM
A
7 OUTA
INA 2
INB 4
B
5 OUTB
INB 7
A
14 OUTA
15 OUTA
B
10 OUTB
11 OUTB
MIC4423xWM
INA 2
A
7 OUTA
INA 2
INB 4
B
5 OUTB
INB 7
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14 OUTA
15 OUTA
INA 2
MIC4425xN/M
A
A
14 OUTA
15 OUTA
B
10 OUTB
11 OUTB
DS20006638A-page 9
MIC4423/4/5
4.0
APPLICATION INFORMATION
Although the MIC4423/4/5 drivers have been
specifically constructed to operate reliably under any
practical circumstances. There are, nonetheless,
details of usage that will provide better operation of the
device.
4.1
Supply Bypassing
Charging and discharging large capacitive loads
quickly requires large currents. For example, charging
2000 pF from 0 to 15 volts in 20 ns requires a constant
current of 1.5A. In practice, the charging current is not
constant, and will usually peak at around 3A. In order
to charge the capacitor, the driver must be capable of
drawing this much current, this quickly, from the system
power supply. In turn, this means that as far as the
driver is concerned, the system power supply, as seen
by the driver, must have a very low impedance.
As a practical matter, this means that the power supply
bus must be capacitively bypassed at the driver with at
least 100X the load capacitance in order to achieve
optimum driving speed. It also implies that the
bypassing capacitor must have very low internal
inductance and resistance at all frequencies of interest.
Generally, this means using two capacitors, one a
high-performance low ESR film, the other a low internal
resistance ceramic, as together the valleys in their two
impedance curves allow adequate performance over a
broad enough band to get the job done. Many film
capacitors can be sufficiently inductive as to be useless
for this service. Likewise, many multilayer ceramic
capacitors have unacceptably high internal resistance.
Use capacitors intended for high pulse current service.
The high pulse current demands of capacitive drivers
also mean that the bypass capacitors must be mounted
very close to the driver in order to prevent the effects of
lead inductance or PCB land inductance from nullifying
what you are trying to accomplish. For optimum results
the sum of the lengths of the leads and the lands from
the capacitor body to the driver body should total
2.5 cm or less.
Bypass capacitance, and its close mounting to the
driver serves two purposes. Not only does it allow
optimum performance from the driver, it minimizes the
amount of lead length radiating at high frequency
during switching, (due to the large ΔI) thus minimizing
the amount of EMI later available for system disruption
and subsequent cleanup. It should also be noted that
the actual frequency of the EMI produced by a driver is
not the clock frequency at which it is driven, but is
related to the highest rate of change of current
produced during switching, a frequency generally one
or two orders of magnitude higher, and thus more
difficult to filter if you let it permeate your system. Good
bypassing practice is essential for proper
operation of high speed driver ICs.
DS20006638A-page 10
4.2
Grounding
Both proper bypassing and proper grounding are
necessary for optimum driver operation. Bypassing
capacitance only allows a driver to turn the load ON.
Eventually (except in rare circumstances) it is also
necessary to turn the load OFF. This requires attention
to the ground path. Two things other than the driver
affect the rate at which it is possible to turn a load off:
The adequacy of the grounding available for the driver,
and the inductance of the leads from the driver to the
load. The latter will be discussed in a separate section.
Best practice for a ground path is obviously a well laid
out ground plane. However, this is not always practical,
and a poorly-laid out ground plane can be worse than
none.Attention to the paths taken by return currents
even in a ground plane is essential. In general, the
leads from the driver to its load, the driver to the power
supply, and the driver to whatever is driving it should all
be as low in resistance and inductance as possible. Of
the three paths, the ground lead from the driver to the
logic driving it is most sensitive to resistance or
inductance, and ground current from the load are what
is most likely to cause disruption. Thus, these ground
paths should be arranged so that they never share a
land, or do so for as short a distance as is practical.
To illustrate what can happen, consider the following:
The inductance of a 2 cm long land, 1.59 mm (0.062")
wide on a PCB with no ground plane is approximately
45 nH. Assuming a dl/dt of 0.3 A/ns (which will allow a
current of 3A to flow after 10 ns, and is thus slightly
slow for our purposes) a voltage of 13.5 volts will
develop along this land in response to our postulated
ΔI. For a 1 cm land, (approximately 15 nH) 4.5 volts is
developed. Either way, anyone using TTL level input
signals to the driver will find that the response of their
driver has been seriously degraded by a common
ground path for input to and output from the driver of
the given dimensions. Note that this is before
accounting for any resistive drops in the circuit. The
resistive drop in a 1.59 mm (0.062") land of 2 oz.
Copper carrying 3A will be about 4 mV/cm (10 mV/in)
at DC, and the resistance will increase with frequency
as skin effect comes into play.
The problem is most obvious in inverting drivers where
the input and output currents are in phase so that any
attempt to raise the driver’s input voltage (in order to
turn the driver’s load off) is countered by the voltage
developed on the common ground path as the driver
attempts to do what it was supposed to. It takes very
little common ground path, under these circumstances,
to alter circuit operation drastically.
2022 Microchip Technology Inc. and its subsidiaries
MIC4423/4/5
4.3
Output Lead Inductance
The same descriptions just given for PCB land
inductance apply equally well for the output leads from
a driver to its load, except that commonly the load is
located much further away from the driver than the
driver’s ground bus.
Generally, the best way to treat the output lead
inductance problem, when distances greater than 4 cm
(2") are involved, requires treating the output leads as
a transmission line. Unfortunately, as both the output
impedance of the driver and the input impedance of the
MOSFET gate are at least an order of magnitude lower
than the impedance of common coax, using coax is
seldom a cost-effective solution. A twisted pair works
about as well, is generally lower in cost, and allows use
of a wider variety of connectors. The second wire of the
twisted pair should carry common from as close as
possible to the ground pin of the driver directly to the
ground terminal of the load. Do not use a twisted pair
where the second wire in the pair is the output of the
other driver, as this will not provide a complete current
path for either driver. Likewise, do not use a twisted
triad with two outputs and a common return unless both
of the loads to be driver are mounted extremely close
to each other, and you can guarantee that they will
never be switching at the same time.
For output leads on a printed circuit, the general rule is
to make them as short and as wide as possible. The
lands should also be treated as transmission lines: i.e.
minimize sharp bends, or narrowings in the land, as
these will cause ringing. For a rough estimate, on a
1.59 mm (0.062") thick G-10 PCB a pair of opposing
lands each 2.36 mm (0.093") wide translates to a
characteristic impedance of about 50Ω. Half that width
suffices on a 0.787 mm (0.031") thick board. For
accurate impedance matching with a MIC4423/24/25
driver, on a 1.59 mm (0.062") board a land width of
42.75 mm (1.683") would be required, due to the low
impedance of the driver and (usually) its load. This is
obviously impractical under most circumstances.
Generally the trade-off point between lands and wires
comes when lands narrower than 3.18 mm (0.125")
would be required on a 1.59 mm (0.062") board.
To obtain minimum delay between the driver and the
load, it is considered best to locate the driver as close
as possible to the load (using adequate bypassing).
Using matching transformers at both ends of a piece of
coax, or several matched lengths of coax between the
driver and the load, works in theory, but is not optimum.
4.4
Driving at Controlled Rates
Occasionally there are situations where a controlled
rise or fall time (which may be considerably longer than
the normal rise or fall time of the driver’s output) is
desired for a load. In such cases it is still prudent to
employ best possible practice in terms of bypassing,
grounding and PCB layout, and then reduce the
2022 Microchip Technology Inc. and its subsidiaries
switching speed of the load (not the driver) by adding a
non-inductive series resistor of appropriate value
between the output of the driver and the load. For
situations where only rise or only fall should be slowed,
the resistor can be paralleled with a fast diode so that
switching in the other direction remains fast. Due to the
Schmitt trigger action of the driver’s input it is not
possible to slow the rate of rise (or fall) of the driver’s
input signal to achieve slowing of the output.
4.5
Input Stage
The input stage of the MIC4423/24/25 consists of a
single-MOSFET class A stage with an input
capacitance of ≤38 pF.
This capacitance represents the maximum load from
the driver that will be seen by its controlling logic. The
drain load on the input MOSFET is a –2 mA current
source. Thus, the quiescent current drawn by the driver
varies, depending on the logic state of the input.
Following the input stage is a buffer stage which
provides ~400 mV of hysteresis for the input, to prevent
oscillations when slowly-changing input signals are
used or when noise is present on the input. Input
voltage switching threshold is approximately 1.5V
which makes the driver directly compatible with TTL
signals, or with CMOS powered from any supply
voltage between 3V and 15V.
The MIC4423/24/25 drivers can also be driven directly
by the SG1524/25/26/27, TL494/95, TL594/95,
NE5560/61/62/68, TSC170, MIC38C42, and similar
switch mode power supply ICs. By relocating the main
switch drive function into the driver rather than using
the somewhat limited drive capabilities of a PWM IC.
The PWM IC runs cooler, which generally improves its
performance and longevity, and the main switches
switch faster, which reduces switching losses and
increase system efficiency.
The input protection circuitry of the MIC4423/24/25, in
addition to providing 2 kV or more of ESD protection,
also works to prevent latch-up or logic upset due to
ringing or voltage spiking on the logic input terminal. In
most CMOS devices when the logic input rises above
the power supply terminal, or descends below the
ground terminal, the device can be destroyed or
rendered inoperable until the power supply is cycled
OFF and ON. The MIC4423/24/25 drivers have been
designed to prevent this. Input voltages excursions as
great as 5V below ground will not alter the operation of
the device. Input excursions above the power supply
voltage will result in the excess voltage being
conducted to the power supply terminal of the IC.
Because the excess voltage is simply conducted to the
power terminal, if the input to the driver is left in a high
state when the power supply to the driver is turned off,
currents as high as 30 mA can be conducted through
the driver from the input terminal to its power supply
terminal. This may overload the output of whatever is
DS20006638A-page 11
MIC4423/4/5
driving the driver, and may cause other devices that
share the driver’s power supply, as well as the driver, to
operate when they are assumed to be off, but it will not
harm the driver itself. Excessive input voltage will also
slow the driver down, and result in much longer internal
propagation delays within the drivers. TD2, for example,
may increase to several hundred nanoseconds. In
general, while the driver will accept this sort of misuse
without damage, proper termination of the line feeding
the driver so that line spiking and ringing are
minimized, will always result in faster and more reliable
operation of the device, leave less EMI to be filtered
elsewhere, be less stressful to other components in the
circuit, and leave less chance of unintended modes of
operation.
4.6
Power Dissipation
CMOS circuits usually permit the user to ignore power
dissipation. Logic families such as 4000 series and
74Cxxx have outputs which can only source or sink a
few milliamps of current, and even shorting the output
of the device to ground or VCC may not damage the
device. CMOS drivers, on the other driver hand, are
intended to source or sink several Amps of current.
This is necessary in order to drive large capacitive
loads at frequencies into the megahertz range.
Package power dissipation of driver ICs can easily be
exceeded when driving large loads at high frequencies.
Care must therefore be paid to device dissipation when
operating in this domain.
4.7
Resistive Load Power Dissipation
Dissipation caused by a resistive load can be
calculated in the following Equation 4-1:
EQUATION 4-1:
2
PL = I R DO
Where:
I=
The current drawn by the load
RO = The output resistance of the driver when the
output is high, at the power supply voltage
used (See Section 2.0 “Typical Performance Curves”)
D=
Fraction of time the load is conducting (duty
cycle)
4.8
Capacitive Load Power
Dissipation
Dissipation caused by a capacitive load is simply the
energy placed in, or removed from, the load
capacitance by the driver. The energy stored in a
capacitor is described in the following Equation 4-2:
EQUATION 4-2:
The Supply Current vs Frequency and Supply Current
vs Load in the Section 2.0 “Typical Performance
Curves” furnished with this data sheet aid in
estimating power dissipation in the driver. Operating
frequency, power supply voltage, and load all affect
power dissipation.
E = 12CV
Given the power dissipation in the device, and the
thermal resistance of the package, junction operating
temperature for any ambient is easy to calculate. For
example, the thermal resistance of the 8-pin plastic DIP
package, from the data sheet, is 150°C/W. In a 25°C
ambient, then, using a maximum junction temperature
of 150°C, this package will dissipate 960 mW.
As this energy is lost in the driver each time the load is
charged or discharged, for power dissipation
calculations the 1/2 is removed. This equation also
shows that it is good practice not to place more voltage
in the capacitor than is necessary, as dissipation
increases as the square of the voltage applied to the
capacitor. For a driver with a capacitive load.
Accurate power dissipation numbers can be obtained
by summing the three sources of power dissipation in
the device:
• Load power dissipation (PL)
• Quiescent power dissipation (PQ)
• Transition power dissipation (PT)
Calculation of load power dissipation differs depending
on whether the load is capacitive, resistive or inductive.
2
EQUATION 4-3:
PL = f C VS
2
Where:
f=
Operating frequency
C=
Load capacitance
VS = Driver supply voltage
DS20006638A-page 12
2022 Microchip Technology Inc. and its subsidiaries
MIC4423/4/5
4.9
Inductive Load Power Dissipation
For inductive loads the situation is more complicated.
For the part of the cycle in which the driver is actively
forcing current into the inductor, the situation is the
same as it is in the resistive case:
EQUATION 4-4:
2
P L1 = I R D O
However, in this instance the RO required may be either
the on resistance of the driver when its output is in the
high state, or its on resistance when the driver is in the
low state, depending on how the inductor is connected,
and this is still only half the story. For the part of the
cycle when the inductor is forcing current through the
driver, dissipation is best described as:
EQUATION 4-5:
EQUATION 4-7:
PQ = VS D IH + 1 – D IL
Where:
IH =
Quiescent current with input high
IL =
Quiescent current with input low
D=
Fraction of time input is high (duty cycle)
VS =
Power supply voltage
4.11
Transition Power Dissipation
Transition power is dissipated in the driver each time its
output changes state, because during the transition, for
a very brief interval, both the N-Channel and
P-Channel MOSFETs in the output totem-pole are ON
simultaneously, and a current is conducted through
them from VS to ground. The transition power
dissipation is approximately:
EQUATION 4-8:
P L2 = I V D 1 – D
Where:
VD =
PT = f VS A s
The forward drop of the clamp diode in the
driver (generally around 0.7V).
Where:
(A x s) =
The two parts of the load dissipation must be summed
in to produce PL.
EQUATION 4-6:
is a time current factor derived from
Figure 4-1
Total power (PD) then, is described as:
EQUATION 4-9:
P L = P L1 + P L2
PD = PL + PQ + PT
4.10
Quiescent Power Dissipation
Quiescent power dissipation (PQ, as described in the
input section) depends on whether the input is high or
low. A low input will result in a maximum current drain
(per driver) of ≤0.2 mA; a logic high will result in a
current drain of ≤2.0 mA. Quiescent power can
therefore be found from:
2022 Microchip Technology Inc. and its subsidiaries
Examples show the relative magnitude for each term.
DS20006638A-page 13
MIC4423/4/5
EXAMPLE 1: The MIC4423 operating on a 12V supply
driving two capacitive loads of 3000 pF each, operating
at 250 kHz, with a duty cycle of 50%, in a maximum
ambient of 60°C.
EXAMPLE 2: A MIC4424 operating on a 15V input,
with one driver driving a 50Ω resistive load at 1 MHz,
with a duty cycle of 67%, and the other driver
quiescent, in a maximum ambient temperature of 40°C:
First, calculate load power loss:
2
PL = I RO D
PL = f C VS
9
2
9
First, IO must be determined.
2
P L = 250 000 3 10 + 3 10 12 = 0.2160W
EQUATION 4-10:
Then, transition power loss:
PT = f VS A s
= 250 000 12 2.2 10 = 6.6mW
I O = V S R O + R LOAD
Given RO from the characteristic curves then:
I O = 15 3.3 + 50
Then quiescent power loss:
PQ = VS D IH + 1 – D IL
= 12 0.5 0.0035 + 0.5 0.0003
= 0.0228W
I O = 0.281A
and:
Total power dissipation, then, is:
2
P L = 0.281 3.3 0.67 = 0.174W
PT = F VS A s 2
P D = 0.2160 + 0.0066 + 0.0228 = 0.2454W
Assuming an SOIC package, with JA of 120°C/W, this
will result in the junction running at 29.4°C above
ambient.
0.2454 120 = 29.4C
Given a maximum ambient temperature of 60°C, this
will result in a maximum junction temperature of
89.4°C.
because only one side is operating,
–9
= 1 000 000 15 3.3 10 2 = 0.025W
and
P Q = 15 0.67 0.00125 + 0.33 0.000125
+ 1 0.000125
this assumes that the unused side of the driver has its
input grounded, which is more efficient = 0.015W.
Then,
P D = 0.174 + 0.025 + 0.0150 = 0.213W
In a ceramic package with an JA of 100°C/W, this
amount of power results in a junction temperature
given the maximum 40°C ambient of:
0.213 100 + 40 = 61.4C
DS20006638A-page 14
2022 Microchip Technology Inc. and its subsidiaries
MIC4423/4/5
4.12
Definitions
CL = Load Capacitance in Farads.
D = Duty Cycle expressed as the fraction of time the
input to the driver is high.
f = Operating Frequency of the driver in Hertz.
IH = Power supply current drawn by a driver when both
inputs are high and neither output is loaded.
IL = Power supply current drawn by a driver when both
10-8
A•s (Ampere-seconds)
The actual junction temperature will be lower than
calculated both because duty cycle is less than 100%
and because the graph lists RDS(ON) at a TJ of 125°C
and the RDS(ON) at 61°C TJ will be somewhat lower.
10-9
10-10
0
2
FIGURE 4-1:
4
6
8 10 12 14 16 18
VIN
Crossover Energy Loss.
inputs are low and neither output is loaded.
PD = Total power dissipated in a driver in Watts.
PL = Power dissipated in the driver due to the driver’s
load in Watts.
PQ = Power dissipated in a quiescent driver in Watts.
PT = Power dissipated in a driver when the output
changes states (“shoot-through current”) in Watts.
NOTE: The “shoot-through” current from a dual
transition (once up, once down) for both drivers is
stated in the graph on the following page in amperenanoseconds. This figure must be multiplied by the
number of repetitions per second (frequency to find
Watts).
1250
MAXIMUM PACKAGE
POWER DISSIPATION (mW)
ID = Output current from a driver in Amps.
1000
SOIC
750
PDIP
500
250
0
25
50
75
100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 4-2:
Power Dissipation vs.
Ambient Temperature.
RO = Output resistance of a driver in Ohms.
VS = Power supply voltage to the IC in Volts.
2022 Microchip Technology Inc. and its subsidiaries
DS20006638A-page 15
MIC4423/4/5
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
8-Lead PDIP*
XXX
XXXXXX
WNNN
MIC
4423YN
1930
8-Lead SOIC*
Example
XXXX
XX
WNNN
4424
YM
5523
16-Lead Wide SOIC*
XXX
XXXXXXX
WNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Example
Example
MIC
4425YWM
8437
Product code or customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (‾) symbol may not be to scale.
DS20006638A-page 16
2022 Microchip Technology Inc. and its subsidiaries
MIC4423/4/5
8-Lead SOIC Package Outline and Recommended Land Pattern
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2022 Microchip Technology Inc. and its subsidiaries
DS20006638A-page 17
MIC4423/4/5
8-Lead PDIP Package Outline and Recommended Land Pattern
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
DS20006638A-page 18
2022 Microchip Technology Inc. and its subsidiaries
MIC4423/4/5
16-Lead Wide SOIC Package Outline and Recommended Land Pattern
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2022 Microchip Technology Inc. and its subsidiaries
DS20006638A-page 19
MIC4423/4/5
NOTES:
DS20006638A-page 20
2022 Microchip Technology Inc. and its subsidiaries
MIC4423/4/5
APPENDIX A:
REVISION HISTORY
Revision A (May 2022)
• Converted Micrel document MIC4423/4/5 to
Microchip data sheet DS20006638A.
• Minor text changes throughout.
2022 Microchip Technology Inc. and its subsidiaries
DS20006638A-page 21
MIC4423/4/5
NOTES:
DS20006638A-page 22
2022 Microchip Technology Inc. and its subsidiaries
MIC4423/4/5
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART NO.
X
XX
–XX
Device
Junction
Temperature
Range
Package
Media Type
MIC4423:
MIC4424:
Device:
MIC4425:
Junction
Temperature Range:
Package:
Media Type:
Note 1:
Y
Z
=
=
Dual 3A Peak Low-Side MOSFET Driver
Bi-Polar/CMOS/DMOS Process, Dual
Inverting
Dual 3A Peak Low-Side MOSFET Driver
Bi-Polar/ CMOS/DMOS Process, Dual
Non-Inverting
Dual 3A Peak Low-Side MOSFET Driver
Bi-Polar/CMOS/DMOS Process,
Inverting plus Non-Inverting
–40°C to +85°C (RoHs Compliant)
0°C to +70°C (RoHs Compliant)
N
=
M
=
WM =
8-Lead PDIP
8-Lead SOIC
16-Lead SOIC (Wide Body)
blank
blank
blank
TR
TR
95/Tube (M, SOIC)
50/Tube (N, PDIP)
47/Tube (WM, SOIC)
2,500/Reel (M, SOIC)
1,000/Reel (WM, SOIC)
=
=
=
=
=
Tape and Reel identifier only appears in the catalog part number
description. This identifier is used for ordering purposes and is not
printed on the device package. Check with your Microchip Sales
Office for package availability with the Tape and Reel option.
2022 Microchip Technology Inc. and its subsidiaries
Examples:
a) MIC4423:
3A Peak, Dual Inverting High Speed,
Low-Side MOSFET Driver, Industrial
Grade, –40°C to +85°C Temperature
Range, RoHS Compliant
MIC4423-YM
8-Lead SOIC Package, 95/Tube
MIC4423-YM-TR
8-Lead SOIC Package, 2500/Reel
MIC4423-YN
8-Lead PDIP Package, 50/Tube
MIC4423-YWM
16-Lead SOIC Wide Package,
47/Tube
MIC4423-YWM-TR
16-Lead SOIC Wide Package,
1000/Reel
b) MIC4423:
3A Peak, Dual Inverting High Speed,
Low-Side MOSFET Driver, Commercial
Grade, 0°C to +70°C Temperature
Range, RoHS Compliant
MIC4423-ZN
8-Lead PDIP Package, 50/Tube
MIC4423-ZWM
16-Lead SOIC Wide Package,
47/Tube
MIC4423-ZWM-TR
16-Lead SOIC Wide Package,
1000/Reel
c) MIC4424:
3A Peak, Dual Non-Inverting High
Speed, Low-Side MOSFET Driver,
Industrial Grade, –40°C to +85°C
Temperature Range, RoHS Compliant
MIC4424-YM
8-Lead SOIC Package, 95/Tube
MIC4424-YM-TR
8-Lead SOIC Package, 2500/Reel
MIC4424-YN
8-Lead PDIP Package, 50/Tube
MIC4424-YWM
16-Lead SOIC Wide Package,
47/Tube
MIC4424-YWM-TR
16-Lead SOIC Wide Package,
1000/Reel
d) MIC4424:
3A Peak, Dual Non-Inverting High
Speed, Low-Side MOSFET Driver,
Commercial Grade, 0°C to +70°C
Temperature Range, RoHS Compliant
MIC4424-ZN
8-Lead PDIP Package, 50/Tube
MIC4424-ZWM
16-Lead SOIC Wide Package,
47/Tube
MIC4424-ZWM-TR
16-Lead SOIC Wide Package,
1000/Reel
e) MIC4425:
3A-Peak, Dual Inverting Plus NonInverting Hi-Speed, Low-Side MOSFET
Driver, Industrial Grade, –40°C to
+85°C Temperature Range, RoHS
Compliant
MIC4425-YM
8-Lead SOIC Package, 95/Tube
MIC4425-YM-TR
8-Lead SOIC Package, 2500/Reel
MIC4425-YN
8-Lead PDIP Package, 50/Tube
MIC4425-YWM
16-Lead SOIC Wide Package,
47/Tube
MIC4425-YWM-TR
16-Lead SOIC Wide Package,
1000/Reel
f) MIC4425:
3A-Peak, Dual Inverting Plus NonInverting Hi-Speed, Low-Side MOSFET
Driver, Commercial Grade, –40°C to
+85°C Temperature Range, RoHS
Compliant
MIC4425-ZWM
16-Lead SOIC Wide Package,
47/Tube
MIC4425-ZWM-TR
16-Lead SOIC Wide Package,
1000/Reel
DS20006638A-page 23
MIC4423/4/5
NOTES:
DS20006638A-page 24
2022 Microchip Technology Inc. and its subsidiaries
Note the following details of the code protection feature on Microchip products:
•
Microchip products meet the specifications contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is secure when used in the intended manner, within operating specifications, and
under normal conditions.
•
Microchip values and aggressively protects its intellectual property rights. Attempts to breach the code protection features of
Microchip product is strictly prohibited and may violate the Digital Millennium Copyright Act.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not
mean that we are guaranteeing the product is “unbreakable”. Code protection is constantly evolving. Microchip is committed to
continuously improving the code protection features of our products.
This publication and the information herein may be used only
with Microchip products, including to design, test, and integrate
Microchip products with your application. Use of this information in any other manner violates these terms. Information
regarding device applications is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your
specifications. Contact your local Microchip sales office for
additional support or, obtain additional support at https://
www.microchip.com/en-us/support/design-help/client-supportservices.
THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS".
MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION INCLUDING BUT NOT
LIMITED TO ANY IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
PARTICULAR PURPOSE, OR WARRANTIES RELATED TO
ITS CONDITION, QUALITY, OR PERFORMANCE.
IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL, OR CONSEQUENTIAL LOSS, DAMAGE, COST, OR EXPENSE OF ANY
KIND WHATSOEVER RELATED TO THE INFORMATION OR
ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES
ARE FORESEEABLE. TO THE FULLEST EXTENT
ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON
ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION
OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF
ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP
FOR THE INFORMATION.
Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to
defend, indemnify and hold harmless Microchip from any and
all damages, claims, suits, or expenses resulting from such
use. No licenses are conveyed, implicitly or otherwise, under
any Microchip intellectual property rights unless otherwise
stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud,
CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO,
JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus,
maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo,
MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower,
PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch,
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Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O,
Vectron, and XMEGA are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
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Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight
Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3,
Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, QuietWire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,
TimePictra, TimeProvider, TrueTime, WinPath, and ZL are
registered trademarks of Microchip Technology Incorporated in the
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Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky,
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Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip
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SQTP is a service mark of Microchip Technology Incorporated in
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The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, Symmcom, and Trusted Time are registered
trademarks of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
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All other trademarks mentioned herein are property of their
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© 2022, Microchip Technology Incorporated and its subsidiaries.
All Rights Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
2022 Microchip Technology Inc. and its subsidiaries
ISBN: 978-1-6683-0372-6
DS20006638A-page 25
Worldwide Sales and Service
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DS20006638A-page 26
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09/14/21