MIC5209-4.2YS-TR

MIC5209 500 mA Low-Noise LDO Regulator Features General Description • Output Voltage Range: 1.8V to 15V • Meets Intel® Slot 1 and Slot 2 Requirements • Guaranteed 500 mA Output Over the Full Operating Temperature Range • Low 500 mV Maximum Dropout Voltage at Full Load • Extremely Tight Load and Line Regulation • Thermally Efficient Surface-Mount Package • Low Temperature Coefficient • Current and Thermal Limiting • Reversed-Battery Protection • No-Load Stability • 1% Output Accuracy • Ultra-Low-Noise Capability in SOIC-8 and DDPAK • Ultra-Small 3 mm × 3 mm VDFN Package The MIC5209 is an efficient linear voltage regulator with very low dropout voltage, typically 10 mV at light loads and less than 500 mV at full load, with better than 1% output voltage accuracy. Designed especially for hand-held, battery-powered devices, the MIC5209 features low ground current to help prolong battery life. An enable/shutdown pin on the SOIC-8 and DDPAK versions can further improve battery life with near-zero shutdown current. Key features include reversed-battery protection, current limiting, overtemperature shutdown, ultra-low-noise capability (SOIC-8 and DDPAK versions), and is available in thermally efficient packaging. The MIC5209 is available in adjustable or fixed output voltages. Applications • • • • • • Pentium II Slot 1 and Slot 2 Support Circuits Laptop, Notebook, and Palmtop Computers Cellular Telephones Consumer and Personal Electronics SMPS Post-Regulator and DC/DC Modules High-Efficiency Linear Power Supplies Typical Application Circuits ULTRA-LOW NOISE 5V REGULATOR 3.3V NOMINAL INPUT SLOT 1 POWER SUPPLY MIC5209-2.5YS 1 VIN • 3.0V 0.1μF 2 ENABLE SHUTDOWN VIN 6.0V VOUT 5.0V 3 VOUT 2.5V ±1% 22μF TANTALUM  2017 - 2022 Microchip Technology Inc. and its subsidiaries 22μF TANTALUM MIC5209-5.0YM 1 8 2 7 3 6 4 5 470pF (OPTIONAL) DS20005720B-page 1 MIC5209 Package Types MIC5209-X.XYS SOT-223 (S) FIXED VOLTAGES (TOP VIEW) MIC5209YML 8-PIN 3X3 VDFN (ML) ADJUSTABLE VOLTAGES (TOP VIEW) GND TAB IN 2 1 8 EN IN 2 7 GND OUT 3 6 ADJ OUT 4 5 NC 3 MIC5209-X.XYU DDPAK (U) FIXED VOLTAGES (TOP VIEW) IN 2 7 GND OUT 3 6 GND BYP 4 5 GND MIC5209YM SOIC-8 (M) ADJUSTABLE VOLTAGES (TOP VIEW) EN 1 8 GND IN N 2 7 GND OUT OUT 3 6 GND ADJ J 4 5 GND 5 BYP 4 OUT 3 GND 2 IN 1 EN MIC5209YU DDPAK (U) ADJUSTABLE VOLTAGES (TOP VIEW) TA AB 8 GND GND EN 1 GND MIC5209-X.XYM SOIC-8 (M) FIXED VOLTAGES (TOP VIEW) DS20005720B-page 2 EP GND OUT TAB 1 IN 5 ADJ 4 OUT 3 GND 2 IN 1 EN  2017 - 2022 Microchip Technology Inc. and its subsidiaries MIC5209 Functional Diagrams LOW-NOISE FIXED REGULATOR (SOT-223 VERSION ONLY) IN VIN OUT VOUT COUT ~2.0V – 2.1V –40ºC EN BANDGAP REFERENCE CURRENT-LIMIT THERMAL SHUTDOWN MIC5209-x.xYS GND ULTRA-LOW-NOISE FIXED REGULATOR IN VIN OUT VOUT COUT BYP CBYP (OPTIONAL) BANDGAP REFERENCE EN CURRENT-LIMIT THERMAL SHUTDOWN MIC5209-x.xYM/U GND ULTRA-LOW-NOISE ADJUSTABLE REGULATOR VIN OUT IN ADJ BANDGAP REFERENCE VOUT R1 R2 COUT CBYP (OPTIONAL) EN CURRENT-LIMIT THERMAL SHUTDOWN MIC5209YM/U (ADJUSTABLE) GND  2017 - 2022 Microchip Technology Inc. and its subsidiaries DS20005720B-page 3 MIC5209 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † Supply Voltage (VIN).................................................................................................................................... –20V to +20V Power Dissipation (PD) (Note 1).............................................................................................................Internally Limited ESD Rating (SOT-223)..................................................................................................................... 2 kV HBM/300V MM ESD Rating (VDFN, SOIC-8) ........................................................................................................... 5 kV HBM/100V MM Operating Ratings ‡ Supply Voltage (VIN)................................................................................................................................... +2.5V to +16V Adjustable Output Voltage Range (VOUT) .................................................................................................. +1.8V to +15V † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. ‡ Notice: The device is not guaranteed to function outside its operating ratings. Note 1: The maximum allowable power dissipation at any TA (ambient temperature) is PD(max) = (TJ(max) – TA) x θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. See Table 4-1 and the Thermal Considerations sub-section in Applications Information for details. DS20005720B-page 4  2017 - 2022 Microchip Technology Inc. and its subsidiaries MIC5209 ELECTRICAL CHARACTERISTICS Electrical Characteristics: VIN = VOUT + 1V; IL = 100 μA; TJ = +25°C, bold values indicate –40°C ≤ TJ ≤ +125°C except 0°C ≤ TJ ≤ +125°C for 1.8V ≤ VOUT ≤ 2.5V, unless noted. Note 1 Parameter Symbol Output Voltage Accuracy VOUT Output Voltage Temperature Coefficient ΔVOUT/ ΔT Line Regulation Load Regulation Dropout Voltage, (Note 4) Ground Pin Current (Note 5, Note 6) Ground Pin Quiescent Current, (Note 6) Min. Typ. Max. –1 — 1 –2 — 2 — 40 — ΔVOUT/ VOUT — 0.009 0.05 — — 0.10 ΔVOUT/ VOUT — 0.05 0.5 — — 0.7 — 10 60 — — 80 — 115 175 — — 250 — 165 300 — — 400 — 350 500 — — 600 — 80 130 — — 170 — 350 650 — — 900 — 1.8 2.5 — — 3.0 — 8 20 — — 25 — 0.05 3 — 0.10 8 — 75 — — 700 900 — — 1000 — 0.05 — — 500 — VIN – VOUT IGND IGND Ripple Rejection PSRR Current Limit ILIMIT Thermal Regulation Output Noise, (Note 8) ΔVOUT/ ΔPD en Units % ppm/°C 300  2017 - 2022 Microchip Technology Inc. and its subsidiaries — Variation from nominal VOUT Note 2 % VIN = VOUT + 1V to 16V % IL = 100 µA to 500 mA, Note 3 IL = 100 µA IL = 50 mA mV IL = 150 mA IL = 500 mA VEN ≥ 3.0V, IOUT = 100 µA µA VEN ≥ 3.0V, IOUT = 50 mA VEN ≥ 3.0V, IOUT = 150 mA mA VEN ≥ 3.0V, IOUT = 500 mA µA VEN ≤ 0.4V (shutdown) VEN ≤ 0.18V (shutdown) dB f = 120 Hz mA VOUT = 0V %/W nV √Hz — Conditions Note 7 VOUT = 2.5V, IOUT = 50 mA COUT = 2.2 µF, CBYP = 0 IOUT = 50 mA, COUT = 2.2 µF CBYP = 470 pF DS20005720B-page 5 MIC5209 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Characteristics: VIN = VOUT + 1V; IL = 100 μA; TJ = +25°C, bold values indicate –40°C ≤ TJ ≤ +125°C except 0°C ≤ TJ ≤ +125°C for 1.8V ≤ VOUT ≤ 2.5V, unless noted. Note 1 Parameter Symbol Min. Typ. Max. — — 0.4 — — 0.18 2.0 — — Units Conditions V VEN = Logic-low (Regulator shutdown) V VEN = Logic-high (Regulator enabled) Enable Input Enable Input Logic-Low Voltage VENL Enable Input Current IENL — IENH Note 1: 2: 3: 4: 5: 6: 7: 8: — 0.01 –1 — 0.01 –2 — 5 20 — — 25 — — 30 — — 50 µA VENL ≤ 0.4V VENL ≤ 0.18V VENH = 2.0V µA VENH = 16V Specification for packaged product only. Output voltage temperature coefficient is defined as the worst-case voltage change divided by the total temperature range. Regulation is measured at constant junction temperature using low duty cycle pulse testing. Parts are tested for load regulation in the load range from 100 µA to 500 mA. Changes in output voltage due to heating effects are covered by the thermal regulation specification. Dropout Voltage is defined as the input to output differential at which the output voltage drops 2% below its nominal value measured at 1V differential. Ground pin current is the regulator quiescent current plus pass transistor base current. The total current drawn from the supply is the sum of the load current plus the ground pin current. VEN is the voltage externally applied to devices with the EN (enable) input pin. SOIC-8 (M) and DDPAK (U) packages only. Thermal regulation is the change in output voltage at a time “t” after a change in power dissipation is applied, excluding load or line regulation effects. Specifications are for a 500 mA load pulse at VIN = 16V for t = 10 ms. CBYP is an optional, external bypass capacitor connected to devices with a BYP (bypass) or ADJ (adjust) pin. SOIC-8 (M) and DDPAK (U) packages only. DS20005720B-page 6  2017 - 2022 Microchip Technology Inc. and its subsidiaries MIC5209 TEMPERATURE SPECIFICATIONS (Note 1) Parameters Sym. Min. Typ. Max. Units Conditions TS –65 — +150 °C — Temperature Ranges Storage Temperature Range Lead Temperature — — — +260 °C Soldering, 5 sec. Junction Temperature TJ –40 — +125 °C 2.5V ≤ VOUT ≤ 15V Junction Temperature TJ 0 — +125 °C 1.8V ≤ VOUT < 2.5V θJA — 62 — °C/W θJC — 15 — °C/W θJA — 50 — °C/W θJC — 25 — °C/W θJA — 31.4 — °C/W θJC — 3 — °C/W θJA — 64 — °C/W θJC — 12 — °C/W Package Thermal Resistance Thermal Resistance SOT-223 Thermal Resistance SOIC-8 Thermal Resistance DDPAK Thermal Resistance 3 mm x 3 mm VDFN Note 1: EIA/JEDEC JES51-751-7, 4 Layer Board See Thermal Considerations for more information. EIA/JEDEC JES51-751-7, 4 Layer Board EIA/JEDEC JES51-751-7, 4 Layer Board The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the maximum allowable power dissipation will cause the device operating junction temperature to exceed the maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.  2017 - 2022 Microchip Technology Inc. and its subsidiaries DS20005720B-page 7 MIC5209 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. FIGURE 2-1: Ratio. Power Supply Rejection FIGURE 2-4: Ratio. Power Supply Rejection FIGURE 2-2: Ratio. Power Supply Rejection FIGURE 2-5: Ratio. Power Supply Rejection FIGURE 2-3: Ratio. Power Supply Rejection FIGURE 2-6: Ratio. Power Supply Rejection DS20005720B-page 8  2017 - 2022 Microchip Technology Inc. and its subsidiaries MIC5209 FIGURE 2-7: Power Supply Ripple Rejection vs. Voltage Drop. FIGURE 2-10: Noise Performance. FIGURE 2-8: Power Supply Ripple Rejection vs. Voltage Drop. FIGURE 2-11: Noise Performance. FIGURE 2-9: FIGURE 2-12: Current. Dropout Voltage vs. Output Noise Performance.  2017 - 2022 Microchip Technology Inc. and its subsidiaries DS20005720B-page 9 MIC5209 FIGURE 2-13: Current. Ground Current vs. Output FIGURE 2-14: Voltage. Ground Current vs. Supply FIGURE 2-15: Voltage. Ground Current vs. Supply DS20005720B-page 10  2017 - 2022 Microchip Technology Inc. and its subsidiaries MIC5209 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: Pin Number 8-Pin VDFN PIN FUNCTION TABLE Pin Number SOT-223 Pin Number SOIC-8 Pin Number DDPAK Pin Name Description 1, 2 1 2 2 IN 7 2, TAB 5, 6, 7, 8 3, TAB GND Ground: SOT-223 Pin 2 and TAB are internally connected. SOIC-8 Pins 5 through 8 are internally connected. 3, 4 3 3 4 OUT Regulator Output: Pins 3 and 4 must be tied together. 5 — — — NC Not Connected. 8 — 1 1 EN Enable (Input): CMOS-compatible control input. Logic-High = Enable; Logic-Low = Shutdown. — — 4 (Fixed) 5 (Fixed) BYP Reference Bypass: Connect external 470 pF capacitor to GND to reduce output noise. Can be left open. For 1.8V or 2.5V operation, see Application Information. 6 — ADJ Adjust (Input): Feedback input. Connect to resistive voltage-divider network. EP — ePad Exposed Thermal Pad: Connect to GND for best thermal performance. 4 (Adjustable) 5 (Adjustable) — —  2017 - 2022 Microchip Technology Inc. and its subsidiaries Supply Input. DS20005720B-page 11 MIC5209 4.0 APPLICATIONS INFORMATION 4.1 Enable/Shutdown Enable is not available on devices in the SOT-223 (S) package. Forcing EN (enable/shutdown) high (> 2V) enables the regulator. EN is compatible with CMOS logic. If the enable/shutdown feature is not required, connect EN to IN (supply input). 4.2 Input Capacitor A 1 µF capacitor should be placed from IN to GND if there is more than 10 inches of wire between the input and the AC filter capacitor or if a battery is used as the input. 4.3 Output Capacitor An output capacitor is required between OUT and GND to prevent oscillation. The minimum size of the output capacitor is dependent upon whether a reference bypass capacitor is used. 1 µF minimum is recommended when CBYP is not used (see Figure 4-1). 2.2 µF minimum is recommended when CBYP is 470 pF (see Figure 4-2). Larger values improve the regulator’s transient response. The output capacitor should have an ESR (equivalent series resistance) of about 1Ω and a resonant frequency above 1 MHz. Ultra-low-ESR and ceramic capacitors can cause a low amplitude oscillation on the output and/or underdamped transient response. Most tantalum or aluminum electrolytic capacitors are adequate; film types will work, but are more expensive. Since many aluminum electrolytics have electrolytes that freeze at about –30°C, solid tantalums are recommended for operation below –25°C. At lower values of output current, less output capacitance is needed for output stability. The capacitor can be reduced to 0.47 µF for current below 10 mA or 0.33 µF for currents below 1 mA. 4.4 No-Load Stability The MIC5209 will remain stable and in regulation with no load (other than the internal voltage divider) unlike many other voltage regulators. This is especially important in CMOSRAM keep-alive applications. 4.5 Reference Bypass Capacitor Reference bypass (BYP) is available only on devices in SOIC-8 and DDPAK packages. BYP is connected to the internal voltage reference. A 470 pF capacitor (CBYP) connected from BYP to GND quiets this reference, providing a significant reduction in output noise (ultra-low-noise performance). Because DS20005720B-page 12 CBYP reduces the phase margin, the output capacitor should be increased to at least 2.2 µF to maintain stability. The start-up speed of the MIC5209 is inversely proportional to the size of the reference bypass capacitor. Applications requiring a slow ramp-up of output voltage should consider larger values of CBYP. Likewise, if rapid turn-on is necessary, consider omitting CBYP. If output noise is not a major concern, omit CBYP and leave BYP open. 4.6 Thermal Considerations The SOT-223 has a ground tab that allows it to dissipate more power than the SOIC-8 (refer to the Slot-1 Power Supply sub-section for details). At +25°C ambient, it will operate reliably at 1.6W dissipation with “worst-case” mounting (no ground plane, minimum trace widths, and FR4 printed circuit board). Thermal resistance values for the SOIC-8 represent typical mounting on a 1”-square, copper-clad, FR4 circuit board. For greater power dissipation, SOIC-8 versions of the MIC5209 feature a fused internal lead frame and die bonding arrangement that reduces thermal resistance when compared to standard SOIC-8 packages. TABLE 4-1: Package MIC5209 THERMAL RESISTANCE θJA θJC SOT-223 (S) 62°C/W 15°C/W SOIC-8 (M) 50°C/W 25°C/W DDPAK (U) 31.4°C/W 3°C/W 3x3 VDFN (ML) 64°C/W 12°C/W Multilayer boards with a ground plane, wide traces near the pads, and large supply-bus lines will have better thermal conductivity and will also allow additional power dissipation. For additional heat sink characteristics, refer to Application Hint 17. For a full discussion of heat sinking and thermal effects on voltage regulators, refer to the “Regulator Thermals” section of the Designing with Low-Dropout Voltage Regulators handbook. 4.7 Low-Voltage Operation The MIC5209-1.8 and MIC5209-2.5 require special consideration when used in voltage-sensitive systems. They may momentarily overshoot their nominal output voltages unless appropriate output and bypass capacitor values are chosen. During regulator power up, the pass transistor is fully saturated for a short time, while the error amplifier and voltage reference are being powered up more slowly from the output (see Functional Diagrams). Selecting  2017 - 2022 Microchip Technology Inc. and its subsidiaries MIC5209 larger output and bypass capacitors allows additional time for the error amplifier and reference to turn on and prevent overshoot. To ensure that no overshoot is present when starting up into a light load (100 µA), use a 4.7 µF output capacitance and 470 pF bypass capacitance. This slows the turn-on enough to allow the regulator to react and keep the output voltage from exceeding its nominal value. At heavier loads, use a 10 µF output capacitance and 470 pF bypass capacitance. Lower values of output and bypass capacitance can be used, depending on the sensitivity of the system. Applications that can withstand some overshoot on the output of the regulator can reduce the output capacitor and/or reduce or eliminate the bypass capacitor. Applications that are not sensitive to overshoot due to power-on reset delays can use normal output and bypass capacitor configurations. Please note the junction temperature range of the regulator with an output less than 2.5V (fixed and adjustable) is 0°C to +125°C. 4.8 Fixed Regulator Applications Figure 4-1 shows a basic MIC5209-x.xYM (SOIC-8) fixed-voltage regulator circuit. See Figure 5 for a similar configuration using the more thermally-efficient MIC5209-x.xYS (SOT-223). A 1 µF minimum output capacitor is required for basic fixed-voltage applications. 4.9 Adjustable Regulator Applications The MIC5209YM, MIC5209YU, and MIC5209YML can be adjusted to a specific output voltage by using two external resistors (Figure 4-3). The resistors set the output voltage based on the equation: EQUATION 4-1: V OUT = 1.242V   1 + R2 -------  R1 This equation is correct due to the configuration of the bandgap reference. The bandgap voltage is relative to the output, as seen in the Functional Diagrams. Traditional regulators normally have the reference voltage relative to ground; therefore, their equations are different from the equation for the MIC5209Y. Although ADJ is a high-impedance input and, for best performance, R2 should not exceed 470 kΩ. MIC5209YM 2 VIN 1 IN OUT EN ADJ 3 VOUT R1 4 1μF GND 5-8 R2 MIC5209-x.xYM 2 VIN 1 IN OUT EN BYP 3 VOUT 4 Figure 4-4 includes the optional 470 pF bypass capacitor from ADJ to GND to reduce output noise. 1μF GND 5-8 FIGURE 4-3: Low-Noise Adjustable-Voltage Application. MIC5209YM FIGURE 4-1: Application. Low-Noise Fixed-Voltage VIN 2 1 IN OUT EN ADJ Figure 4-2 includes the optional 470 pF noise bypass capacitor between BYP and GND to reduce output noise. Note that the minimum value of COUT must be increased when the bypass capacitor is used. MIC5209-x.xYM VIN 2 1 IN OUT EN BYP GND 5-8 3 VOUT 4 2.2μF 470pF FIGURE 4-2: Ultra-Low-Noise Fixed-Voltage Application.  2017 - 2022 Microchip Technology Inc. and its subsidiaries 3 4 VOUT R1 2.2μF GND 5-8 R2 470pF FIGURE 4-4: Application. 4.10 Ultra-Low-Noise Adjustable Slot-1 Power Supply Intel’s Pentium II processors have a requirement for a 2.5V ±5% power supply for a clock synthesizer and its associated loads. The current requirement for the 2.5V supply is dependent upon the clock synthesizer used, DS20005720B-page 13 MIC5209 the number of clock outputs, and the type of level shifter (from core logic levels to 2.5V levels). Intel estimates a “worst-case” load of 320 mA. The MIC5209 was designed to provide the 2.5V power requirement for Slot-1 applications. Its guaranteed performance of 2.5V ±3% at 500 mA allows adequate margin for all systems, and the dropout voltage of 500 mV means that it operates from a “worst-case” 3.3V supply where the voltage can be as low as 3.0V. 1 IN CIN 0.1μF OUT 3 GND 2, TAB FIGURE 4-5: VOUT Slot-1 Power Supply. Powered from a 3.3V supply, the Slot-1 power supply illustrated in Figure 4-5 has a nominal efficiency of 75%. At the maximum anticipated Slot-1 load (320 mA), the nominal power dissipation is only 256 mW. The SOT-223 package has sufficient thermal characteristics for wide design margins when mounted on a single-layer copper-clad printed circuit board. The power dissipation of the MIC5209 is calculated using the voltage drop across the device output current plus supply voltage ground current. Considering “worst-case” tolerances, dissipation could be as high as: EQUATION 4-4: P D = 407mW SLOT-1 POWER SUPPLY POWER DISSIPATION the power EQUATION 4-2:  V IN  MAX  – V OUT  MAX    I OUT + V IN  MAX   I GND DS20005720B-page 14   3.6V – 2.375V   320mA  +  3.6V  4mA  COUT 22μF A Slot-1 power supply (Figure 4-5) is easy to implement. Only two capacitors are necessary, and their values are not critical. CIN bypasses the internal circuitry and should be at least 0.1 µF. COUT provides output filtering, improves transient response, and compensates the internal regulator control loop. Its value should be at least 22 µF. CIN and COUT can be increased as much as desired. 4.10.1 EQUATION 4-3: Resulting in: MIC5209-x.xYS VIN So: Using the maximum junction temperature of +125°C and a θJC of 15°C/W for the SOT-223, 25°C/W for the SOIC-8, or 3°C/W for the DDPAK package, the following worst-case heat-sink thermal resistance (θSA) requirements are: EQUATION 4-5: T J  MAX  – T A  JA = ------------------------------PD Where: θSA = θJA - θJC Table 4-2 and Figure 4-6 show that the Slot-1 power supply application can be implemented with a minimum footprint layout. TABLE 4-2: TA MAXIMUM ALLOWABLE THERMAL RESISTANCE +40°C +50°C +60°C +70°C θJA Limit 209°C/W 184°C/W 160°C/W 135°C/W 194°C/W 169°C/W 145°C/W 120°C/W θSA SOT-223 θSA SOIC-8 184°C/W 159°C/W 135°C/W 110°C/W θSA DDPAK 206°C/W 181°C/W 157°C/W 132°C/W Figure 4-6 shows the necessary copper pad area to obtain specific heatsink thermal resistance (θSA) values. The θSA values highlighted in Table 4-2 require much less than 500 mm2 of copper and, per Figure 4-6, can be easily accomplished with the minimum footprint.  2017 - 2022 Microchip Technology Inc. and its subsidiaries THERMAL RESISTANCE (ºC/W) MIC5209 70 60 50 40 30 20 10 0 0 2000 4000 6000 COPPER HEAT SINK AREA (mm2) FIGURE 4-6: Resistance. PCB Heatsink Thermal  2017 - 2022 Microchip Technology Inc. and its subsidiaries DS20005720B-page 15 MIC5209 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 5-Pin SOT-223* Example 5209 25YS722P XXXX XXXXNNNP 8-Pin VDFN* Y XXXX NNN Example Y 5209 916 SOIC-8 (Fixed)* Example 5-Pin DDPAK (Fixed)* Example XXXX -X.XXX WNNN 5209 -3.3YM 9651 XXXX -X.XXX WNNNP 5209 -3.3YU 5492P SOIC-8 (Adj.)* Example 5-Pin DDPAK (Adj)* Example XXX XXXXXX WNNN MIC 5209YM 1312 XXX XXXXXX WNNNP MIC 5209YU 1975P Legend: XX...X Y YY WW NNN e3 * Product code or customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. ●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (‾) symbol may not be to scale. Note: If the full seven-character YYWWNNN code cannot fit on the package, the following truncated codes are used based on the available marking space: 6 Characters = YWWNNN; 5 Characters = WWNNN; 4 Characters = WNNN; 3 Characters = NNN; 2 Characters = NN; 1 Character = N DS20005720B-page 16  2017 - 2022 Microchip Technology Inc. and its subsidiaries MIC5209 3-Lead SOT-223 Package Outline and Recommended Land Pattern Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging.  2017 - 2022 Microchip Technology Inc. and its subsidiaries DS20005720B-page 17 MIC5209 5-Lead DDPAK Package Outline and Recommended Land Pattern /HDG3ODVWLF(7>''3$.@ 1RWH )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWSZZZPLFURFKLSFRPSDFNDJLQJ E1 E L1 D1 D H 1 N b BOTTOM VIEW e TOP VIEW CHAMFER OPTIONAL C2 A φ c A1 L 8QLWV 'LPHQVLRQ/LPLWV 1XPEHURI3LQV ,1&+(6 0,1 1 120 0$;  3LWFK H 2YHUDOO+HLJKW $  ± 6WDQGRII† $  ±  2YHUDOO:LGWK (  ±  ([SRVHG3DG:LGWK (  ± ± 0ROGHG3DFNDJH/HQJWK '  ±  2YHUDOO/HQJWK +  ±  ([SRVHG3DG/HQJWK '  ± ± /HDG7KLFNQHVV F  ±  3DG7KLFNQHVV &  ±  E  ±  )RRW/HQJWK /  ±  3DG/HQJWK / ± ±  /HDG:LGWK %6&  )RRW$QJOH  ƒ ± ƒ 1RWHV  †6LJQLILFDQW&KDUDFWHULVWLF  'LPHQVLRQV'DQG(GRQRWLQFOXGHPROGIODVKRUSURWUXVLRQV0ROGIODVKRUSURWUXVLRQVVKDOOQRWH[FHHGSHUVLGH  'LPHQVLRQLQJDQGWROHUDQFLQJSHU$60(