MIC68400
4A Sequencing LDO with Tracking and Ramp Control
Features
General Description
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The MIC68400 is a high peak current LDO regulator
designed specifically for powering applications such as
FPGA core voltages that require high start up current
with lower nominal operating current. Capable of
sourcing 4A of current for start-up, the MIC68400
provides high power from a small QFN leadless
package. The MIC68400 can also implement a variety
of power-up and power-down protocols such as
sequencing, tracking, and ratiometric tracking.
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Stable with 10 µF Ceramic Capacitor
Input Voltage Range: 1.65V to 5.5V
0.5V Reference
±2.0% Output Tolerance over Temperature
4A Maximum Output Current – Peak Start-Up
3A Continuous Operating Current
Tracking on Turn-On and Turn-Off with Pin
Strapping
Timing Controlled Sequencing On/Off
Programmable Ramp Control for In-Rush Current
Limiting and Slew Rate Control of the Output
Voltage During Turn-On and Turn-Off
Power-On Reset (POR) Supervisor with
Programmable Delay Time
Single Master can Control Multiple Slave
Regulators with Tracking Output Voltages
Tiny 4 mm x 4 mm QFN Package
Maximum Dropout (VIN – VOUT) of 500 mV over
Temperature at 3A Output Current
Fixed and Adjustable Output Voltages
Excellent Line and Load Regulation Specifications
Logic Controlled Shutdown
Thermal Shutdown and Current-Limit Protection
Applications
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FPGA/PLD Power Supply
Networking/Telecom Equipment
Microprocessor Core Voltage
High Efficiency Linear Post Regulator
Sequenced or Tracked Power Supply
The MIC68400 operates from a wide input range of
1.65V to 5.5V, which includes all of the main supply
voltages commonly available today. It is designed to
drive digital circuits requiring low voltage at high
currents (i.e. PLDs, DSP, microcontroller, etc.). The
MIC68400 incorporates a delay pin (Delay) for control
of power on reset output (POR) at turn-on and
power-down delay at turn-off. In addition there is a
ramp control pin (RC) for either tracking applications or
output voltage slew rate adjustment at turn-on and
turn-off. This is important in applications where the load
is highly capacitive and in-rush currents can cause
supply voltages to fail and microprocessors or other
complex logic chips to hang up.
Multiple MIC68400s can be daisy chained in two
modes. In tracking mode the output voltage of the
Master drives the RC pin of a Slave so that the Slave
tracks the main regulator during turn-on and turn-off. In
sequencing mode the POR of the Master drives the
enable (EN) of the Slave so that it turns on after the
Master and turns off before (or after) the Master. This
behavior is critical for power-up and power-down
control in multi-output power supplies. The MIC68400
is fully protected offering both thermal, current limit
protection, and reverse current protection.
The MIC68400 has a junction temperature range of
–40°C to +125°C and is available in fixed as well as an
adjustable option. The MIC68400 is offered in the tiny
16-pin 4 mm x 4 mm QFN package.
2017 Microchip Technology Inc.
DS20005824A-page 1
MIC68400
Package Types
MIC68400, ADJ. VOLTAGES
16-Lead QFN (ML)
VIN
VIN
NC
VOUT
VIN
VIN
NC
VOUT
MIC68400, FIXED VOLTAGES
16-Lead QFN (ML)
16
15
14
13
16
15
14
13
12
VOUT
VIN
2
11
VOUT
VIN
2
11
VOUT
DELAY
3
10
SNS
DELAY
3
10
ADJ
RC
4
9
POR
RC
4
9
POR
6
NC
EN
5
7
8
5
6
7
8
GND
1
GND
VIN
NC
VOUT
EN
12
GND
1
GND
VIN
Typical Application Circuits
MIC68400
Sequenced Dual Power Supply for I/O and Core Voltage of µProcessor
μProcessor
47k
MIC68400-1.8YML
VIN = 3.3V
IN1
I/O
OUT1
EN1
EN
47k
U1
Master
SNS1
GND
POR1
10μF
RC1
0.6nF
DLY1
10nF
MIC68400-1.5YML
IN2
0.1μF
EN2
CORE
OUT2
U2
Slave
SNS2
GND
POR2
10μF
RC2
0.7nF
DLY2
/RESET
1nF
U1.EN
U1.TDLY
U1.RC
U1.DLY
U1.TDLY
U1.TRC
U1 Fully Shut Down
U1.OUT
U2.EN = U1.POR
U2.RC
U2.TRC2
U2.DLY
U2.TDLY
U2.TDLY
U2 Fully Shut Down
U2.OUT
U2.POR
DS20005824A-page 2
2017 Microchip Technology Inc.
MIC68400
Typical Application Circuits (Continued)
MIC68400
Tracking Dual Power Supply for I/O and Core Voltage of µProcessor
MIC68400-1.8YML
VIN = 1.8V
IN1
I/O
OUT1
U1
Master
EN1
EN
μProcessor
47k:
10μF
SNS1
RC1
10nF
DLY1
POR1
MIC68400-1.2YML
IN2
0.1μF
CORE
OUT2
EN2
U2
Slave
SNS2
GND
POR2
10μF
RC2
DLY2
/RESET
10nF
U1 Fully Shut Down
U1.EN = U2.EN
U1.RC
U1.DLY
U2.RC = U1.OUT
U1.TRC
U.2TDLY
U2.TDLY
U2 Fully Shut Down
U2.DLY
U2.OUT
U1.POR = U.2POR
Functional Block Diagram
IN
Ramp
Control
RCDis
External on
Adjustable Part
RC
Buffer
RC
BGStart
BGDis
Bandgap
Reference
Current
Limit
MIN
AMP
Output Error
Holdoff
Error
Amp
Current
Driver
OUT
Thermal
Shutdown
SNS
Low Voltage
Holdoff
EN
POR
Sequencing
Timer/Controller
DLY
2017 Microchip Technology Inc.
RCDis: Ramp Control Discharge
BGDis: BandGap Shutdown
BGStart: BandGap Startup
GND
DS20005824A-page 3
MIC68400
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage (VIN)....................................................................................................................................................+6V
Enable Input Voltage (VEN) .........................................................................................................................................+6V
POR (VPOR) ..................................................................................................................................................... VIN + 0.3V
RC .................................................................................................................................................................... VIN + 0.3V
Power Dissipation (PD), (Note 1)............................................................................................................Internally Limited
Operating Ratings ‡
Supply Voltage (VIN)................................................................................................................................ +1.65V to +5.5V
Enable Input Voltage (VEN) ................................................................................................................................ 0V to VIN
Ramp Control (VRC) ....................................................................................................................................... 0V to +5.5V
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
‡ Notice: The device is not guaranteed to function outside its operating ratings.
Note 1: The maximum allowable power dissipation of any TA (ambient temperature) is PD(MAX) = TJ(MAX) – TA)/θJA.
Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown.
TABLE 1-1:
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: TA = +25°C with VIN = VOUT + 1V; VEN = VIN; IOUT = 10 mA; bold values indicate –40°C
≤ TJ ≤ +125°C, unless noted. Note 1
Parameter
Symbol
Output Voltage Accuracy
Min.
Typ.
Max.
Units
Conditions
–2
—
2
%
10 mA < IOUT < IL(MAX), VOUT + 1 ≤
VIN ≤ 5.5V
Feedback Voltage
VFB
0.49
0.50
0.51
V
Adjustable version only
Feedback Current
IFB
—
20
—
nA
Adjustable version only
Output Voltage Line
Regulation
—
0.06
0.5
%
VIN = VOUT + 1V to 5.0V
Output Voltage Load
Regulation
—
0.5
1
%
IL = 10 mA to 3A
—
—
400
—
300
500
—
360
800
—
1.2
—
—
20
—
—
55
—
—
90
130
VIN – VO; Dropout Voltage
Ground Pin Current
IGND
IL = 1.5A
mV
IL = 3.0A
IL = 4.0A
IL = 10 mA
mA
IL = 1.5A
IL = 3.0A
IL = 4.0A
Shutdown Current
ISHDN
—
0.01
10
µA
VEN = 0V; VOUT = 0V
Current Limit
ILIMIT
4.0
6.0
—
A
VOUT = 0V; VIN = 3.0V
Start-Up Time
tSU
—
35
150
µs
VEN = VIN; CRC = Open
1
—
—
—
—
0.2
20
120
200
Enable Input
Enable Input Threshold
Enable Hysteresis
DS20005824A-page 4
V
mV
Regulator enable
Regulator shutdown
—
2017 Microchip Technology Inc.
MIC68400
TABLE 1-1:
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: TA = +25°C with VIN = VOUT + 1V; VEN = VIN; IOUT = 10 mA; bold values indicate –40°C
≤ TJ ≤ +125°C, unless noted. Note 1
Parameter
Symbol
Min.
Typ.
Max.
—
0.02
—
—
3
—
—
—
1
—
—
2
—
60
90
7.5
10
12.5
VPOR
10
12.5
15
—
3
—
Delay Current
IDELAY
0.7
1
Delay Voltage (Note 2)
VDELAY
1.185
IRC
IDC(OUT)
Enable Input Current
Units
µA
Conditions
VIL ≤ 0.2V (Regulator shutdown)
VIH ≥ 1V (Regulator enable)
POR Output
POR Leakage Current
IPOR(LEAK)
VPOR(LO)
µA
VPOR = 5.5V; POR = High
mV
Output Logic-Low Voltage
(undervoltage condition),
IPOR = 1 mA
VOUT Ramping Up, Threshold,
Percent of VOUT below nominal
%
VOUT Ramping Down, Threshold,
Percent of VOUT below nominal
1.3
µA
VDELAY = 0.75V
1.235
1.285
V
VPOR = High
0.7
1
1.3
µA
VRC = 0.75V
25
45
70
mA
VOUT = 0.5VNOM, VRAMP =0V
Fixed Tracking Accuracy
(Note 4)
–50
25
100
mV
200 mV < VRC < VTARGET; Measure
(VOUT – VRC)
Adjustable Tracking Accuracy
(Note 4)
–10
15
50
mV
Measure (VOUT – VRC x
(VTARGET/500 mV))
Hysteresis
Ramp Control
Ramp Control Current
Output Discharge Current
(Note 3)
Note 1:
2:
3:
4:
Specification for packaged product only.
Timer High Voltage along with Delay pin current (1 µA nom.) determines the delay per µF of capacitance.
Typical delay is 1.1 sec/µF.
Discharge current is the current drawn from the output to ground to actively discharge the output capacitor
during the shutdown process.
VTARGET is the output voltage of an adjustable with customer resistor divider installed between VOUT and
ADJ/SNS pin, or the rated output voltage of a fixed device.
2017 Microchip Technology Inc.
DS20005824A-page 5
MIC68400
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Junction Temperature Range
TJ
–40
—
+125
°C
—
Storage Temperature Range
TS
–65
—
+150
°C
—
JA
—
30
—
°C/W
—
Temperature Ranges
Package Thermal Resistances
Thermal Resistance 16-LD 4x4 QFN
Note 1:
The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +125°C rating. Sustained junction temperatures above +125°C can impact the device reliability.
DS20005824A-page 6
2017 Microchip Technology Inc.
MIC68400
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
FIGURE 2-1:
Temperature.
Dropout Voltage vs.
FIGURE 2-4:
Current.
Dropout Voltage vs. Output
FIGURE 2-2:
Voltage.
Output Voltage vs. Input
FIGURE 2-5:
Voltage.
Current Limit vs. Input
FIGURE 2-3:
Current.
Ground Current vs. Output
FIGURE 2-6:
Voltage.
Enable Threshold vs. Input
2017 Microchip Technology Inc.
DS20005824A-page 7
MIC68400
FIGURE 2-7:
Voltage.
Ground Current vs. Input
FIGURE 2-10:
Ratio.
Power Supply Rejection
FIGURE 2-8:
Temperature.
Output Voltage vs.
FIGURE 2-11:
Load Regulation.
FIGURE 2-9:
Temperature.
Ground Current vs.
FIGURE 2-12:
Thermal Shutdown.
DS20005824A-page 8
2017 Microchip Technology Inc.
MIC68400
FIGURE 2-13:
Enable Turn-On.
FIGURE 2-14:
Line Transient.
FIGURE 2-15:
Load Transient.
2017 Microchip Technology Inc.
DS20005824A-page 9
MIC68400
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1, 2, 15, 16
VIN
Input: Input voltage supply pin. Place a capacitor to ground to bypass the input supply.
3
DELAY
4
RC
Ramp Control: May be voltage driven for tracking applications or a capacitor to ground
will set the slew rate of output voltage during start-up.
5
EN
Enable (Input): CMOS compatible input. Logic-high = enable, logic-low = shutdown.
6, 14
NC
Not internally connected.
7, 8, Tab
GND
Ground.
9
POR
Power-on Reset: Open-drain output device indicates when the output is in regulation.
High (open) means device is regulating within 10%. POR onset can be delayed using
a single capacitor from Delay to ground.
10 (Fixed)
SNS
Output Voltage Sense Pin: Connect directly to output pin.
10 (Adj.)
ADJ
Adjustable regulators: Feedback input. Connect to resistor voltage divider.
11, 12, 13
VOUT
Output Voltage: Output of voltage regulator. Place capacitor to ground to bypass the
output voltage. Minimum load current is 100 µA. Nominal bypass capacitor is 10 µF.
DS20005824A-page 10
Delay: Capacitor to ground sets internal delay timer. Timer delays power-on reset
(POR) output at turn-on, and ramp down at turn-off.
2017 Microchip Technology Inc.
MIC68400
4.0
APPLICATION INFORMATION
4.1
Enable Input
The MIC68400 features a TTL/CMOS-compatible
positive logic enable input for on/off control of the
device. High (>1V) enables the regulator while low
( 1V
MIC68400-1.5YML
OUT
0.1μF
VOUT2
SNS
IN
RC
U2
Slave
EN
POR
1nF
GND
47N
POR
10μF
DLY
FIGURE 4-1:
Enable Connections for
Logic-Driven Input.
VIN = 3.3V
MIC68400-1.8YML
IN
RC
N
OUT
U1
Master
EN
10nF
IN
U2
Slave
EN
47.
The MIC68400 requires an output capacitor for stable
operation. As a µCap LDO, the MIC68220 can operate
with ceramic output capacitors of 10 µF or greater with
ESR’s ranging from 3 mΩ to over 300 mΩ. Values
greater than 10 µF improve transient response and
noise reduction at high frequencies. X7R/X5R
dielectric-type ceramic capacitors are recommended
because of their superior temperature performance.
X7R-type capacitors change capacitance by 15% over
their operating temperature range and are the most
stable type of ceramic capacitors. Larger output
capacitances can be achieved by placing tantalum or
aluminum electrolytics in parallel with the ceramic
capacitor. For example, a 100 µF electrolytic in parallel
with a 10 µF ceramic can provide the transient and high
frequency noise performance of a 100 µF ceramic at a
significantly lower cost. Specific undershoot/overshoot
performance will depend on both the values and
ESR/ESL of the capacitors.
Adjustable Regulator Design
OUT
10nF
*CFF
0.1μF
VOUT2
SNS
RC
Output Capacitor
10μF
SNS
MIC68400-1.8YML
OUT
0.1μF
4.3
VOUT1
POR
DLY
Input Capacitor
An input capacitor of 0.1 µF or greater is recommended
when the device is more than four inches away from
the bulk supply capacitance, or when the supply is a
battery. Small, surface-mount chip capacitors can be
used for bypassing. The capacitor should be placed
within one inch of the device for optimal performance.
Larger values will help to improve ripple rejection by
bypassing the regulator input, further improving the
integrity of the output voltage.
4.4
47.
~1V/ms
4.2
POR
10μF
POR
R1
COUT
ADJ
0.5V
10μF
DLY
GND
1nF
FIGURE 4-2:
Enable Connection for
VIN-Driven and/or Slow Rise Time Inputs.
If MIC68400 is used in standalone mode, it is not
recommended to connect the enable (EN) pin to the
input voltage supply (IN). In this case, the enable (EN)
input should be externally controlled, as indicated in the
Electrical Characteristics section (regulator enable for
VEN > 1.0V and regulator disable for VEN < 0.2V).
2017 Microchip Technology Inc.
*Required only for large
values of R1 and R2.
FIGURE 4-3:
Resistors.
R2
Adjustable Regulator with
The adjustable MIC68400 output voltage can be
programmed from 0.5V to 5.5V using a resistor divider
from output to the SNS pin. Resistors can be quite
large, up to 1 MΩ because of the very high input
impedance and low bias current of the sense amplifier.
Typical sense input currents are less than 30 nA which
causes less than 0.3% error with R1 and R2 less than
or equal to 100 kΩ. For large value resistors (>50 kΩ)
DS20005824A-page 11
MIC68400
R1 should be bypassed by a small capacitor (CFF =
0.1 µF bypass capacitor) to avoid instability due to
phase lag at the ADJ/SNS input.
The output resistor divider values are calculated by:
EQUATION 4-1:
R1
V OUT = 0.5V ------- + 1
R2
4.5
Power on Reset (POR) and Delay
(DLY)
The power-on reset output (POR) is an open-drain
N-Channel device requiring a pull-up resistor to either
the input voltage or output voltage for proper voltage
levels. POR is driven by the internal timer so that the
release of POR at turn-on can be delayed for as much
as one second. POR is always pulled low when enable
(EN) is pulled low or the output goes out of regulation
by more than 10% due to loading conditions.
The internal timer is controlled by the DLY pin which
has a bidirectional current source and two limiting
comparators. A capacitor connected from DLY to GND
sets the delay time for two functions. On start up, DLY
sets the time from the nominal output voltage is
reached to the release of the POR. At shut down, the
delay sets the time from disable (EN pin driven low) to
actual ramp down of the output voltage. The current
source is ±1 µA, which charges the capacitor from
~150 mV (nominal disabled DLY voltage) to ~1.25V. At
turn on, the DLY cap begins to charge when the output
voltage reaches 90% of the target value. When the
capacitor reaches 1.25V, the output of the POR is
released to go high. At turn off, the DLY cap begins to
discharge when the EN is driven low. When the cap
reaches ~150 mV the output is ramped down. Both
delays are nominally the same, and are calculated by
the same formula:
EQUATION 4-2:
C DLY
t DLY = 1.1 -------------
1A
nominal output voltage is stable for a known time
before the POR is released, and they are further
guaranteed that once POR is pulled low, they have a
known time to ‘tidy up’ memory or other registers for a
well-controlled
shutdown.
In
Master/Slave
configurations, the timers can be used to ensure that
the Master is always accurately regulating when the
Slave is on.
4.6
Ramp Control
The ramp control (RC) has a bidirectional current
source and a sense amplifier, which together are used
to control the voltage at the output. When RC is below
the target voltage (nominal output voltage for fixed
voltage parts, 0.5V for adjustable parts) the RC pin
controls the output voltage. When RC is at or above the
target voltage, the output is controlled by the internal
regulator.
4.6.1
TRACKING APPLICATIONS:
DRIVING RC FROM A VOLTAGE
SOURCE
Fixed Parts: If RC is driven from another (Master)
regulator the two outputs will track each other until the
Master exceeds the target voltage of the Slave
regulator. Typically the output of the MIC68400 will
track above the RC input by 30 mV to 70 mV. This
offset is designed to allow Master/Slave tracking of
same-voltage regulators. Without the offset,
same-voltage Master/Slave configurations could suffer
poor regulation.
Adjustable Parts: The RC pin on adjustable versions
operates from 0V to 0.5V. To implement tracking on an
adjustable version, an external resistor divider must be
used. This divider is the nearly same ratio as the
voltage setting divider used to drive the SNS/ADJ pin.
It is recommended that the ratio be adjusted to track
~50 mV (2% to 3%) above the target voltage if the
Master and Slave are operating at the same target
voltage.
4.6.2
RAMP UP: CAP-CONTROLLED
SLEW RATE
If a capacitor is connected to RC, the bidirectional
current source will charge the cap during startup and
discharge the cap during shutdown. The size of the
capacitor and the RC current (1 µA nom.) control the
slew rate of the output voltage during startup. For
example, to ramp up a 1.8V regulator from zero to full
output in 10 ms requires a 5.6 nF capacitor.
The scale factor is 1.1 seconds/µF, 1.1 ms/nF, or
1.1 µs/pF. tDLYOFF is the time from lowering of EN to the
start of ramp down on the off cycle. TPOR is the time
from the rising of EN to the release (low to high edge)
of the POR. This behavior means that a µProcessor or
other complex logic system is guaranteed that the
DS20005824A-page 12
2017 Microchip Technology Inc.
MIC68400
For Fixed Versions:
EQUATION 4-3:
N
VIN = 3.3V
t RC
C RC
= V OUT ----------
1A
μProcessor
IN1
OUT1
SNS1
RC1
POR1
I/O
4.7μF
EN
SR ON
EN1
1A
= ----------
C RC
DLY1
MIC68400
0.1μF
CDLY1
OUT2
IN2
SNS2
RC2
POR2
EN2
DLY2
CORE
4.7μF
N
Similarly, to slew an adjustable (any output voltage)
from zero to full output in 10 ms requires a 20 nF cap.
/RESET
GND
CDLY2
For Adjustable Versions:
FIGURE 4-4:
EQUATION 4-4:
In the figure below, CDLYS > CDLYM. CDLYS = 2 nF,
CDLYM = 1 nF.
C RC
t RC = 0.5V ----------
1A
4.6.3
1A
SR ON = 2V OUT ----------
C RC
RAMP DOWN: TURN OFF SLEW
RATE
When EN is lowered and the DLY pin has discharged,
the RC pin and the OUT pin slew toward zero. For fixed
voltage devices, the RC pin slew rate is 2 to 3 times the
SRON defined above. For adjustable voltage devices,
the RC pin slew is much higher. In both cases, turn off
slew rate may be determined by the RC pin for low
values of output capacitor, or by the maximum
discharge current available at the output for large
values of output capacitor. Turn off slew rate is not a
specified characteristic of the MIC68400.
4.7
Sequencing Connections.
FIGURE 4-5:
Delayed Sequencing.
In the figure below, CDLYS < CDLYM. CDLYS = 1 nF,
CDLYM = 2 nF.
Sequencing Configurations
Sequencing refers to timing-based Master/Slave
control between regulators. It allows a Master device to
control the start and stop timing of a single or multiple
Slave devices. In typical sequencing the Master POR
drives the Slave EN. The sequence begins with the
Master EN driven high. The Master output ramps up
and triggers the Master DLY when the Master output
reaches 90%. The Master DLY then determines when
the POR is released to enable the Slave device. When
the Master EN is driven low, the Master POR is
immediately pulled low causing the Slave to ramp
down. However, the Master output will not ramp down
until the Master DLY has fully discharged. In this way,
the Master power can remain good after the Slave has
been ramped down.
In sequencing configurations the Master DLY controls
the turn-on time of the Slave and the Slave DLY
controls the turn-off time of the Slave.
2017 Microchip Technology Inc.
FIGURE 4-6:
4.8
4.8.1
Windowed Sequencing.
Tracking Configurations
NORMAL TRACKING
In normal tracking, the Slave RC pin is driven from the
Master output. The internal control buffering ensures
that the output of the Slave is always slightly above the
Master to guarantee that the Slave properly regulates
DS20005824A-page 13
MIC68400
(based on its own internal reference) if Master and
Slave are both fixed voltage devices of the same output
voltage. The schematic and plot below show a 1.2V
device tracking a 1.8V device through the entire
turn-on/turn-off sequence. Note that because the RC
pin will overdrive the target voltage (to ensure proper
regulation), the ramp down delay is longer than the
POR delay during turn-on.
IN
EN
EN
DLY
1nF
MIC68400-1.8YML
IN
OUT
U1
EN
SNS
Master
RC
EN
1nF
DLY
VOUT1
OUT
U1
Master
RC
2nF
N
N
N
10μF
ADJ
GND
POR
MIC68400YML
IN
0.1μF
EN
NC
VIN = 2.5V
N
MIC68400YML
VIN = 3.3V
N
VOUT2
OUT
U2
Slave
N
RC
ADJ
DLY
POR
10μF
N
POR
VOUT1
10μF
POR
GND
1nF
MIC68400-1.2YML
IN
0.1μF
OUT
U2
Slave
EN
SNS
VOUT2
10μF
RC
NC
DLY
POR
POR
FIGURE 4-8:
FIGURE 4-7:
Adjustable Voltage Devices.
Fixed Voltage Devices.
Fixed voltage versions of MIC68400 have two internal
voltage dividers: one for setting the output voltage and
the other for driving the tracking circuitry. Adjustable
parts have up to two external dividers: one from output
to SNS (to set the output voltage) and one from the
output to the Slave RC pin (in tracking configurations).
Also, the RC pin in fixed parts operates at the same
voltage as the output, whereas the RC pin in adjustable
parts operates at the 0.5V reference. To set up a
normal tracking configuration, the divider driving the
Slave RC pin is the same ratio (or nearly the same – if
both Master and Slave are set to the same output
voltage, the Slave RC divider should be adjusted 2% to
4% higher) as the divider driving the Slave SNS pin.
This is shown in Figure 4-8.
DS20005824A-page 14
2017 Microchip Technology Inc.
MIC68400
4.8.2
RATIOMETRIC TRACKING
Ratiometric tracking allows independent ramping
speeds for both regulators so that the regulation
voltage is reached at the same time. This is
accomplished by adding a resistor divider between the
Master output pin and the Slave RC pin. The divider
should be scaled such that the Slave RC pin reaches
or exceeds the target output voltage of the Slave as the
Master reaches its target voltage.
IN
EN
EN
U1
Master
RC
3nF
DLY
1nF
MIC68400-1.8YML
GND
U1
Master
POR
N
MIC68400YML
EN
DLY
VOUT2
OUT
U2
Slave
N
10μF
ADJ
GND
POR
N
POR
N
VOUT1
OUT
EN
EN
N
10μF
ADJ
IN
0.1μF
NC
IN
VOUT1
OUT
RC
VIN = 3.3V
N
MIC68400YML
VIN = 3.3V
SNS
N
POR
N
10μF
RC
1nF
DLY
1nF
GND
MIC68400-1.2YML
IN
0.1μF
EN
VOUT2
OUT
U2
Slave
SNS
GND
POR
10μF
RC
NC
DLY
POR
FIGURE 4-10:
4.9
FIGURE 4-9:
Fixed Voltage Devices.
Ratiometric tracking may be used with adjustable parts
by simply connecting the RC pins of the Master and
Slave. Use a single RC capacitor of twice the normal
value (because twice the current is injected into the
single RC cap). Alternatively, fixed parts may use
ratiometric tracking in a manner similar to adjustable
normal tracking, with the tracking divider changed to
the same resistor ratio driving the Master ADJ/SNS pin.
2017 Microchip Technology Inc.
Adjustable Voltage Devices.
Final Note on Tracking
The MIC68400 does not fully shut down until the output
load is discharged to near zero. If RC is driven from an
external source in a tracking configuration, and the
external source does not go to zero on shutdown, it
may prevent complete shutdown of the MIC68400. This
will cause no damage, but some Q current will remain
and may cause concern in battery operated portable
equipment. Also, when RC is driven in tracking mode,
pulling EN low will not cause the output to drop.
Maintaining low EN in tracking mode simply means that
the MIC68400 will shutdown when the tracking voltage
gets near zero. In no case can the MIC68400 enter the
tracking mode unless EN is pulled high.
DS20005824A-page 15
MIC68400
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
16-Lead QFN*
(Fixed)
XXXXXX.XXXX
WNNN
16-Lead QFN*
(Adjustable)
XXXXX
XXX
WNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Example
684001.2YML
6026
Example
68400
YML
2943
Product code or customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note:
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) and/or Overbar (⎯) symbol may not be to scale.
DS20005824A-page 16
2017 Microchip Technology Inc.
MIC68400
16-Lead 4 mm x 4 mm QFN Package Outline and Recommended Land Pattern
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging.
2017 Microchip Technology Inc.
DS20005824A-page 17
MIC68400
NOTES:
DS20005824A-page 18
2017 Microchip Technology Inc.
MIC68400
APPENDIX A:
REVISION HISTORY
Revision A (August 2017)
• Converted Micrel document MIC68400 to Microchip data sheet DS20005824A.
• Minor text changes throughout.
• Paragraph added after Figure 4-2 in Section 4.2
“Input Capacitor”.
2017 Microchip Technology Inc.
DS20005824A-page 19
MIC68400
DS20005824A-page 20
2017 Microchip Technology Inc.
MIC68400
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART NO.
Device
Device:
Examples:
–X.X
X
XX
a) MIC68400-1.2YML-TR: 4A Sequencing LDO with
Tracking and Ramp Control,
1.2V, –40°C to +125°C,
16-Lead QFN, 5,000/Reel
Voltage Temperature Package Media Type
MIC68400:
4A Sequencing LDO with Tracking and
Ramp Control
1.2 =
1.8 =
blank=
1.2V
1.8V
Adjustable
Temperature:
Y
=
–40°C to +125°C
Package:
ML
=
16-Lead 4 mm x 4 mm QFN
Media Type:
TR
=
5,000/Reel
Voltage:
–XX
2017 Microchip Technology Inc.
b) MIC68400-1.8YML-TR: 4A Sequencing LDO with,
Tracking and Ramp Control
1.8V, –40°C to +125°C,
16-Lead QFN, 5,000/Reel
c) MIC68400YML-TR:
Note 1:
4A Sequencing LDO with,
Tracking and Ramp Control
Adjustable Voltage,
–40°C to +125°C, 16-Lead
QFN, 5,000/Reel
Tape and Reel identifier only appears in the
catalog part number description. This identifier is
used for ordering purposes and is not printed on
the device package. Check with your Microchip
Sales Office for package availability with the
Tape and Reel option.
DS20005824A-page 21
MIC68400
NOTES:
DS20005824A-page 22
2017 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2017, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-2075-0
== ISO/TS 16949 ==
2017 Microchip Technology Inc.
DS20005824A-page 23
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DS20005824A-page 24
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11/07/16
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