PIC16F15344-I/SS

PIC16(L)F153XX Cost-Effective 8 to 48 Pins Microcontroller Product Brief Description PIC16(L)F153XX microcontrollers feature Intelligent Analog, Core Independent Peripherals (CIPs) and communication peripherals combined with eXtreme Low-Power (XLP) for a wide range of general purpose and low-power applications. The family features PWMs, multiple communication, temperature sensor and memory features like Memory Access Partition (MAP) and Device Information Area (DIA). The products are offered in a broad range of pin counts from 8 to 48 pins, to support customers in various applications. Core Features Power-Saving Functionality • C Compiler Optimized RISC Architecture • Only 49 Instructions • Operating Speed: - DC – 32 MHz clock input - 125 ns minimum instruction cycle • Interrupt Capability • 16-Level Deep Hardware Stack • Timers: - 8-bit (TMR2) with Hardware Limit Timer (HLT) Extension - 16-bit (TMR0/1) • Low-Current Power-on Reset (POR) • Configurable Power-up Timer (PWRTE) • Brown-out Reset (BOR) with Fast Recovery • Low-Power BOR (LPBOR) Option • Windowed Watchdog Timer (WWDT): - Variable prescaler selection - Variable window size selection - All sources configurable in hardware or software • Programmable Code Protection • Doze mode: - Ability to run CPU core slower than the system clock • Idle mode: - Ability to halt CPU core while internal peripherals continue operating • Sleep mode: - Lowest power consumption • Peripheral Module Disable (PMD): - Ability to disable hardware module to minimize power consumption of unused peripherals Memory • • • • Up to 28 KB Flash Program Memory Up to 2 KB Data SRAM Memory Direct, Indirect and Relative Addressing modes Memory Access Partition (MAP): - Write protect - Customizable Partition • Device Information Area (DIA) Operating Characteristics • Operating Voltage Range: - 1.8V to 3.6V (PIC16LF153XX) - 2.3V to 5.5V (PIC16F153XX) • Temperature Range: - Industrial: -40°C to 85°C - Extended: -40°C to 125°C  2016 Microchip Technology Inc. eXtreme Low-Power (XLP) Features • • • • Sleep mode: 50 nA @ 1.8V, typical Watchdog Timer: 500 nA @ 1.8V, typical Secondary Oscillator: 500 nA @ 32 kHz Operating Current: - 8 uA @ 32 kHz, 1.8V, typical - 32 uA/MHz @ 1.8V, typical Digital Peripherals • Four Configurable Logic Cells (CLCs): - Integrated combinational and sequential logic • Complementary Waveform Generator (CWG): - Rising and Falling edge dead-band control - Full-bridge, half-bridge, 1-channel drive - Multiple signal sources • Two Capture/Compare/PWM (CCP) modules • Four 10-bit PWMs • Numerically Controlled Oscillator (NCO): - Generates true linear frequency control and increased frequency resolution - Input Clock: 0 Hz < fNCO < 32 MHz - Resolution: fNCO/220 • Peripheral Pin Select (PPS): - Enables pin mapping of digital I/O Advance Information DS40001835A-page 1 PIC16(L)F153XX • Communication: - Up to two EUSART, RS-232, RS-485, LIN compatible - Up to two SPI - Two I2C, SMBus, PMBus™ compatible • Up to 44 I/O Pins - Individually programmable pull-ups slew rate control Interrupt-on-Change with edge-select Analog Peripherals • Analog-to-Digital Converter (ADC): - 10-bit with up to 43 external channels - Conversion available during Sleep • Two Comparator: - Low-Power/High-Speed mode - Fixed Voltage Reference at (non)inverting input(s) - Comparator outputs externally accessible • 5-Bit Digital-to-Analog Converter (DAC): - 5-bit resolution, rail-to-rail - Positive Reference Selection - Unbuffered I/O pin output - Internal connections to ADCs and comparators • Voltage Reference: - Fixed Voltage Reference with 1.024V, 2.048V and 4.096V output level Flexible Oscillator Structure • High-Precision Internal Oscillator: - Selectable frequency range up to 32 MHz - ±1% at calibration (nominal) • x2/x4 PLL with Internal and External Sources • Low-Power Internal 32 kHz Oscillator (LFINTOSC) • External 32 kHz Crystal Oscillator (SOCS) • External Oscillator Block with: - Three crystal/resonator modes up to 20 MHz - Three external clock modes up to 20 MHz - Fail-Safe Clock Monitor - Allows for safe shutdown if peripherals clock stops - Oscillator Start-up Timer (OST) - Ensures stability of crystal oscillator sources DS40001835A-page 2 Advance Information  2016 Microchip Technology Inc. PIC16(L)F153XX 8-Bit/ (with HLT) Timer 16-Bit Timer Window Watchdog Timer CCP/10-Bit PWM NCO CLC Zero Cross Detect Temperature Sensor Device Information Area EUSART/ I2C/SPI Peripheral Module Disable Debug (1) 1 1 1 2 Y 2/4 1 1 4 Y Y Y Y 1/1 Y Y I Peripheral Pin Select Comparator 5 Memory Access Partition 5-Bit DAC 6 CWG 10-Bit ADC Data SRAM (bytes) Storage Area Flash (B) 3.5 224 256 I/O Pins PIC16F15313 (C) 2 Program Flash Memory (KB) Device Program Flash Memory (KW) PIC16(L)F153XX FAMILY TYPES Data Sheet Index TABLE 1: PIC16F15323 (C) 2 3.5 224 256 12 11 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 1/1 Y Y I PIC16F15324 (D) 4 7 224 512 12 11 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/1 Y Y I PIC16F15325 (B) 8 14 224 1024 12 11 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/1 Y Y I PIC16F15344 (D) 4 7 224 512 18 17 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/1 Y Y I PIC16F15345 (B) 8 14 224 1024 18 17 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/1 Y Y I PIC16F15354 (A) 4 7 224 512 24 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/2 Y Y I 25 PIC16F15355 (A) 8 14 224 1024 25 24 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/2 Y Y I PIC16F15356 (E) 16 28 224 2048 25 24 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/2 Y Y I PIC16F15375 (F) 8 14 224 1024 36 35 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/2 Y Y I PIC16F15376 (E) 16 28 224 2048 36 35 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/2 Y Y I PIC16F15385 (F) 8 14 224 1024 44 43 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/2 Y Y I PIC16F15386 (E) 16 28 224 2048 44 43 1 2 1 2 Y 2/4 1 1 4 Y Y Y Y 2/2 Y Y I Note 1: I - Debugging integrated on chip. Data Sheet Index: A: Future Release PIC16(L)F15354/5 Data Sheet, 28-Pin B: Future Release PIC16(L)F15325/45 Data Sheet, 14/20-Pin C: Future Release PIC16(L)F15313/23 Data Sheet, 8/14-Pin D: Future Release PIC16(L)F15324/44 Data Sheet, 14/20-Pin E: Future Release PIC16(L)F15356/76/86 Data Sheet, 28/40/48-Pin F: Future Release PIC16(L)F15375/85 Data Sheet, 40/48-Pin Note: For other small form-factor package availability and marking information, visit www.microchip.com/packaging or contact your local sales office.  2016 Microchip Technology Inc. Advance Information DS40001835A-page 3 PIC16(L)F153XX TABLE 2: PACKAGES Device (S)PDIP SOIC SSOP TSSOP (U)DFN QFN (3x3) (4x4) QFN UQFN QFN UQFN UQFN TQFP (6x6) (4x4) (8x8) (5x5) (6x6) PIC16(L)F15313 X X — — X — — — — — — — PIC16(L)F15323 X X — X — X — X — — — — PIC16(L)F15324 X X — X — X — X — — — — PIC16(L)F15325 X X — X — X — X — — — — PIC16(L)F15344 X X X — — X — X — — — — PIC16(L)F15345 X X X — — X — X — — — — PIC16(L)F15354 X X X — — — X X — — — — PIC16(L)F15355 X X X — — — X X — — — — PIC16(L)F15356 X X X — — — X X — — — — PIC16(L)F15375 X — — — — — — — X X X — PIC16(L)F15376 X — — — — — — — X X X — PIC16(L)F15385 — — — — — — — — X — — X PIC16(L)F15386 — — — — — — — — X — — X Note: Pin details are subject to change. DS40001835A-page 4 Advance Information  2016 Microchip Technology Inc. PIC16(L)F153XX PIN DIAGRAMS VDD RA5 RA4 VPP/MCLR/RA3 See Table 3 for location of all peripheral functions. 14-PIN PDIP, SOIC, TSSOP FOR PIC16(L)F15323 FIGURE 3: FIGURE 4: VSS RA0/ICSPDAT RA1/ICSPCLK RA2 RC0 RC1 RC2 14-PIN PDIP, TSSOP FOR PIC16(L)F15324 AND PIC16(L)F15325 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VSS RA0/ICSPDAT RA1/ICSPCLK RA2 RC0 RC1 RC2 See Table 4 for location of all peripheral functions. 20-PIN PDIP, SOIC, SSOP FOR PIC16(L)F15344, PIC16(L)F15345 VDD 1 20 VSS RA5 2 RA4 3 19 RA0/ICSPDAT 18 RA1/ICSPCLK 17 RA2 16 RC0 15 RC1 14 RC2 13 RB4 RC7 9 12 RB5 RB7 10 11 RB6 MCLR/VPP/RA3 4 RC5 5 RC4 6 RC3 7 RC6 8 Note: 14 13 12 11 10 9 8 See Table 4 for location of all peripheral functions. VDD RA5 RA4 VPP/MCLR/RA3 RC5 RC4 RC3 Note: 1 2 3 4 5 6 7 PIC16(L)F15323 VDD RA5 RA4 VPP/MCLR/RA3 RC5 RC4 RC3 Note: VSS RA0/ICSPDAT RA1/ICSPCLK RA2 8 7 6 5 PIC16(L)F15325 FIGURE 2: 1 2 3 4 PIC16(L)F15324 Note: PIC16(L)F15313 8-PIN PDIP, SOIC, MSOP, FOR PIC16(L)F15313 PIC16(L)F15344 PIC16(L)F15345 FIGURE 1: See Table 4 for location of all peripheral functions.  2016 Microchip Technology Inc. Advance Information DS40001835A-page 5 PIC16(L)F153XX Note: FIGURE 6: Note: 28-PIN PDIP, SOIC, SSOP FOR PIC16(L)F15354, PIC16(L)F15355, PIC16(L)F15356 1 28 RB7/ICSPDAT RA0 2 27 RB6/ICSPCLK RA1 3 26 RB5 RA2 4 25 RB4 RA3 5 24 RB3 RA4 6 23 RB2 RA5 VSS 7 22 21 RB1 RB0 RA7 9 20 VDD 19 VSS 8 PIC16(L)F15354 PIC16(L)F15355 PIC16(L)F15356 VPP/MCLR/RE3 RA6 10 RC0 11 18 RC7 RC1 12 17 RC6 RC2 13 16 RC5 RC3 14 15 RC4 See Table 5 for location of all peripheral functions. 40-PIN PDIP FOR PIC16(L)F15375, PIC16(L)F15376 VPP/MCLR/RE3 1 40 RB7/ICSPDAT RA0 2 39 RB6/ICSPCLK RA1 3 38 RB5 RA2 4 37 RB4 RA3 5 36 RB3 RA4 6 35 RB2 RA5 RE0 7 34 RB1 8 33 RB0 RE1 9 RE2 10 VDD 11 VSS 12 RA7 13 RA6 RC0 PIC16(L)F15375 PIC16(L)F15376 FIGURE 5: 32 VDD 31 VSS 30 RD7 29 RD6 28 RD5 14 27 RD4 15 26 RC7 RC1 16 25 RC6 RC2 17 24 RC5 RC3 18 23 RD0 19 22 RC4 RD3 RD1 20 21 RD2 See Table 6 for location of all peripheral functions. DS40001835A-page 6 Advance Information  2016 Microchip Technology Inc. PIC16(L)F153XX 16-PIN QFN/UQFN (4X4) FOR PIC16(L)F15323, PIC16(L)F15324, PIC16(L)F15325 VDD NC NC Vss FIGURE 7: 16 15 14 13 RA5 RA4 MCLR/VPP/RA3 RC5 1 2 3 4 PIC16(L)F15323 PIC16(L)F15324 PIC16(L)F15325 12 11 10 9 RA0/ICSPDAT RA1/ICSPCLK RA2 RC0 RC4 RC3 RC2 RC1 5 6 7 8 Note 1: 2: It is recommended that the exposed bottom pad be connected to VSS. 20-PIN QFN/UQFN (4x4) FOR PIC16(L)F15344 AND PIC16(L)F15345 RA4 RA5 VDD Vss RA0/ICSPDAT FIGURE 8: See Table 4 for location of all peripheral functions. RA3/MCLR/VPP RC5 RC4 RC3 RC6 1 2 3 4 5 P P I IC 1 C 6( 16 L ) (L F1 )F 5 3 15 4 34 4 5 20 19 18 17 16 15 14 13 12 11 RA1/ICSPCLK RA2 RC0 RC1 RC2 RC7 RB7 RB6 RB5 RB4 6 7 8 9 10 Note 1: 2: See Table 4 for location of all peripheral functions. It is recommended that the exposed bottom pad be connected to VSS.  2016 Microchip Technology Inc. Advance Information DS40001835A-page 7 PIC16(L)F153XX 28-PIN UQFN (4X4) FOR PIC16(L)F15354, PIC16(L)F15355, PIC16(L)F15356 28 27 26 25 24 23 22 RA1 RA0 RE3/MCLR/VPP RB7/ICSPDAT RB6/ICSPCLK RB5 RB4 FIGURE 9: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PIC16(L)F15354 PIC16(L)F15355 PIC16(L)F15356 21 20 19 18 17 16 15 RB3 RB2 RB1 RB0 VDD VSS RC7 RC0 RC1 RC2 RC3 RC4 RC5 RC6 RA2 RA3 RA4 RA5 VSS RA7 RA6 Note: 28-PIN QFN (6X6) FOR PIC16(L)F15354, PIC16(L)F15355, PIC16(L)F15356 28 27 26 25 24 23 22 RA1 RA0 RE3/MCLR/VPP RB7/ICSPDAT RB6/ICSPCLK RB5 RB4 FIGURE 10: See Table 5 or the pin allocation tables. PIC16(L)F15354 PIC16(L)F15355 PIC16(L)F15356 8 9 10 11 12 13 14 1 2 3 4 5 6 7 21 20 19 18 17 16 15 RB3 RB2 RB1 RB0 VDD VSS RC7 RC0 RC1 RC2 RC3 RC4 RC5 RC6 RA2 RA3 RA4 RA5 VSS RA7 RA6 Note: See Table 5 or the pin allocation tables. DS40001835A-page 8 Advance Information  2016 Microchip Technology Inc. PIC16(L)F153XX 40-PIN UQFN (5X5) FOR PIC16(L)F15375, PIC16(L)F15376 31 32 34 33 35 36 37 38 39 1 2 30 3 29 4 28 5 27 PIC16(L)F15375 PIC16(L)F15376 6 26 7 25 8 24 23 9 20 19 18 17 16 15 14 13 22 21 RC0 RA6 RA7 VSS VDD RE2 RE1 RE0 RA5 RA4 RB3 RB4 RB5 ICSPCLK/RB6 ICSPDAT/RB7 VPP/MCLR/RE3 RA0 RA1 RA2 RA3 11 10 12 RC7 RD4 RD5 RD6 RD7 VSS VDD RB0 RB1 RB2 40 RC6 RC5 RC4 RD3 RD2 RD1 RD0 RC3 RC2 RC1 FIGURE 11: Note: 44-PIN TQFP (10X10) FOR PIC16(L)F15375, PIC16(L)F15376 44 43 42 41 40 39 38 37 36 35 34 RC6 RC5 RC4 RD3 RD2 RD1 RD0 RC3 RC2 RC1 NC FIGURE 12: See Table 6 for the pin allocation tables. Note 1: 2: 33 32 31 30 29 28 27 26 25 24 23 NC RC0 RA6 RA7 VSS VDD RE2 RE1 RE0 RA5 RA4 12 13 14 15 16 17 18 19 20 21 22 PIC16(L)F15375 PIC16(L)F15376 NC RD5 RD6 RD7 VSS VDD RB0 RB1 RB2 RB3 1 2 3 4 5 6 7 8 9 10 11 NC RB4 RB5 ICSPCLK/RB6 ICSPDAT/RB7 VPP/MCLR/RE3 AN0/RA0 RA1 RA2 RA3 RC7 RD4 See Table 6 for location of all peripheral functions. All VDD and all VSS pins must be connected at the circuit board level. Allowing one or more VSS or VDD pins to float may result in degraded electrical performance or non-functionality.  2016 Microchip Technology Inc. Advance Information DS40001835A-page 9 PIC16(L)F153XX 44-PIN QFN (8X8X0.9) FOR PIC16(L)F15375, PIC16(L)F15376 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 PIC16(L)F15375 PIC16(L)F15376 33 32 31 30 29 28 27 26 25 24 23 RA6 RA7 NC VSS NC VDD RE2 RE1 RE0 RA5 RA4 RB3 NC RB4 RB5 ICSPCLK/RB6 ICSPDAT/RB7 VPP/MCLR/RE3 RA0 RA1 RA2 RA3 RC7 RD4 RD5 RD6 RD7 VSS VDD NC RB0 RB1 RB2 44 43 42 41 40 39 38 37 36 35 34 RC6 RC5 RC4 RD3 RD2 RD1 RD0 RC3 RC2 RC1 RC0 FIGURE 13: Note 1: 2: See Table 6 for location of all peripheral functions. All VDD and all VSS pins must be connected at the circuit board level. Allowing one or more VSS or VDD pins to float may result in degraded electrical performance or non-functionality. 3: The bottom pad of the QFN/UQFN package should be connected to VSS at the circuit board level. 4: No internal connection; reserved for backwards compatibility with previous 44-pin devices (VSS connection). 5: No internal connection; reserved for backwards compatibility with previous 44-pin devices (VDD connection). RF1 RF2 RF3 RC2 RC3 RD0 RD1 RD2 RD3 RC4 RC5 48-PIN UQFN (6X6) FOR PIC16(L)F15385, PIC16(L)F15386 RC6 FIGURE 14: 48 47 46 45 44 43 42 41 40 39 38 37 1 36 RF0 RD4 2 35 RC1 RD5 3 34 RC0 RD6 4 33 RA6 RD7 5 32 RA7 VSS 6 31 VSS VDD RC7 PIC16(L)F15385 PIC16(L)F15386 VDD 7 30 RB0 8 29 RE2 RB1 9 28 RE1 RB2 10 27 RE0 RB3 11 26 RA5 RF4 12 25 RA4 Note: RA3 RA2 RA1 RA0 ICSPDAT/RB7 VPP/MCLR/RE3 RB5 ICSPCLK/RB6 RB4 RF7 RF6 RF5 13 14 15 16 17 18 19 20 21 22 23 24 See Table 7 for location of all peripheral functions. DS40001835A-page 10 Advance Information  2016 Microchip Technology Inc. PIC16(L)F153XX Note: RC6 RC5 RC4 RD3 RD2 RD1 RD0 RC3 RC2 RF3 RF2 RF1 45 44 43 42 41 40 39 38 37 5 6 7 8 9 10 11 12 PIC16(L)F15385 16 17 18 19 20 21 22 23 24 PIC16(L)F15386 RB4 RB5 ICSPCLK/RB6 ICSPDAT/RB7 VPP/MCLR/RE3 RA0 RA1 RA2 RA3 RD5 RD6 RD7 VSS VDD RB0 RB1 RB2 RB3 RF4 1 2 3 4 13 14 15 RC7 RD4 48 47 46 48-PIN TQFP (7X7) FOR PIC16(L)F15385, PIC16(L)F15386 RF5 RF6 RF7 FIGURE 15: 36 35 34 33 32 31 30 29 28 27 26 25 RF0 RC1 RC0 RA6 RA7 VSS VDD RE2 RE1 RE0 RA5 RA4 See Table 7 for location of all peripheral functions.  2016 Microchip Technology Inc. Advance Information DS40001835A-page 11 Comparator NCO DAC Timers CCP PWM CWG MSSP ZCD EUSART CLC CLKR Interrupt Pull-up Basic RA0 7 ANA0 ― C1IN0+ ― DAC1OUT ― ― ― ― ― ― TX/CK(1) CLCIN3(1) ― IOCA0 Y ICDDAT/ ICSPDAT RA1 6 ANA1 VREF+ C1IN0- ― DA1REF+ T0CKI(1) ― ― ― SSP1CLK(1),(4) SSP1DAT(1),(4) ― RX/DT(1) CLCIN2(1) ― IOCA1 Y ICDCLK/ ICSPCLK RA2 5 ANA2 VREF- ― ― DAC1REF- ― ― ― CWG1(1) SSP1CLK(1),(4) SSP1DAT(1),(4) ZCD1 ― ― ― INT(1) IOCA2 Y ― RA3 4 ― ― ― ― ― ― ― ― ― SSP1SS(1) ― ― CLCIN0(1) ― IOCA3 Y MCLR VPP RA4 3 ANA4 ― C1IN1- ― ― T1G(1) SOSCO ― ― ― ― ― ― ― ― IOCA4 Y CLKOUT OSC2 RA5 2 ANA5 ADACT(1) ― ― ― ― T1CKI(1) T2IN(1) SOSCIN SOSCI CCP1(1) CCP2(1) ― ― ― ― ― CLCIN1(1) ― IOCA5 Y CLKIN OSC1 EIN VDD 1 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VDD VSS 8 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VSS ― ― ― C1OUT NCO1OUT ― TMR0 CCP1 PWM3 CWG1A SDO1 ― DT1(3) CLC1OUT CLKR ― ― ― ― ― ― C2OUT ― ― CCP2 PWM4 CWG1B SCK1 ― CK1 CLC2OUT ― ― ― ― I/O(2) Reference Advance Information ADC 8-PIN ALLOCATION TABLE (PIC16(L)F15313) 8-Pin PDIP/SOIC/ MSOP TABLE 3: OUT(2) Note 1: 2: 3: 4: ― ― ― ― ― ― ― ― ― PWM5 CWG1C SCL1(3),(4) ― TX1 CLC3OUT ― ― ― ― ― ― ― ― ― ― ― ― PWM6 CWG1D SDA1(3),(4) ― ― CLC4OUT ― ― ― ― This is a PPS remappable input signal. The input function may be moved from the default location shown to one of several other PORTx pins. All digital output signals shown in this row are PPS re-mappable. These signals may be mapped to output onto one of several PORTx pin options. This is a bidirectional signal. For normal module operation, the firmware should map this signal to the same pin in both the PPS input and PPS output registers. These pins are configured for I2C logic levels. PPS assignments to the other pins will operate, but input logic levels will be standard TTL/ST as selected by the INLVL register, instead of the I2C specific or SMBUS input buffer thresholds. PIC16(L)F153XX DS40001835A-page 12 PIN ALLOCATION TABLES  2016 Microchip Technology Inc. ANA1 VREF+ C1IN0- ― DA1REF+ RA2 11 10 17 14 ANA2 VREF- ― ― RA3 4 3 4 1 ― ― ― RA4 3 2 3 20 ANA4 ― RA5 2 1 2 19 ANA5 RC0 10 9 16 13 RC1 9 8 15 RC2 8 7 RC3 7 RC4 DAC NCO Reference Basic 15 Pull-up 18 Interrupt 11 CLKR 12 CLC RA1 EUSART DAC1OUT ― ZCD ― MSSP C1IN0+ CWG ― PWM ANA0 CCP 16 Timers 19 Comparator 20-Pin QFN 12 ADC 20-Pin PDIP/SOIC/SSOP 13 DS40001835A-page 13 ― ― ― ― ― ― ― ― IOCA0 Y ICDDAT/ ICSPDAT T0CKI(1) ― ― ― ― ― ― ― ― IOCA1 Y ICDCLK/ ICSPCLK DAC1REF- ― ― ― CWG1(1) ― ZCD1 ― CLCIN0(1),(6) ― INT(1) IOCA2 Y ― ― ― ― ― ― ― ― ― ― ― ― IOCA3 Y MCLR VPP C1IN1- ― ― T1G(1) SOSCO ― ― ― ― ― ― ― ― IOCA4 Y CLKOUT OSC2 ― ― ― ― T1CKI(1) T2IN SOSCIN SOSCI ― ― ― ― ― CLCIN3(1),(5) ― IOCA5 Y CLKIN OSC1 EIN ANC0 ― C2IN0+ ― ― ― ― ― ― SSP1CLK(1),(5) SSP1DAT(1),(5) ― ― ― ― IOCC0 Y ― 12 ANC1 ― C1IN1C2IN1- ― ― ― ― ― ― SSP1CLK(1),(5) SSP1DAT(1),(5) ― ― CLCIN2(1),(5) ― IOCC1 Y ― 14 11 ANC2 ― C1IN2C2IN2- ― ― ― ― ― ― ― ― ― ― ― IOCC2 Y ― 6 7 4 ANC3 ― C1IN3C2IN3- ― ― ― CCP2 ― ― SSP1SS(5) ― ― CLCIN1(1),(6) ― CLCIN0(1),(5) IOCC3 Y ― 6 5 6 3 ANC4 ― ― ― ― ― ― ― ― SSP2CLK(1),(5) SSP2DAT(1),(5) ― TX1/CK1(5) CLCIN1(1),(5) ― IOCC4 Y ― RC5 5 4 5 2 ANC5 ― ― ― ― ― CCP1 ― ― SSP1CLK(1),(5) SSP1DAT(1),(5) ― RX1/DT1(5) ― ― IOCC5 Y ― RC6 ― ― 8 5 ANC6 ― ― ― ― ― ― ― ― SSP1SS1(6) ― ― ― ― IOCC6 Y ― RC7 ― ― 9 6 ANC7 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCC7 Y ― RB4 ― ― 13 10 ANB4 ― ADACT(1) ― ― ― ― ― ― ― SSP1CLK(1),(6) SSP1DAT(1),(6) ― ― CLCIN2(1),(6) ― IOCB4 ― ― RB5 ― ― 12 9 ANB5 ― ― ― ― ― ― ― SSP2CLK(1),(6) SSP2DAT(1),(6) ― RX1/DT1(6) CLCIN3(1),(6) ― IOCB5 ― ― ― PIC16(L)F153XX 16-Pin QFN/UQFN Advance Information 14-Pin PDIP/SOIC/TSSOP 14/16/20-PIN ALLOCATION TABLE (PIC16(L)F15323, PIC16(L)F15324, PIC16(L)F15325, PIC16(L)F15344, PIC16(L)F15345) RA0 I/O(2)  2016 Microchip Technology Inc. TABLE 4: ― ― ― ― ― SSP1CLK(1),(6) SSP1DAT(1),(6) ― ― ― ― IOCB6 Y ― RB7 ― ― 10 7 ANB7 ― ― ― ― ― ― ― ― SSP2CLK(1),(6) SSP2DAT(1),(6) ― TX1/CK1(6) ― ― IOCB7 Y ― VDD 1 16 1 18 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VDD VSS 14 13 20 17 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VSS ― ― ― ― ― ― C1OUT NCO1OUT ― TMR0 CCP1 PWM3 CWG1A SDO1 SDO2 ― DT1(3) CLC1OUT CLKR ― ― ― ― ― ― ― ― ― C2OUT ― ― ― CCP2 PWM4 CWG1B SCK1 SCK2 ― CK1 CLC2OUT ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― PWM5 CWG1C SCL1(3),(4) SCL2(3),(4) ― TX1 CLC3OUT ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― PWM6 CWG1D SDA1(3),(4) SDA2(3),(4) ― ― CLC4OUT ― ― ― ― OUT(2) Note 1: 2: 3: 4: 5: 6: Basic CLC ZCD CWG CCP DAC NCO Reference Pull-up ― Interrupt ― CLKR ― EUSART ANB6 MSSP 8 PWM 11 Timers ― Comparator 20-Pin QFN ― ADC 20-Pin PDIP/SOIC/SSOP RB6 I/O(2) 16-Pin QFN/UQFN Advance Information 14-Pin PDIP/SOIC/TSSOP 14/16/20-PIN ALLOCATION TABLE (PIC16(L)F15323, PIC16(L)F15324, PIC16(L)F15325, PIC16(L)F15344, PIC16(L)F15345) This is a PPS re-mappable input signal. The input function may be moved from the default location shown to one of several other PORTx pins. All digital output signals shown in this row are PPS re-mappable. These signals may be mapped to output onto one of several PORTx pin options. This is a bidirectional signal. For normal module operation, the firmware should map this signal to the same pin in both the PPS input and PPS output registers. These pins are configured for I2C logic levels. PPS assignments to the other pins will operate, but input logic levels will be standard TTL/ST as selected by the INLVL register, instead of the I2C specific or SMBUS input buffer thresholds. For 14 and 16-pin package only. For 20-pin package only. PIC16(L)F153XX DS40001835A-page 14 TABLE 4:  2016 Microchip Technology Inc. ― ― ― ― ― ― ― ― CLCIN0(1) ― IOCA0 Y ― RA1 3 28 ANA1 ― C1IN1C2IN1- ― ― ― ― ― ― ― ― ― CLCIN1(1) ― IOCA1 Y ― RA2 4 1 ANA2 ― C1IN0+ C2IN0+ ― ― ― ― ― ― ― ― ― ― ― IOCA2 Y ― ― Basic CLC ZCD CWG PWM CCP DAC NCO Reference Pull―up ― Interrupt C1IN0C2IN0- CLKR ― EUSART ANA0 MSSP 27 Timers ADC 2 Comparator 28-Pin (U)QFN Advance Information 28-Pin PDIP/SOIC/SSOP 28-PIN ALLOCATION TABLE (PIC16(L)F15354, PIC16(L)F15355, PIC16(L)F15356) RA0 I/O(2)  2016 Microchip Technology Inc. TABLE 5: RA3 5 2 ANA3 VREF+ C1IN1+ ― DACREF+ ― ― ― ― ― ― ― ― ― IOCA3 Y RA4 6 3 ANA4 ― ― ― ― T0CKI ― ― ― ― ― ― ― ― IOCA4 Y ― RA5 7 4 ANA5 ― ― ― ― T1G(1) ― ― ― SSP1SS(1) ― ― ― ― IOCA5 Y ― 10 7 ANA6 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCA6 Y CLKOUT RA7 9 6 ANA7 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCA7 Y CLKIN RB0 21 18 ANB0 ― C2IN1+ ― ― ― ― ― CWG1(1) SSP2SS(1) ZCD1 ― ― ― INT(1) IOCB0 Y ― RB1 22 19 ANB1 ― C1IN3C2IN3- ― ― ― ― ― ― SSP1CLK(1) SSP1DAT(1) ― ― ― ― IOCB1 Y ― RB2 23 20 ANB2 ― ― ― ― ― ― ― ― SSP1CLK(1) SSP1DAT(1) ― ― ― ― IOCB2 Y ― RB3 24 21 ANB3 ― C1IN2C2IN2- ― ― ― ― ― ― ― ― ― ― ― IOCB3 Y ― RB4 25 22 ANB4 ― ADACT(1) ― ― ― ― ― ― ― ― ― ― ― ― IOCB4 Y ― DS40001835A-page 15 RB5 26 23 ANB5 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCB5 Y ― RB6 27 24 ANB6 ― ― ― ― ― ― ― ― ― ― TX2 CK2(1) CLCIN2(1) ― IOCB6 Y ICDCLK ICSPCLK RB7 28 25 ANB7 ― ― ― DAC1OUT2 ― ― ― ― ― ― RX2 DT2(1) CLCIN3(1) ― IOCB7 Y ICDDAT ICSPDAT RC0 11 8 ANC0 ― ― ― ― SOSCO ― T1CKI ― ― ― ― ― ― ― IOCC0 Y ― RC1 12 9 ANC1 ― ― ― ― SOSCI CCP2(1) ― ― ― ― ― ― ― IOCC1 Y ― RC2 13 10 ANC2 ― ― ― ― ― CCP1(1) ― ― ― ― ― ― ― IOCC2 Y ― RC3 14 11 ANC3 ― ― ― ― T2IN(1) ― ― ― SSP1CLK(1) SSP1DAT(1) ― ― ― ― IOCC3 Y ― RC4 15 12 ANC4 ― ― ― ― ― ― ― ― SSP1CLK(1) SSP1DAT(1) ― ― ― ― IOCC4 Y ― PIC16(L)F153XX RA6 ― ― ― ― ― ― ― ― ― ― IOCC5 Y ― ― ― ― ― ― ― ― ― TX1 CK1(1) ― ― IOCC6 Y ― RC7 18 15 ANC7 ― ― ― ― ― ― ― ― ― ― RX1 DT1(1) ― ― IOCC7 Y ― RE3 1 26 ANE3 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCE3 Y MCLR VPP VDD 20 17 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VDD VSS 8 16 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VSS VSS 19 Basic CLKR CLC ZCD CWG CCP DAC NCO Reference Pull―up ― ― Interrupt ― ― EUSART ― ANC6 MSSP ANC5 14 PWM 13 17 Timers 16 RC6 Comparator RC5 I/O(2) ADC Advance Information 28-Pin (U)QFN 28-Pin PDIP/SOIC/SSOP 28-PIN ALLOCATION TABLE (PIC16(L)F15354, PIC16(L)F15355, PIC16(L)F15356) (CONTINUED) 5 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VSS VSEL0 19 17 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― C1OUT NCO1OUT ― TMR0 CCP1 PWM3 CWG1A CWG2A SDO ― DT(3) CLC1OUT CLKR ― ― ― ― ― ― ― C2OUT ― ― ― CCP2 PWM4 CWG1B CWG2B SCK ― CK CLC2OUT ― ― ― ― ― ― ― ― ― ― ― ― ― PWM5 CWG1C CWG2C SCL(3),(4) ― TX CLC3OUT ― ― ― ― ― ― ― ― ― ― ― ― ― PWM6 CWG1D CWG2D SDA(3),(4) ― ― CLC4OUT ― ― ― ― OUT(2) Note 1: 2: 3: 4: This is a PPS re-mappable input signal. The input function may be moved from the default location shown to one of several other PORTx pins. All digital output signals shown in this row are PPS re-mappable. These signals may be mapped to output onto one of several PORTx pin options. This is a bidirectional signal. For normal module operation, the firmware should map this signal to the same pin in both the PPS input and PPS output registers. These pins are configured for I2C logic levels. PPS assignments to the other pins will operate, but input logic levels will be standard TTL/ST as selected by the INLVL register, instead of the I2C specific or SMBUS input buffer thresholds. PIC16(L)F153XX DS40001835A-page 16 TABLE 5:  2016 Microchip Technology Inc. ― ― ― ― ― ― CLCIN0(1) ― IOCA0 Y ― RA1 3 18 20 20 ANA1 ― C1IN1C2IN1- ― ― ― ― ― ― ― ― ― CLCIN1(1) ― IOCA1 Y ― RA2 4 19 21 21 ANA2 ― C1IN0+ C2IN0+ ― ― ― ― ― ― ― ― ― ― ― IOCA2 Y ― RA3 5 20 22 22 ANA3 VREF+ C1IN1+ ― DACREF+ ― ― ― ― ― ― ― ― ― IOCA3 Y ― RA4 6 21 23 23 ANA4 ― ― ― ― T0CKI(1) ― ― ― ― ― ― ― ― IOCA4 Y ― RA5 7 22 24 24 ANA5 ― ― ― ― T1G(1) ― ― ― SSP1SS(1) ― ― ― ― IOCA5 Y ― RA6 14 29 33 31 ANA6 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCA6 Y CLKOUT RA7 13 28 32 30 ANA7 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCA7 Y CLKIN RB0 33 8 9 8 ANB0 ― C2IN1+ ― ― ― ― ― CWG1(1) SSP2SS(1) ZCD1 ― ― ― INT(1) IOCB0 Y ― RB1 34 9 10 9 ANB1 ― C1IN3C2IN3- ― ― ― ― ― ― SSP1CLK(1) ― SSP1DAT(1) ― ― ― IOCB1 Y ― RB2 34 10 11 10 ANB2 ― ― ― ― ― ― ― ― SSP1CLK(1) ― SSP1DAT(1) ― ― ― IOCB2 Y ― RB3 36 11 12 11 ANB3 ― C1IN2C2IN2- ― ― ― ― ― ― ― ― ― ― ― IOCB3 Y ― RB4 37 12 14 14 ANB4 ― ADACT(1) ― ― ― ― ― ― ― ― ― ― ― ― IOCB4 Y ― RB5 38 13 15 15 ANB5 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCB5 Y ― RB6 39 14 16 16 ANB6 ― ― ― ― ― ― ― ― ― ― TX2 CK2(1) CLCIN2(1) ― IOCB6 Y ICDCLK ICSPCLK RB7 40 15 17 17 ANB7 ― ― ― DAC1OUT2 ― ― ― ― ― ― RX2 DT2(1) CLCIN3(1) ― IOCB7 Y ICDDAT ICSPDAT RC0 15 30 34 32 ANC0 ― ― ― ― SOSCO ― T1CKI(1) ― ― ― ― ― ― ― IOCC0 Y ― RC1 16 31 35 35 ANC1 ― ― ― ― SOSCI CCP2(1) ― ― ― ― ― ― ― IOCC1 Y ― RC2 17 32 36 36 ANC2 ― ― ― ― ― CCP1(1) ― ― ― ― ― ― ― IOCC2 Y ― RC3 18 33 37 37 ANC3 ― ― ― ― T2IN(1) ― ― ― SSP1CLK(1) ― SSP1DAT(1) ― ― ― IOCC3 Y ― RC4 23 38 42 42 ANC4 ― ― ― ― ― ― ― ― SSP1CLK(1) ― SSP1DAT(1) ― ― ― IOCC4 Y ― Basic CLC CWG CCP DAC NCO Reference Pull-up ― Interrupt ― CLKR ― EUSART C1IN0C2IN0- ZCD ― MSSP ANA0 PWM 19 Timers 19 Comparator 44-Pin TQFP 17 ADC 44-Pin QFN 2 PIC16(L)F153XX DS40001835A-page 17 40-Pin UQFN Advance Information 40-Pin PDIP 40/44-PIN ALLOCATION TABLE (PIC16(L)F15375, PIC16(L)F15376) RA0 I/O(2)  2016 Microchip Technology Inc. TABLE 6: ― ― ― ― ― ― ― ― ― IOCC5 Y ― ― ― ― ― ― ― ― TX1 CK1(1) ― ― IOCC6 Y ― RC7 26 1 1 1 ANC7 ― ― ― ― ― ― ― ― ― ― RX1 DT1(1) ― ― IOCC7 Y ― RD0 19 34 38 38 AND0 ― ― ― ― ― ― ― ― SSP2CLK(1) ― SSP2DAT(1) ― ― ― ― ― ― RD1 20 35 39 39 AND1 ― ― ― ― ― ― ― ― SSP2CLK(1) ― SSP2DAT(1) ― ― ― ― ― ― ― Basic CLC CWG CCP DAC NCO Reference Pull-up ― ― Interrupt ― ― CLKR ― ― EUSART ― ANC6 ZCD ANC5 44 MSSP 43 44 PWM 43 40 Timers 44-Pin TQFP 39 25 Comparator 44-Pin QFN 24 RC6 ADC 40-Pin UQFN RC5 I/O(2) 40-Pin PDIP 40/44-PIN ALLOCATION TABLE (PIC16(L)F15375, PIC16(L)F15376) (CONTINUED) Advance Information  2016 Microchip Technology Inc. RD2 21 36 40 40 AND2 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― RD3 22 37 41 41 AND3 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― RD4 27 2 2 2 AND4 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― RD5 28 3 3 3 AND5 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― RD6 29 4 4 4 AND6 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― RD7 30 5 5 5 AND7 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― RE0 8 23 25 25 ANE0 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― RE1 9 24 26 26 ANE1 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― RE2 10 25 27 27 ANE2 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― RE3 1 16 18 18 ANE3 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCE3 Y MCLR VPP VDD 11 26 7 7 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VDD VDD 32 7 28 28 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VDD VSS 12 27 6 6 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VSS VSS 31 6 30 29 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VSS VSEL0 31 6 6 6 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― PIC16(L)F153XX DS40001835A-page 18 TABLE 6: Note TMR0 CCP1 PWM3 CWG1A CWG2A SDO1 SDO2 ― DT(3) CLC1OUT CLKR ― ― ― ― ― ― ― ― ― C2OUT ― ― ― CCP2 PWM4 CWG1B CWG2B SCK1 SCK2 ― CK1 CK2 CLC2OUT ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― PWM5 CWG1C CWG2C SCK1(3),(4) SCL2(3),(4) ― TX1 TX2 CLC3OUT ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― PWM6 CWG1D CWG2D SDA1(3),(4) SDA2(3),(4) ― ― CLC4OUT ― ― ― ― Advance Information 1: 2: 3: 4: Basic Pull-up ― Interrupt CWG NCO1OUT CLKR PWM C1OUT CLC CCP ― EUSART Timers ― ZCD NCO ― MSSP Comparator ― DAC 44-Pin TQFP ― Reference 44-Pin QFN ― ADC 40-Pin UQFN OUT(2) 40/44-PIN ALLOCATION TABLE (PIC16(L)F15375, PIC16(L)F15376) (CONTINUED) 40-Pin PDIP I/O(2)  2016 Microchip Technology Inc. TABLE 6: This is a PPS re-mappable input signal. The input function may be moved from the default location shown to one of several other PORTx pins. All digital output signals shown in this row are PPS remappable. These signals may be mapped to output onto one of several PORTx pin options. This is a bidirectional signal. For normal module operation, the firmware should map this signal to the same pin in both the PPS input and PPS output registers. These pins are configured for I2C logic levels. PPS assignments to the other pins will operate, but input logic levels will be standard TTL/ST as selected by the INLVL register, instead of the I2C specific or SMBUS input buffer thresholds. PIC16(L)F153XX DS40001835A-page 19 Basic Pull-up Interrupt CLKR CLC EUSART ZCD MSSP CWG PWM CCP Timers DAC NCO Comparator Reference ADC 48-Pin UQFN/TQFP I/O(2) 48-PIN ALLOCATION TABLE (PIC16(L)F15385, PIC16(L)F15386) Advance Information RA0 21 ANA0 ― C1IN0C2IN0- ― ― ― ― ― ― ― ― ― CLCIN0(1) ― IOCA0 Y ― RA1 22 ANA1 ― C1IN1C2IN1- ― ― ― ― ― ― ― ― ― CLCIN1(1) ― IOCA1 Y ― RA2 23 ANA2 ― C1IN0+ C2IN0+ ― ― ― ― ― ― ― ― ― ― ― IOCA2 Y ― RA3 24 ANA3 VREF+ C1IN1+ ― DACREF+ ― ― ― ― ― ― ― ― ― IOCA3 Y ― RA4 25 ANA4 ― C1IN1- ― ― T0CKI(1) ― ― ― ― ― ― ― ― IOCA4 Y ― RA5 26 ANA5 ADACT ― ― ― ― T1G(1) ― ― ― SSP1SS(1) ― ― ― ― IOCA5 Y ―  2016 Microchip Technology Inc. RA6 33 ANA6 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCA6 Y CLKOUT RA7 32 ANA7 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCA7 Y CLKIN RB0 8 ANB0 ― C2IN1+ ― ― ― ― ― CWG1(1) SSP2SS(1) ZCD1 ― ― ― INT(1) IOCB0 Y ― RB1 9 ANB1 ― C1IN3C2IN3- ― ― ― ― ― ― SSP1CLK(1) SSP1DAT(1) ― ― ― ― IOCB1 Y ― RB2 10 ANB2 ― ― ― ― ― ― ― ― SSP1CLK(1) SSP1DAT(1) ― ― ― ― IOCB2 Y ― RB3 11 ANB3 ― C1IN3C2IN3- ― ― ― ― ― ― ― ― ― ― ― IOCB3 Y ― RB4 16 ANB4 ADACT(1) ― ― ― ― ― ― ― ― ― ― ― ― ― IOCB4 Y ― RB5 17 ANB5 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCB5 Y ― RB6 18 ANB6 ― ― ― ― ― ― ― ― ― ― TX2 CK2(1) CLCIN2(1) ― IOCB6 Y ICDCLK ICSPCLK RB7 19 ANB7 ― ― ― DAC1OUT2 ― ― ― ― ― ― RX2 DT2(1) CLCIN3(1) ― IOCB7 Y ICDDAT ICSPDAT RC0 34 ANC0 ― ― ― ― SOSCO T1CKI(1) ― ― ― ― ― ― ― ― IOCC0 Y ― RC1 35 ANC1 ― ― ― ― SOSCI CCP2(1) ― ― ― ― ― ― ― IOCC1 Y ― RC2 40 ANC2 ― ― ― ― ― CCP1(1) ― ― ― ― ― ― ― IOCC2 Y ― RC3 41 ANC3 ― ― ― ― T2IN(1) ― ― ― SSP1CLK(1) SSP1DAT(1) ― ― ― ― IOCC3 Y ― PIC16(L)F153XX DS40001835A-page 20 TABLE 7: RC4 46 ANC4 ― ― ― ― ― ― ― ― SSP1CLK(1) SSP1DAT(1) ― ― ― ― IOCC4 Basic Pull-up Interrupt CLKR CLC EUSART ZCD MSSP CWG PWM CCP Timers DAC NCO Reference ADC Comparator 48-PIN ALLOCATION TABLE (PIC16(L)F15385, PIC16(L)F15386) (CONTINUED) 48-Pin UQFN/TQFP I/O(2)  2016 Microchip Technology Inc. TABLE 7: Y ― Advance Information RC5 47 ANC5 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCC5 Y ― RC6 48 ANC6 ― ― ― ― ― ― ― ― ― ― TX1 CK1(1) ― ― IOCC6 Y ― RC7 1 ANC7 ― ― ― ― ― ― ― ― ― ― RX1 DT1(1) ― ― IOCC7 Y ― RD0 42 AND0 ― ― ― ― ― ― ― ― SSP2CLK(1) SSP2DAT(1) ― ― ― ― ― Y ― RD1 43 AND1 ― ― ― ― ― ― ― ― SSP2CLK(1) SSP2DAT(1) ― ― ― ― ― Y ― RD2 44 AND2 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RD3 45 AND3 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RD4 2 AND4 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RD5 3 AND5 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RD6 4 AND6 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RD7 5 AND7 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― 27 ANE0 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― 28 ANE1 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RE2 29 ANE2 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RE3 20 ANE3 ― ― ― ― ― ― ― ― ― ― ― ― ― IOCE3 Y MCLR VPP RF0 36 ANF0 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RF1 37 ANF1 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― DS40001835A-page 21 RF2 38 ANF2 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RF3 39 ANF3 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RF4 12 ANF4 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RF5 13 ANF5 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RF6 14 ANF6 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― RF7 15 ANF7 ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y ― VDD 30 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― Y VDD VDD 7 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VDD PIC16(L)F153XX RE0 RE1 Basic Pull-up Interrupt CLKR CLC EUSART ZCD MSSP CWG PWM CCP Timers DAC NCO Comparator Reference ADC 48-Pin UQFN/TQFP I/O(2) 48-PIN ALLOCATION TABLE (PIC16(L)F15385, PIC16(L)F15386) (CONTINUED) Advance Information VSS 6 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VSS 31 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― VSS VSEL0 ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― ― C1OUT NCO1OUT ― TMR0 CCP1 PWM3 CWG1A CWG2A SDO1 SDO2 ― DT(3) CLC1OUT CLKR ― ― ― ― ― ― C2OUT ― ― ― CCP2 PWM4 CWG1B CWG2B SCK1 SCK2 ― CK1 CK2 CLC2OUT ― ― ― ― ― ― ― ― ― ― ― ― PWM5 CWG1C CWG2C SCK1(3),(4) SCL2(3),(4) ― TX1 TX2 CLC3OUT ― ― ― ― ― ― ― ― ― ― ― ― PWM6 CWG1D CWG2D SDA1(3),(4) SDA2(3),(4) ― ― CLC4OUT ― ― ― ― OUT (2) Note 1: 2: 3: 4: VSS This is a PPS re-mappable input signal. The input function may be moved from the default location shown to one of several other PORTx pins. All digital output signals shown in this row are PPS re-mappable. These signals may be mapped to output onto one of several PORTx pin options. This is a bidirectional signal. For normal module operation, the firmware should map this signal to the same pin in both the PPS input and PPS output registers. These pins are configured for I2C logic levels. PPS assignments to the other pins will operate, but input logic levels will be standard TTL/ST as selected by the INLVL register, instead of the I2C specific or SMBUS input buffer thresholds. PIC16(L)F153XX DS40001835A-page 22 TABLE 7:  2016 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ, KEELOQ logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 ==  2016 Microchip Technology Inc. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-0407-1 Advance Information DS40001835A-page 23 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 Germany - Dusseldorf Tel: 49-2129-3766400 Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Hong Kong Tel: 852-2943-5100 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 Austin, TX Tel: 512-257-3370 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Cleveland Independence, OH Tel: 216-447-0464 Fax: 216-447-0643 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Canada - Toronto Tel: 905-673-0699 Fax: 905-673-6509 China - Dongguan Tel: 86-769-8702-9880 China - Hangzhou Tel: 86-571-8792-8115 Fax: 86-571-8792-8116 India - Pune Tel: 91-20-3019-1500 Japan - Osaka Tel: 81-6-6152-7160 Fax: 81-6-6152-9310 Japan - Tokyo Tel: 81-3-6880- 3770 Fax: 81-3-6880-3771 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 China - Hong Kong SAR Tel: 852-2943-5100 Fax: 852-2401-3431 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 China - Shenzhen Tel: 86-755-8864-2200 Fax: 86-755-8203-1760 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 Taiwan - Kaohsiung Tel: 886-7-213-7828 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 Germany - Karlsruhe Tel: 49-721-625370 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Italy - Venice Tel: 39-049-7625286 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Poland - Warsaw Tel: 48-22-3325737 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Stockholm Tel: 46-8-5090-4654 UK - Wokingham Tel: 44-118-921-5800 Fax: 44-118-921-5820 Taiwan - Taipei Tel: 886-2-2508-8600 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 07/14/15 DS40001835A-page 24 Advance Information  2016 Microchip Technology Inc.