PIC12/16(L)F161X
8/14/20-Pin, 8-Bit Flash Microcontroller Product Brief
Description:
PIC12/16(L)F161X microcontrollers deliver on-chip features that are unique to the design for embedded control of small
motors and general purpose applications in 8/14/20-pin count packages. Features like 10-bit A/D, CCP, 24-bit SMT and
Zero-Cross Detection offer an excellent solution to the variety of applications. The product family also has a CRC+
memory scan and Windowed WDT to support safety-critical systems in home appliances, white goods and other end
equipment.
Core Features:
Digital Peripherals:
• C Compiler Optimized RISC Architecture
• Only 49 Instructions
• Operating Speed:
- DC – 32 MHz clock input
- 125 ns minimum instruction cycle
• Interrupt Capability
• 16-Level Deep Hardware Stack
• Up to Four 8-bit Timers
• Up to Three 16-bit Timers
• Low Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRT)
• Brown-out Reset (BOR) with Selectable Trip Point
• Window Watchdog Timer (WWDT):
- Variable prescaler selection
- Variable window size selection
- All sources configurable in hardware or
software
• Configurable Logic Cell (CLC):
- Up to four CLCs
- Integrated combinational and sequential
logic
• Complementary Waveform Generator (CWG):
- Rising and falling edge dead-band control
- Full-bridge, half-bridge, 1-channel drive
- Multiple signal sources
• Two Capture/Compare/PWM (CCP) modules
• PWM: Two 10-bit Pulse-Width Modulators
• Two Signal Measurement Timers (SMT):
- 24-bit timer/counter with prescaler
- Multiple gate and clock inputs
• Angular Timer:
- Single pulse
- Multiple pulses with missing pulse recovery
• Hardware Limit Timer (HLT):
- 8-bit timer with prescaler
- 8-bit period register and postscaler
- Asynchronous H/W reset sources
• Math Accelerator:
- Four operation modes
- Add and multiply
- Simple multiplier
- Multiply and Accumulate (MAC)
- Programmable PID controller
• Cyclic Redundancy Check with Memory Scan
(CRC):
- Software configurable
• Serial Communications:
- Enhanced USART (EUSART)
- SPI, I2C™, RS-232, RS-485, LIN compatible
- Auto-Baud Detect, Auto-Wake-up on start
• Up to 18 I/O Pins:
- Individually programmable pull-ups
- Slew rate control
- Interrupt-on-change with edge-select
• Peripheral Pin Select (PPS):
- Enables pin mapping of digital I/O
Memory:
•
•
•
•
Up to 8 KW Flash Program Memory
Up to 1024 Bytes Data SRAM Memory
Direct, Indirect and Relative Addressing modes
High-Endurance Flash Data Memory (HEF):
- 128 B (nonvolatile), 100K Erase/Write Cycles
Operating Characteristics:
• Operating Voltage Range:
- 1.8V to 3.6V (PIC16LF161X)
- 2.3V to 5.5V (PIC16F161X)
• Temperature Range:
- Industrial: -40°C to 85°C
- Extended: -40°C to 125°C
eXtreme Low-Power (XLP) Features:
•
•
•
•
Sleep mode: 50 nA @ 1.8V, typical
Watchdog Timer: 500 nA @ 1.8V, typical
Secondary Oscillator: 500 nA @ 32 kHz
Operating Current:
- 8 uA @ 32 kHz, 1.8V, typical
- 32 uA/MHz @ 1.8V, typical
2014 Microchip Technology Inc.
Advance Information
DS40001745A-page 1
PIC12/16(L)F161X
Intelligent Analog Peripherals:
Clocking Structure:
• 10-Bit Analog-to-Digital Converter (ADC):
- Up to 12 external channels
- Conversion available during Sleep
• Two Comparators (CMP):
- Low-Power/High-Speed mode
- Up to three external inverting inputs
- Fixed Voltage Reference at non-inverting
input(s)
- Comparator outputs externally accessible
• 8-Bit Digital-to-Analog Converter (DAC):
- 8-bit resolution, rail-to-rail
- Positive Reference Selection
• Voltage Reference:
- Fixed Voltage Reference (FVR): 1.024V,
2.048V and 4.096V output levels
• Zero-Cross Detect (ZCD):
- Detect when AC signal on pin crosses
ground
• 16 MHz Internal Oscillator:
- ±1% at calibration
- Selectable frequency range from 32 MHz to
31 kHz
• 31 kHz Low-Power Internal Oscillator
• 4x Phase-Locked Loop (PLL):
- For up to 32 MHz internal operation
• External Oscillator Block with:
- Three external clock modes up to 32 MHz
Program Memory Flash
(W)
Data SRAM
(bytes)
I/O Pins
8-bit/16-bit Timers
Comparators
10-bit ADC (ch)
Zero-Cross Detect
CCP/10-bit PWM
CWG
CLC
SMT/HLT
Angular Timer
Window Watchdog
Timer
CRC with Memory Scan
Math Accelerator
PPS
EUSART
I2C™/SPI
Debug(1)
PIC12/16(L)F161X FAMILY TYPES
Data Sheet Index
TABLE 1:
PIC12(L)F1612
(A)
2048
256
6
1/1
1
4
1
2/0
1
0
2/3
0
Y
Y
0
0
0
0
I/H
PIC16(L)F1613
(A)
2048
256
12
1/1
2
8
1
2/0
1
0
2/3
0
Y
Y
0
0
0
0
I/H
PIC16(L)F1614
(B)
4096
512
12
1/3
2
8
1
2/2
1
2
2/3
1
Y
Y
1
Y
1
1
I/H
PIC16(L)F1615
(C)
8192
1024
12
1/3
2
8
1
2/2
1
4
2/3
1
Y
Y
1
Y
1
1
I/H
PIC16(L)F1618
(B)
4096
512
18
1/3
2
12
1
2/2
1
2
2/3
1
Y
Y
1
Y
1
1
I/H
PIC16(L)F1619
(C)
8192
1024
18
1/3
2
12
1
2/2
1
4
2/3
1
Y
Y
1
Y
1
1
I/H
Device
Note 1:
Debugging Methods: (I) – Integrated on Chip; (H) – via ICD Header; E – using Emulation Product.
Data Sheet Index:
A.
DS40001737
PIC12(L)F1612/16(L)F1613 Data Sheet, 8/14-Pin, 8-bit Flash Microcontrollers
B.
Future Release
PIC16(L)F1614/8 Data Sheet, 14/20-Pin, 8-bit Flash Microcontrollers
C.
Future Release
PIC16(L)F1615/9 Data Sheet, 14/20-Pin, 8-bit Flash Microcontrollers
Note:
For other small form-factor package availability and marking information, please visit
http://www.microchip.com/packaging or contact your local sales office.
DS40001745A-page 2
Advance Information
2014 Microchip Technology Inc.
PIC12/16(L)F161X
TABLE 2:
PACKAGES
Packages
PDIP
SOIC
DFN
UDFN
TSSOP
QFN
UQFN
PIC12(L)F1612
X
X
X
X
PIC16(L)F1613
X
PIC16(L)F1614
X
PIC16(L)F1615
X
X
X
X
X
X
X
X
X
X
X
PIC16(L)F1618
X
X
X
X
PIC16(L)F1619
X
X
X
X
Note:
SSOP
Pin details are subject to change.
PIN DIAGRAMS
8-PIN PDIP, SOIC, DFN, UDFN
2
RA4
3
4
RA3
FIGURE 2:
8
VSS
7
RA0
6
RA1
5
RA2
14-PIN PDIP, SOIC, TSSOP
VDD
1
14
RA5
2
13
VSS
RA0/ICSPDAT
RA4
12
RA1/ICSPCLK
MCLR/VPP/RA3
3
4
11
RA2
RC5
5
10
RC0
RC4
6
9
RC1
RC3
7
8
RC2
16-PIN QFN, UQFN
VDD
NC
NC
Vss
FIGURE 3:
1
RA5
PIC12(L)F1612
VDD
PIC16(L)F1613
FIGURE 1:
16 15 14 13
1
12
C
PI
16
2
11
)F
(L
3
10
16
13
RA5
RA4
RA3/MCLR/VPP
RC5
4
6 7
8
RC4
RC3
RC2
RC1
5
9
RA0
RA1
RA2
RC0
2014 Microchip Technology Inc.
Advance Information
DS40001745A-page 3
PIC12/16(L)F161X
14-PIN PDIP, SOIC, TSSOP
VDD
RA5
RA4
14
2
13
VSS
RA0/ICSPDAT
12
RA1/ICSPCLK
11
RA2
10
RC0
9
RC1
8
RC2
MCLR/VPP/RA3
3
4
RC5
5
RC4
6
RC3
7
16-PIN QFN
VDD
NC
NC
Vss
FIGURE 5:
1
PIC16(L)F1614/5
FIGURE 4:
16 15 14 13
C
PI
1
12
(L
16
2
11
)F
3
10
1
16
4
5
4/
RA5
RA4
RA3/MCLR/VPP
RC5
6 7
8
RC4
RC3
RC2
RC1
5
9
RA0
RA1
RA2
RC0
VDD
1
20
VSS
RA5
2
19
RA0
RA4
3
4
18
RA1
MCLR/VPP/RA3
17
RA2
RC5
5
16
RC0
RC4
6
15
RC1
RC3
7
14
RC2
RC6
8
13
RB4
RC7
9
12
RB5
RB7
10
11
RB6
20-PIN QFN
RA4
RA5
VDD
Vss
RA0
FIGURE 7:
20-PIN PDIP, SOIC, SSOP
PIC16(L)F1618/9
FIGURE 6:
61
L)
F1
16
(
1
2
3
4
5
PI
C
RA3/MCLR/VPP
RC5
RC4
RC3
RC6
8/
9
20 19 18 17 16
15
14
13
12
11
RA1
RA2
RC0
RC1
RC2
RC7
RB7
RB6
RB5
RB4
6 7 8 9 10
DS40001745A-page 4
Advance Information
2014 Microchip Technology Inc.
PIC12/16(L)F161X
PIN ALLOCATION TABLES
I/O
A/D
Reference
Comparator
Timers
CCP
CWG
ZCD
Interrupt
SMT
Pull-up
Basic
8-PIN ALLOCATION TABLE (PIC12(L)F1612)
8-Pin PDIP, SOIC, DFN, UDFN
TABLE 3:
RA0
7
AN0
DAC1OUT1
C1IN+
—
CCP2
CWG1B
—
IOC
—
Y
ICSPDAT
RA1
6
AN1
VREF+
C1IN0-
—
—
—
ZCD1OUT
IOC
—
Y
ICSPCLK
RA2
5
AN2
—
C1OUT
T0CKI
T4IN
CCP1
CWG1A
CWG1IN
ZCD1IN
INT
IOC
SMTSIG2
Y
—
RA3
4
—
—
—
T1G(1)
T6IN
—
—
—
IOC
SMTWIN2
Y
MCLR/VPP
RA4
3
AN3
—
C1IN1-
T1G
—
CWG1B(1)
—
IOC
SMTSIG1
Y
CLKOUT
RA5
2
—
—
—
T1CKI
T2IN
CCP1(1)
CWG1A(1)
—
IOC
SMTWIN1
Y
CLKIN
VDD
1
—
—
—
—
—
—
—
—
—
—
VDD
8
—
—
—
—
—
—
—
—
—
—
VSS
VSS
Note
1:
Alternate pin function selected with the APFCON register.
C1IN+
—
—
VREF+
C1IN0C2IN0-
—
—
RA2
11
10
AN2
—
C1OUT
T0CKI
T4IN
RA3
4
3
—
—
—
T1G(1)
T6IN
RA4
3
2
AN3
—
—
RA5
2
1
—
—
—
RC0
10
9
AN4
—
C2IN+
RC1
9
8
AN5
—
RC2
8
7
AN6
RC3
7
6
RC4
6
RC5
VDD
VSS
Note
Basic
CCP
DAC1OUT1
AN1
Pull-up
Timers
AN0
11
SMT
Comparator
12
12
Interrupt
Reference
13
RA1
ZCD
A/D
RA0
CWG
I/O
16-Pin QFN, UQFN
14/16-PIN ALLOCATION TABLE (PIC16(L)F1613)
14-Pin PDIP, SOIC, TSSOP
TABLE 4:
—
—
IOC
—
Y
ICSPDAT
—
ZCD1OUT
IOC
—
Y
ICSPCLK
—
CWG1IN
ZCD1IN
INT
IOC
—
Y
—
—
—
—
IOC
SMTWIN2
Y
MCLR/VPP
T1G
—
—
—
IOC
SMTSIG1
Y
CLKOUT
T1CKI
T2IN
CCP2(1)
—
—
IOC
SMTWIN1
Y
CLKIN
—
—
—
—
IOC
—
Y
—
C1IN1C2IN1-
T4IN
—
—
—
IOC
SMTSIG2
Y
—
—
C1IN2C2IN2-
—
—
CWG1D
—
IOC
—
Y
—
AN7
—
C1IN3C2IN3-
—
CCP2
CWG1C
—
IOC
—
Y
—
5
—
—
C2OUT
—
—
CWG1B
—
IOC
—
Y
—
5
4
—
—
—
—
CCP1
CWG1A
—
IOC
—
Y
—
1
16
—
—
—
—
—
—
—
—
—
—
VDD
13
—
—
—
—
—
—
—
—
—
—
VSS
14
1:
Alternate pin function selected with the APFCON register.
2014 Microchip Technology Inc.
Advance Information
DS40001745A-page 5
A/D
Reference
Comparator
Timers
CCP
CWG
ZCD
CLC
EUSART
SMT
Angular Timer
MSSP
PWM
High Current I/O
Interrupt
Pull-up
RA0
13
12
AN0
DAC1OUT1
C1IN+
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
ICSPDAT
RA1
12
11
AN1
VREF+
C1IN0C2IN0-
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
ICSPCLK
RA2
11
10
AN2
—
C2IN+
T0CKI(1)
—
CWG1IN(1)
ZCD1IN
—
—
—
—
—
—
—
INT
IOC
Y
—
RA3
4
3
—
—
—
T6IN(1)
—
—
—
—
—
SMTWIN2(1)
—
—
—
—
IOC
Y
MCLR/VPP
RA4
3
2
AN3
—
—
T1G(1)
—
—
—
—
—
SMTSIG1(1)
—
—
—
—
IOC
Y
CLKOUT
RA5
2
1
—
—
—
T1CKI(1)
T2IN(1)
—
—
—
—
—
SMTWIN1(1)
—
—
—
—
IOC
Y
CLKIN
RC0
10
9
AN4
—
C2IN+
T5CKI(1)
—
—
—
—
—
—
—
SCK(1,3)
—
—
IOC
Y
—
—
SDI(1)
—
—
IOC
Y
—
(1)
Basic
16-Pin QFN
Advance Information
I/O
14-Pin PDIP, SOIC, TSSOP
14/16-PIN ALLOCATION TABLE (PIC16(L)F1614/5)
2014 Microchip Technology Inc.
RC1
9
8
AN5
—
C1IN1C2IN1-
T4IN(1)
—
—
—
—
—
RC2
8
7
AN6
—
C1IN2C2IN2-
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
—
RC3
7
6
AN7
—
C1IN3C2IN3-
T5G(1)
CCP2(1)
—
—
CLCIN0(1)
—
—
ATCC(1)
SS(1)
—
—
IOC
Y
—
RC4
6
5
—
—
—
T3G(1)
—
—
—
CLCIN1(1)
CK(1)
—
—
—
—
HIC4
IOC
Y
—
RC5
5
4
—
—
—
T3CKI(1)
CCP1(1)
—
—
—
RX(1,3)
—
ATIN(1)
—
—
HIC5
IOC
Y
—
VDD
1
16
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VDD
VSS
14
13
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VSS
—
—
—
—
C1OUT
—
CCP1
CWG1A
DT(3)
—
—
SDO
PWM3OUT
—
—
—
—
—
—
—
—
C2OUT
—
CCP1
CWG1B
—
CLC2OUT
CK
—
—
SCK(3)
PWM4OUT
—
—
—
—
—
—
—
—
—
—
—
CWG1C
—
—
TX
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CWG1D
—
—
—
—
—
—
—
—
—
—
—
OUT(2)
Note
1:
2:
3:
ZCD1OUT CLC1OUT
SMTSIG2
Default peripheral input. Input can be moved to any other pin with the PPS input selection registers.
All pin outputs default to PORT latch data. Any pin can be selected as a digital peripheral output with the PPS output selection registers.
These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
PIC12/16(L)F161X
DS40001745A-page 6
TABLE 5:
Reference
Timers
CCP
CWG
ZCD
CLC
EUSART
SMT
Angular Timer
MSSP
PWM
High Current I/O
Interrupt
Pull-up
16
AN0
DAC1OUT
C1IN+
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
ICSPDAT
18
15
AN1
VREF+
C1IN0C2IN0-
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
ICSPCLK
RA2
17
14
AN2
—
—
T0CKI(1)
—
CWG1IN(1)
—
—
—
—
—
—
—
—
INT
IOC
Y
—
RA3
4
1
—
—
—
T6IN(1)
—
—
—
—
—
SMTWIN2(1)
—
—
—
—
IOC
Y
MCLR
VPP
RA4
3
20
AN3
—
—
T1G(1)
—
—
—
—
—
SMTSIG1(1)
—
—
—
—
IOC
Y
CLKOUT
RA5
2
19
—
—
—
T1CKI(1)
T2IN(1)
—
—
—
CLCIN3(1)
—
SMTWIN1(1)
—
—
—
—
IOC
Y
CLKIN
RB4
13
10
AN10
—
—
—
—
—
—
—
—
—
—
SDI(1)
—
—
IOC
Y
—
—
—
—
—
—
IOC
Y
—
Y
—
RX
(1,3)
Basic
A/D
19
RA1
Comparator
20-Pin QFN
RA0
RB5
12
9
AN11
—
—
—
—
—
—
—
RB6
11
8
—
—
—
—
—
—
—
—
—
—
—
SCK(1,3)
—
—
IOC
RB7
10
7
—
—
—
—
—
—
—
—
CK(1)
—
—
—
—
—
IOC
Y
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
—
DS40001745A-page 7
RC0
16
13
AN4
—
C2IN+
T5CKI(1)
RC1
15
12
AN5
—
C1IN1C2IN1-
T4IN(1)
—
—
—
CLCIN(2)
—
SMTSIG2(1)
—
—
—
—
IOC
Y
—
RC2
14
11
AN6
—
C1IN2C2IN2-
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
—
RC3
7
4
AN7
—
C1IN3C2IN3-
T5G(1)
CCP2(1)
—
—
CLCIN0(1)
—
—
ATCC(1)
—
—
—
IOC
Y
—
RC4
6
3
—
—
—
T3G(1)
—
—
—
CLCIN1(1)
—
—
—
—
—
HIC4
IOC
Y
—
RC5
5
2
—
—
—
T3CKI(1)
CCP2(1)
—
—
—
—
—
ATIN(1)
—
—
HIC5
IOC
Y
—
RC6
8
5
AN8
—
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
—
RC7
9
6
AN9
—
—
—
—
—
—
—
—
—
—
—
—
—
IOC
Y
—
VDD
1
18
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VSS
20
17
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Note
1:
2:
3:
Default peripheral input. Input can be moved to any other pin with the PPS input selection registers.
All pin outputs default to PORT latch data. Any pin can be selected as a digital peripheral output with the PPS output selection registers.
These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
(1)
SS
PIC12/16(L)F161X
Advance Information
20-Pin PDIP, SOIC, SSOP
20-PIN ALLOCATION TABLE (PIC16(L)F1618/9)
I/O
2014 Microchip Technology Inc.
TABLE 6:
20-Pin PDIP, SOIC, SSOP
20-Pin QFN
A/D
Reference
Comparator
Timers
CCP
CWG
ZCD
CLC
EUSART
SMT
Angular Timer
MSSP
PWM
High Current I/O
Interrupt
Pull-up
Basic
I/O
OUT(2)
—
—
—
—
C1OUT
—
CCP1
CWG1A
ZCD1OUT
CLC1OUT
DT(3)
—
—
SDO
PWM3OUT
—
—
—
—
Advance Information
1:
2:
3:
(3)
—
—
—
—
C2OUT
—
CCP2
CWG1B
—
CLC2OUT
CK
—
—
SCK
PWM4OUT
—
—
—
—
—
—
—
—
—
—
—
CWG1C
—
CLC3OUT
TX
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CWG1D
—
CLC4OUT
—
—
—
—
—
—
—
—
—
—
Note
20-PIN ALLOCATION TABLE (PIC16(L)F1618/9)
Default peripheral input. Input can be moved to any other pin with the PPS input selection registers.
All pin outputs default to PORT latch data. Any pin can be selected as a digital peripheral output with the PPS output selection registers.
These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections.
PIC12/16(L)F161X
DS40001745A-page 8
TABLE 6:
2014 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2014, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620779415
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
2014 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Advance Information
DS40001745A-page 9
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DS40001745A-page 10
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Advance Information
10/28/13
2014 Microchip Technology Inc.