PIC16F1769T-I/ML

PIC16(L)F1764/5/8/9 14/20-Pin, 8-Bit Flash Microcontrollers Description The PIC16(L)F1764/5/8/9 family offers intelligent analog with digital peripherals to create up to two independent closedloop channels. These 14 and 20-pin devices enable the ability to interconnect the on-chip peripherals to create custom functions specific to each application; helping simplify the implementation of a complex control system and give designers the flexibility to innovate. Core Features Digital Peripherals • C Compiler Optimized RISC Architecture • Only 49 Instructions • Operating Speed: - DC – 32 MHz clock input - 125 ns minimum instruction cycle • Interrupt Capability • 16-Level Deep Hardware Stack • Up to Four 8-Bit Timers • Up to Three 16-Bit Timers • Power-on Reset (POR) • Configurable Power-up Timer (PWRT) • Brown-out Reset (BOR) with Selectable Trip Point • Extended Watchdog Timer (EWDT): - Low-power 31 kHz WDT - Software-selectable prescaler - Software-selectable enable • Configurable Logic Cell (CLC): - Up to three CLCs; up to four selected inputs - Integrated combinational and state logic • Up to Two Complementary Output Generators (COG): - Push-Pull, Full-Bridge and Steering modes • Up to Two Capture/Compare/PWM (CCP) modules • Pulse-Width Modulators (PWM): - Up to two 10-bit PWMs - Up to two 16-bit PWMs • Peripheral Pin Select (PPS): - Configure any digital pin to output • Serial Communications: - Enhanced USART (EUSART) - SPI, I2C, RS-232, RS-485, LIN compatible - Auto-Baud Detect, auto-wake-up on start • Up to 18 I/O Pins: - Individually programmable pull-ups - Slew rate control - Interrupt-On-Change (IOC) with edge select • Up to Two Data Signal Modulators (DSM) Memory • • • • Up to 14 Kbytes Flash Program Memory Up to 1024 Bytes Data RAM Memory Direct, Indirect and Relative Addressing modes High-Endurance Flash (HEF): - 128B of nonvolatile data storage - 100K erase/write cycles Operating Characteristics • Operating Voltage Range: - 1.8V to 3.6V (PIC16LF1764/5/8/9) - 2.3V to 5.5V (PIC16F1764/5/8/9) • Temperature Range: - Industrial: -40°C to +85°C - Extended: -40°C to +125°C eXtreme Low-Power (XLP) Features • • • • Sleep mode: 50 nA @ 1.8V, typical Watchdog Timer: 500 nA @ 1.8V, typical Secondary Oscillator: 500 nA @ 32 kHz Operating Current: - 8 A @ 32 kHz, 1.8V, typical - 32 A/MHz @ 1.8V, typical • Low-Power BOR (LPBOR): - 200 nA in Sleep  2014-2019 Microchip Technology Inc. Intelligent Analog Peripherals • 10-Bit Analog-to-Digital Converter (ADC): - Up to 12 external channels - Conversion available during Sleep • Up to Two Operational Amplifiers (OPA): - Selectable internal and external channels • Up to Four Fast Comparators (COMP): - Up to five external inverting inputs - Up to eight external noninverting inputs - Fixed Voltage Reference at noninverting input(s) - Comparator outputs externally accessible • Digital-to-Analog Converters (DAC): - Up to two 10-bit resolution DACs - Up to two 5-bit resolution DACs DS40001775E-page 1 PIC16(L)F1764/5/8/9 Intelligent Analog Peripherals (Cont.) Clocking Structure • Voltage Reference: - Fixed Voltage Reference (FVR): 1.024V, 2.048V and 4.096V output levels • Zero-Cross Detector (ZCD): - Detect high-voltage AC signal • Programmable Ramp Generator (PRG): - Slope compensation - Ramp generation • High-Current Drive I/Os: - 100 mA capacity @ 5V • 16 MHz Internal Oscillator: - ±1% at calibration - Selectable frequency range, 32 MHz to 31 kHz • 31 kHz Low-Power Internal Oscillator • 4x Phase-Locked Loop (PLL): - For up to 32 MHz internal operation • External Oscillator Block with: - Three External Clock modes up to 32 MHz Debug(1) I2C/SPI EUSART Peripheral Pin Select High-Current I/Os Programmable Ramp Gen Zero-Cross Detect Op Amp CLC Data Signal Modulator COG 10/16-Bit PWM CCP 5/10-Bit DAC 12 10-Bit ADC (ch) 512 Comparator I/O Pins(2) 128 8-Bit Timers w/HLT Data SRAM (Bytes) 4096/7 16-Bit Timers High-Endurance Flash (B) PIC16(L)F1764 (A) Program Memory Flash (Words/Kbytes) Device PIC16(L)F1764/5/8/9 FAMILY TYPES Data Sheet Index TABLE 1: 3 1/3 2 8 1/1 1 1/1 1 1 3 1 1 1 2 Y 1 1 I/H PIC16(L)F1765 (A) 8192/14 128 1024 12 3 1/3 2 8 1/1 1 1/1 1 1 3 1 1 1 2 Y 1 1 I/H PIC16(L)F1768 (A) 18 3 1/3 4 12 2/2 2 2/2 2 2 3 2 1 2 2 Y 1 1 I/H PIC16(L)F1769 (A) 8192/14 128 1024 18 3 1/3 4 12 2/2 2 2/2 2 2 3 2 1 2 2 Y 1 1 I/H Note 1: 2: 4096/7 128 512 Debugging Methods: (I) – Integrated on Chip; (H) – via ICD Header; E – Emulation Product. One pin is input-only. Data Sheet Index: (Unshaded devices are described in this document.) A. DS-40001775 PIC16(L)F1764/5/8/9 Data Sheet, 14/20-Pin 8-Bit Flash Microcontrollers. Note: For other small form factor package availability and marking information, please visit http://www.microchip.com/packaging or contact your local sales office. TABLE 2: PACKAGES Packages PIC16(L)F1764 PIC16(L)F1765 PIC16(L)F1768 PIC16(L)F1769 Note: PDIP SOIC TSSOP QFN SSOP                 Pin details are subject to change.  2014-2019 Microchip Technology Inc. DS40001775E-page 2 PIC16(L)F1764/5/8/9 PIN DIAGRAMS VDD 1 RA5 2 RA4 3 MCLR/VPP/RA3 4 RC5 5 RC4 6 RC3 7 PIC16(L)F1765 14-PIN PDIP, SOIC, TSSOP PIC16(L)F1764 FIGURE 1: 14 13 VSS RA0/ICSPDAT 12 RA1/ICSPCLK 11 RA2 10 RC0 9 RC1 8 RC2 Note: See Table 3 for location of all peripheral functions. VSS NC NC 16-PIN QFN (4x4) VDD FIGURE 2: 16 15 14 13 12 RA0 RA5 1 RA4 2 MCLR/VPP/RA3 3 PIC16(L)F1764 PIC16(L)F1765 11 RA1 10 RA2 9 RC0 5 6 7 8 RC4 RC3 RC2 RC1 RC5 4 Note: See Table 3 for location of all peripheral functions.  2014-2019 Microchip Technology Inc. DS40001775E-page 3 PIC16(L)F1764/5/8/9 20-PIN PDIP, SOIC, SSOP VDD 1 RA5 2 20 VSS 19 RA0 RA4 3 18 RA1 MCLR/VPP/RA3 4 17 RA2 RC5 5 RC4 6 RC3 7 RC6 8 RC7 9 12 RB5 RB7 10 11 RB6 PIC16(L)F1768 PIC16(L)F1769 FIGURE 3: 16 RC0 15 RC1 14 RC2 13 RB4 Note: See Table 4 for location of all peripheral functions. RA0 VSS VDD RA5 20-PIN QFN (4x4) RA4 FIGURE 4: 20 19 18 17 16 15 RA1 MCLR/VPP/RA3 1 RC5 2 RC4 3 PIC16(L)F1768 PIC16(L)F1769 14 RA2 13 RC0 7 8 9 10 RB4 6 RB5 11 RC2 RB6 RC6 5 RB7 12 RC1 RC7 RC3 4 Note: See Table 4 for location of all peripheral functions.  2014-2019 Microchip Technology Inc. DS40001775E-page 4 Op Amp Comparator Zero Cross Programmable Ramp Generator Timers PWM CCP COG CLC Modulator EUSART MSSP Interrupts Pull-ups Hi Current Basic 12 AN0 VREFDAC1REFDAC3REF- DAC1OUT1 DAC3OUT1 — C1IN0+ — — — — — — — — — — IOC Y — ICSPDAT RA1 12 11 AN1 VREF+ DAC1REF+ DAC3REF+ — — C1IN0C2IN0- — — — — — — — — — — IOC Y — ICSPCLK RA2 11 10 AN2 — — — — ZCD — T0CKI(1) — — COG1IN(1) — — — — INT(1) IOC Y — — RA3 4 3 — — — — — — — T6IN(1) — — — — MD1CH(1) — — IOC Y — VPP MCLR RA4 3 2 AN3 — — — — — — T1G(1) SOSCO — — — — MD1CL(1) — — IOC Y — OSC2 CLKOUT RA5 2 1 — — — — — — — T1CKI(1) T2IN(1) SOSCI — — — CLCIN3(1) MD1MOD(1) — — IOC Y — OSC1 CLKIN RC0 10 9 AN4 — — OPA1IN+ C2IN0+ — — T5CKI(1) — — — — — — SCL(1) SCK(1,3) IOC Y — — — — — CLCIN2(1) — — SDI(1) SDA(1,3) IOC Y — — DAC 13 Reference ADC RA0 DS40001775E-page 5 RC1 9 8 AN5 — — OPA1IN- C1IN1C2IN1- — — T4IN(1) RC2 8 7 AN6 — — OPA1OUT C1IN2C2IN2- — PRG1IN0 — — — — — — — — IOC Y — — RC3 7 6 AN7 — — — C1IN3C2IN3- — — T5G(1) — — — CLCIN0(1) — — SS(1) IOC Y — — RC4 6 5 — — — — — — PRG1R(1) T3G(1) — — — CLCIN1(1) — CK(1) — IOC Y Y — RC5 5 4 — — — — — — PRG1F(1) T3CKI(1) — CCP1(1) — — — RX(1,3) — IOC Y Y — VDD 1 16 — — — — — — — — — — — — — — — — — — VDD VSS 14 13 — — — — — — — — — — — — — — — — — — VSS OUT(2) — — — — — — C1OUT — — — PWM3 CCP1 COG1A CLC1OUT MD1OUT DT(3) SDO INT — — — — — — — — — C2OUT — — — PWM5 — COG1B CLC2OUT — TX SDA(3) — — — — — — — — — — — — — — — — COG1C CLC3OUT — CK SCK — — — — — — — — — — — — — — — — COG1D — — — SCL(3) — — — — Note 1: Default peripheral input. Input can be moved to any other pin with the PPS Input Selection register. See Table 12-1. 2: All pin outputs default to PORT latch data. Any pin can be selected as a digital peripheral output with the PPS Output Selection registers. See Table 12-2. 3: These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections. PIC16(L)F1764/5/8/9 16-Pin QFN 14-PIN AND 16-PIN ALLOCATION TABLE (PIC16(L)F1764/5) 14-Pin PDIP/SOIC/TSSOP TABLE 3: I/O  2014-2019 Microchip Technology Inc. PIN ALLOCATION TABLES Comparator Zero Cross Programmable Ramp Generator Timers PWM CCP COG CLC Modulator EUSART MSSP Interrupts Pull-ups Hi Current Basic 16 AN0 VREFDAC1REFDAC2REFDAC3REFDAC4REF- DAC1OUT1 DAC2OUT1 DAC3OUT1 DAC4OUT1 — C1IN0+ C3IN0+ — — — — — — — — — — IOC Y — ICSPDAT RA1 18 15 AN1 VREF+ DAC1REF+ DAC2REF+ DAC3REF+ DAC4REF+ — — C1IN0C2IN0C3IN0C4IN0- — — — — — — — — — — IOC Y — ICSPCLK RA2 17 14 AN2 — — — — ZCD — T0CKI(1) — — COG1IN(1) COG2IN(1) — — — — INT(1) IOC Y — — RA3(4) 4 1 — — — — — — — T6IN(1) — — — — MD1CH(1) MD2CH(1) — — IOC Y — VPP MCLR ICD RA4 3 20 AN3 — — — — — — T1G(1) SOSCO — — — — MD1CL(1) MD2CL(1) — — IOC Y — OSC2 CLKOUT RA5 2 19 — — — — — — — T1CKI(1) T2IN(1) SOSCI — — — CLCIN3(1) MD1MOD(1) MD2MOD(1) — — IOC Y — OSC1 CLKIN RB4 13 10 AN10 — — OPA1IN0- — — — — — — — — — — SDI(1) SDA(1,3) IOC Y — — RB5 12 9 AN11 — — OPA1IN0+ — — — — — — — — — RX(1,3) — IOC Y — — RB6 11 8 — — — — C1IN1+ C3IN1+ — — — — — — — — — SCL(1) SCK(1,3) IOC Y — — RB7 10 7 — — — — C2IN1+ C4IN1+ — — — — — — — — CK(1) — IOC Y — — RC0 16 13 AN4 — — — C2IN0+ C4IN0+ — — T5CKI(1) — — — — — — — IOC Y — — RC1 15 12 AN5 — — — C1IN1C2IN1C3IN1C4IN1- — — T4IN(1) — — — CLCIN2(1) — — — IOC Y — — RC2 14 11 AN6 — — OPA1OUT OPA2IN1OPA2IN1+ C1IN2C2IN2- — PRG1IN0 PRG2IN1 — — — — — — — — IOC Y — — Note 1: 2: 3: 4: Op Amp ADC 19 DAC 20-Pin QFN RA0 Reference 20-Pin PDIP/SOIC/SSOP  2014-2019 Microchip Technology Inc. I/O 20-PIN ALLOCATION TABLE (PIC16(L)F1768/9) Default peripheral input. Input can be moved to any other pin with the PPS Input Selection register. See Table 12-1. All pin outputs default to PORT latch data. Any input capable pin can be selected as a digital peripheral output with the PPS Output Selection registers. See Table 12-2. These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections. Input only. PIC16(L)F1764/5/8/9 DS40001775E-page 6 TABLE 4: ADC Reference DAC Comparator Zero Cross Timers PWM CCP COG CLC Modulator EUSART MSSP Interrupts Pull-ups Hi Current Basic 7 4 AN7 — — OPA2OUT OPA1IN1OPA1IN1+ C1IN3C2IN3C3IN3C4IN3- — PRG2IN0 PRG1IN1 T5G(1) — CCP2(1) — CLCIN0(1) — — — IOC Y — — RC4 6 3 — — — — — — PRG1R(1) PRG2R(1) T3G(1) — — — CLCIN1(1) — — — IOC Y Y — RC5 5 2 — — — — — — PRG1F(1) PRG2F(1) T3CKI(1) — CCP1(1) — — — — — IOC Y Y — RC6 8 5 AN8 — — OPA2IN0- — — — — — — — — — — SS(1) IOC Y — — RC7 9 6 AN9 — — OPA2IN0+ — — — — — — — — — — — IOC Y — — VDD 1 18 — — — — — — — — — — — — — — — — — VSS Programmable Ramp Generator 20-Pin QFN RC3 Op Amp 20-Pin PDIP/SOIC/SSOP 20-PIN ALLOCATION TABLE (PIC16(L)F1768/9) (CONTINUED) I/O  2014-2019 Microchip Technology Inc. TABLE 4: 17 — — — — — — — — — — — — — — — — — — — — — — C1OUT — — — PWM3 CCP1 COG1A CLC1OUT MD1OUT DT(3) SDO — — — — — — — — — — C2OUT — — — PWM4 CCP2 COG1B CLC2OUT MD2OUT TX SDA(3) — — — — — — — — — — C3OUT — — — PWM5 — COG1C CLC3OUT — CK SCK — — — — — — — — — — C4OUT — — — PWM6 — COG1D — — — SCL(3) — — — — — — — — — — — — — — — — COG2A — — — — — — — — — — — — — — — — — — — — COG2B — — — — — — — — — — — — — — — — — — — — COG2C — — — — — — — — — — — — — — — — — — — — COG2D — — — — — — — — Note 1: 2: 3: 4: Default peripheral input. Input can be moved to any other pin with the PPS Input Selection register. See Table 12-1. All pin outputs default to PORT latch data. Any input capable pin can be selected as a digital peripheral output with the PPS Output Selection registers. See Table 12-2. These peripheral functions are bidirectional. The output pin selections must be the same as the input pin selections. Input only. DS40001775E-page 7 PIC16(L)F1764/5/8/9 20 OUT(2) — PIC16(L)F1764/5/8/9 Table of Contents 1.0 Device Overview ........................................................................................................................................................................ 10 2.0 Enhanced Mid-Range CPU ........................................................................................................................................................ 22 3.0 Memory Organization ................................................................................................................................................................. 24 4.0 Device Configuration .................................................................................................................................................................. 62 5.0 Oscillator Module (with Fail-Safe Clock Monitor) ....................................................................................................................... 70 6.0 Resets ........................................................................................................................................................................................ 87 7.0 Interrupts .................................................................................................................................................................................... 96 8.0 Power-Down Mode (Sleep) ...................................................................................................................................................... 111 9.0 Watchdog Timer (WDT) ........................................................................................................................................................... 115 10.0 Flash Program Memory Control ............................................................................................................................................... 119 11.0 I/O Ports ................................................................................................................................................................................... 136 12.0 Peripheral Pin Select (PPS) Module ........................................................................................................................................ 154 13.0 Interrupt-On-Change ................................................................................................................................................................ 162 14.0 Fixed Voltage Reference (FVR) ............................................................................................................................................... 169 15.0 Temperature Indicator Module ................................................................................................................................................. 172 16.0 Analog-to-Digital Converter (ADC) Module .............................................................................................................................. 174 17.0 5-Bit Digital-to-Analog Converter (DAC) Module...................................................................................................................... 188 18.0 10-Bit Digital-to-Analog Converter (DAC) Module.................................................................................................................... 192 19.0 Comparator Module.................................................................................................................................................................. 198 20.0 Zero-Cross Detection (ZCD) Module........................................................................................................................................ 208 21.0 Timer0 Module ......................................................................................................................................................................... 214 22.0 Timer1/3/5 Module with Gate Control....................................................................................................................................... 217 23.0 Timer2/4/6 Module ................................................................................................................................................................... 228 24.0 Capture/Compare/PWM Modules ............................................................................................................................................ 250 25.0 10-Bit Pulse-Width Modulation (PWM) Module ........................................................................................................................ 263 26.0 16-Bit Pulse-Width Modulation (PWM) Module ........................................................................................................................ 269 27.0 Complementary Output Generator (COG) Module................................................................................................................... 295 28.0 Configurable Logic Cell (CLC).................................................................................................................................................. 334 29.0 Operational Amplifier (OPA) Modules ...................................................................................................................................... 348 30.0 Programmable Ramp Generator (PRG) Module ...................................................................................................................... 354 31.0 Data Signal Modulator (DSM) .................................................................................................................................................. 370 32.0 Master Synchronous Serial Port (MSSP) Module .................................................................................................................... 380 33.0 Enhanced Universal Synchronous Asynchronous Receiver Transmitter (EUSART) ............................................................... 435 34.0 In-Circuit Serial Programming™ (ICSP™) ............................................................................................................................... 465 35.0 Instruction Set Summary .......................................................................................................................................................... 467 36.0 Electrical Specifications............................................................................................................................................................ 481 37.0 DC and AC Characteristics Graphs and Charts ....................................................................................................................... 515 38.0 Development Support............................................................................................................................................................... 537 39.0 Packaging Information.............................................................................................................................................................. 541 Appendix A: Data Sheet Revision History ......................................................................................................................................... 563 The Microchip WebSite ..................................................................................................................................................................... 564 Customer Change Notification Service ............................................................................................................................................. 564 Customer Support ............................................................................................................................................................................. 564 Product Identification System ........................................................................................................................................................... 566 Worldwide Sales and Service ........................................................................................................................................................... 568  2014-2019 Microchip Technology Inc. DS40001775E-page 8 PIC16(L)F1764/5/8/9 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors@microchip.com. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Website at: http://www.microchip.com You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000). Errata An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: • Microchip’s Worldwide Website; http://www.microchip.com • Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using. Customer Notification System Register on our website at www.microchip.com to receive the most current information on all of our products.  2014-2019 Microchip Technology Inc. DS40001775E-page 9 PIC16(L)F1764/5/8/9 Figure 1-1 shows a block diagram of the PIC16(L)F1764/5 devices. Figure 1-2 shows a block diagram of the PIC16(L)F1768/9 devices. Table 1-2 and Table 1-3 show the pinout descriptions. Refer to Table 1-1 for peripherals available per device. DEVICE PERIPHERAL SUMMARY Enhanced Universal Synchronous/Asynchronous Receiver/Transmitter (EUSART) EUSART ● ● ● ● MSSP ● ● ● ● Op Amp 1 ● ● ● ● ● ● ● ● ● ● ● ● ● ● PIC16(L)F1765 PIC16(L)F1768 PIC16(L)F1769 Master Synchronous Serial Ports PIC16(L)F1764 TABLE 1-1: Peripheral Analog-to-Digital Converter (ADC) ● ● ● ● PWM3 Fixed Voltage Reference (FVR) ● ● ● ● PWM4 Zero-Cross Detection (ZCD) ● ● ● ● Temperature Indicator ● ● ● ● Peripheral Op Amp Op Amp 2 10-Bit Pulse-Width Modulator (PWM) ● PWM5 ● ● ● ● ● ● PRG2 ● ● ● ● ● Timer2 ● ● ● ● ● Timer4 ● ● ● ● ● ● Timer6 ● ● ● ● ● ● ● Timer1 ● ● ● ● ● ● Timer3 ● ● ● ● Timer5 ● ● ● ● ● ● ● ● 5-Bit Digital-to-Analog Converter (DAC) ● Timer0 16-Bit Timers DAC2 DAC3 ● ● 10-Bit Digital-to-Analog Converter (DAC) DAC1 ● 8-Bit Timers Programmable Ramp Generator (PRG) ● ● PWM6 COG2 PRG1 ● 16-Bit Pulse-Width Modulator (PWM) Complementary Output Generator (COG) COG1 PIC16(L)F1769 The PIC16(L)F1764/5/8/9 are described within this data sheet. See Table 2 for available package configurations. DEVICE PERIPHERAL SUMMARY (CONTINUED) PIC16(L)F1768 TABLE 1-1: PIC16(L)F1765 DEVICE OVERVIEW PIC16(L)F1764 1.0 ● DAC4 Capture/Compare/PWM (CCP/ECCP) Modules CCP1 ● ● CCP2 ● ● ● ● Comparators C1 ● ● ● ● C2 ● ● ● ● C3 ● ● C4 ● ● Configurable Logic Cell (CLC) CLC1 ● ● ● ● CLC2 ● ● ● ● CLC3 ● ● ● ● ● ● ● ● ● ● Data Signal Modulator (DSM) DSM1 DSM2  2014-2019 Microchip Technology Inc. DS40001775E-page 10 PIC16(L)F1764/5/8/9 1.1 1.1.1 Register and Bit Naming Conventions REGISTER NAMES When there are multiple instances of the same peripheral in a device, the peripheral control registers will be depicted as the concatenation of a peripheral identifier, peripheral instance and control identifier. The control registers section will show just one instance of all the register names with an ‘x’ in the place of the peripheral instance number. This naming convention may also be applied to peripherals when there is only one instance of that peripheral in the device to maintain compatibility with other devices in the family that contain more than one. 1.1.2 BIT NAMES There are two variants for bit names: • Short name: Bit function abbreviation • Long name: Peripheral abbreviation + short name 1.1.2.1 Short Bit Names Short bit names are an abbreviation for the bit function. For example, some peripherals are enabled with the EN bit. The bit names shown in the registers are the short name variant. Short bit names are useful when accessing bits in C programs. The general format for accessing bits by the short name is RegisterNamebits.ShortName. For example, the enable bit, EN, in the COG1CON0 register can be set in C programs with the instruction COG1CON0bits.EN = 1. Short names are generally not useful in assembly programs because the same name may be used by different peripherals in different bit positions. When this occurs, during the include file generation, all instances of that short bit name are appended with an underscore plus the name of the register in which the bit resides to avoid naming contentions. 1.1.2.2 Long Bit Names Long bit names are constructed by adding a peripheral abbreviation prefix to the short name. The prefix is unique to the peripheral thereby making every long bit name unique. The long bit name for the COG1 enable bit is the COG1 prefix, G1, appended with the enable bit short name, EN, resulting in the unique bit name G1EN. Long bit names are useful in both C and assembly programs. For example, in C the COG1CON0 enable bit can be set with the G1EN = 1 instruction. In assembly, this bit can be set with the BSF COG1CON0,G1EN instruction.  2014-2019 Microchip Technology Inc. 1.1.2.3 Bit Fields Bit fields are two or more adjacent bits in the same register. Bit fields adhere only to the short bit naming convention. For example, the three Least Significant bits of the COG1CON0 register contain the mode control bits. The short name for this field is MD. There is no long bit name variant. Bit field access is only possible in C programs. The following example demonstrates a C program instruction for setting the COG1 to the Push-Pull mode: COG1CON0bits.MD = 0x5; Individual bits in a bit field can also be accessed with long and short bit names. Each bit is the field name appended with the number of the bit position within the field. For example, the Most Significant mode bit has the short bit name MD2, and the long bit name is G1MD2. The following two examples demonstrate assembly program sequences for setting the COG1 to Push-Pull mode: Example 1: MOVLW ANDWF MOVLW IORWF ~(1 B23>  $$ 6 6""  B2 2 @2 '$&&  2 > > 4)1@ $OVRFDOOHG94)1 1RWH )RUWKHPRVWFXUUHQWSDFNDJHGUDZLQJVSOHDVHVHHWKH0LFURFKLS3DFNDJLQJ6SHFLILFDWLRQORFDWHGDW KWWSZZZPLFURFKLSFRPSDFNDJLQJ ' 127( $ % 1   ( '$780% '$780$ ;  & ;  & 7239,(:  & & 6($7,1* 3/$1( $ $ ; $  & 6,'(9,(:  & $ % '  & $ % (   127( . 1 ;E   / H & $ % & %277209,(: 0LFURFKLS7HFKQRORJ\'UDZLQJ&5HY&6KHHWRI  2014-2019 Microchip Technology Inc. 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