PIC16(L)F184XX
Full-Featured, Low Pin Count Microcontrollers with XLP
Product Brief
Description
PIC16(L)F184XX microcontrollers feature Intelligent Analog, Core Independent Peripherals (CIPs) and
communication peripherals combined with eXtreme Low-Power (XLP) for a wide range of general
purpose and low-power applications. Features such as a 12-bit Analog-to-Digital Converter with
Computation (ADC2), Memory Access Partitioning (MAP), the Device Information Area (DIA), Powersaving operating modes, and Peripheral Pin Select (PPS), offer flexible solutions for a wide variety of
custom applications.
Core Features
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C Compiler Optimized RISC Architecture
Only 48 instructions
Operating Speed:
– DC – 32 MHz clock input
– 125 ns minimum instruction cycle
Interrupt Capability
16-Level Deep Hardware Stack
Timers:
– Up to two 24-bit timers
– Up to four 8-bit timers
– Up to four 16-bit timers
Low-Current Power-on Reset (POR)
Configurable Power-up Timer (PWRTE)
Brown-out Reset (BOR)
Low-Power BOR (LPBOR) Option
Windowed Watchdog Timer (WWDT):
– Variable prescaler selection
– Variable window size selection
– Configurable in hardware (Configuration Words) and/or software
Programmable Code Protection
Memory
•
•
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Up to 28 KB Program Flash Memory
Up to 2 KB Data SRAM Memory
256B Data EEPROM
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 1
PIC16(L)F184XX
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Direct, Indirect and Relative Addressing modes
Memory Access Partition (MAP):
– Write-protect
– Customizable partition
Device Information Area (DIA)
Device Configuration Information (DCI)
Operating Characteristics
•
•
Operating Voltage Range:
– 1.8V to 3.6V (PIC16LF184XX)
– 2.3V to 5.5V (PIC16F184XX)
Temperature Range:
– Industrial: -40°C to 85°C
– Extended: -40°C to 125°C
Power-Saving Operation Modes
•
•
•
•
Doze: CPU and Peripherals Running at Different Cycle Rates (typically CPU is lower)
Idle: CPU Halted While Peripherals Operate
Sleep: Lowest Power Consumption
Peripheral Module Disable (PMD):
– Ability to selectively disable hardware module to minimize active power consumption of unused
peripherals
eXtreme Low-Power (XLP) Features
•
•
•
•
Sleep mode: 50 nA @ 1.8, typical
Watchdog Timer: 500 nA @ 1.8V, typical
Secondary Oscillator: 500 nA @ 32 kHz
Operating Current:
– 8 uA @ 32 kHz, 1.8V, typical
– 32 uA/MHz @ 1.8V, typical
Digital Peripherals
•
•
•
Configurable Logic Cell (CLC):
– 4 CLCs
– Integrated combinational and sequential logic
Complementary Waveform Generator (CWG):
– Up to 3 CWGs
– Rising and falling edge dead-band control
– Full-bridge, half-bridge, 1-channel drive
– Multiple signal sources
Capture/Compare/PWM (CCP) modules:
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 2
PIC16(L)F184XX
•
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•
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– Up to 5 CCPs
– 16-bit resolution for Capture/Compare modes
– 10-bit resolution for PWM mode
Pulse-Width Modulators (PWM):
– 2 10-bit PWMs
Numerically Controlled Oscillator (NCO):
– Precision linear frequency generator (@50% duty cycle) with 0.0001% step size of source input
clock
– Input Clock: 0 Hz < fNCO < 32 MHz
– Resolution: fNCO/220
Peripheral Pin Select (PPS):
– I/O pin remapping of digital peripherals
Serial Communications:
– EUSART
• Up to 2 EUSARTs
• RS-232, RS-485, LIN compatible
• Auto-Baud Detect, Auto-wake-up on Start.
– Master Synchronous Serial Port (MSSP)
• Up to 2 MSSPs
• SPI
™
• I2C, SMBus and PMBus compatible
Data Signal Modulator (DSM)
– Modulates a carrier signal with digital data to create custom carrier synchronized output
waveforms
Up to 26 I/O Pins:
– Individually programmable pull-ups
– Slew rate control
– Interrupt-on-change with edge-select
– Input level selection control (ST or TTL)
– Digital open-drain enable
Timer modules:
– Timer0:
• 8/16-bit timer/counter
• Synchronous or asynchronous operation
• Programmable prescaler/postscaler
• Time base for capture/compare function
– Timer1/3/5 with gate control:
• 16-bit timer/counter
• Programmable internal or external clock sources
• Multiple gate sources
• Multiple gate modes
• Time base for capture/compare function
– Timer2/4/6 with Hardware Limit Timer:
• 8-bit timers
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 3
PIC16(L)F184XX
–
• Programmable prescaler/postscaler
• Time base for PWM function
• Hardware Limit (HLT) and one-shot extensions
• Selectable clock sources
Signal Measurement Timer (SMT)
• Up to 2 SMTs
• 24-bit timer/counter with programmable prescaler
Analog Peripherals
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Analog-to-Digital Converter (ADC):
– 12-bit with up to 24 external channels
– Conversion available during Sleep
– Automated post-processing
– Automated math functions on input signals:
• Averaging, filter calculations, oversampling and threshold comparison
– Integrated charge pump for low-voltage operation
– CVD support
Zero-Cross Detect (ZCD):
– AC high voltage zero-crossing detection for simplifying TRIAC control
– Synchronized switching control and timing
Temperature Sensor Circuit
Comparator:
– 2 Comparators
– Fixed Voltage Reference at (non)inverting input(s)
– Comparator outputs externally accessible
Digital-to-Analog Converter (DAC):
– 5-bit resolution, rail-to-rail
– Positive Reference Selection
– Unbuffered I/O pin output
– Internal connections to ADCs and comparators
Fixed Voltage Reference (FVR) module:
– 1.024V, 2.048V and 4.096V output levels
Flexible Oscillator Structure
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High-Precision Internal Oscillator:
– Software-selectable frequency range up to 32 MHz
– ±2% at calibration (nominal)
4x PLL for use with external sources
– up to 32 MHz (4-8 MHz input)
2x PLL for use with the HFINTOSC
– up to 32 MHz
Low-Power Internal 31 kHz Oscillator (LFINTOSC)
External 32.768 kHz Crystal Oscillator (SOCS)
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 4
PIC16(L)F184XX
•
External Oscillator Block with:
– Three crystal/resonator modes up to 20 MHz
– Three external clock modes up to 32 MHz
– Fail-Safe Clock Monitor
• Detects clock source failure
– Oscillator Start-up Timer (OST)
• Ensures stability of crystal oscillator sources
Family Types
1
1
4
1
Y Y Y Y Y Y
I
PIC16(L)F18425 8192 14 256 1024 12 11 1
2
2
1 4/4 4
2
1
1
2
4
1
Y Y Y Y Y Y
I
PIC16(L)F18426 16384 28 256 2048 12 11 1
2
2
1 4/4 4
2
1
1
2
4
1
Y Y Y Y Y Y
I
PIC16(L)F18444 4096
7 256 512 12 17 1
2
2
1 4/4 4
2
1
1
1
4
1
Y Y Y Y Y Y
I
PIC16(L)F18445 8192 14 256 1024 12 17 1
2
2
1 4/4 4
2
1
1
2
4
1
Y Y Y Y Y Y
I
PIC16(L)F18446 16384 28 256 2048 12 17 1
2
2
1 4/4 4
2
1
1
2
4
1
Y Y Y Y Y Y
I
PIC16(L)F18455 8192 14 256 1024 26 24 1
2
3
1 4/4 5
2
1
2
2
4
1
Y Y Y Y Y Y
I
PIC16(L)F18456 16384 28 256 2048 26 24 1
2
3
1 4/4 5
2
1
2
2
4
1
Y Y Y Y Y Y
I
Note:
1. I - Debugging integrated on chip.
2. One pin is input-only.
Packages
TSSOP
UQFN
(4x4)
●
●
●
●
●
●
●
PIC16(L)F18426
●
●
●
●
PIC16(L)F18444
●
●
Packages
PDIP
SOIC
PIC16(L)F18424
●
PIC16(L)F18425
© 2017 Microchip Technology Inc.
Product Brief
SSOP
●
●
DS40001894B-page 5
Debug(1)
DSM
Device Information Area
CLC
Memory Access Partition
MSSP (I2C/SPI)
Windowed Watchdog Timer
EUSART
1
PMD
NCO
2
XLP
PWM
1 4/4 4
PPS
CCP
Timers (8/16-bit)
CWG
2
Clock Ref
Comparators
2
PIC16(L)F18424 4096
I/O’s(2)
7 256 512 12 11 1
Device
5-bit DAC
12-bit ADC (ch)
Data SRAM (bytes)
Data Memory (EEPROM) (bytes)
Program Flash Memory (Kbytes)
Program Flash Memory (Words)
Table 1. PIC16(L)F184XX Family Types
PIC16(L)F184XX
Packages
TSSOP
UQFN
(4x4)
PDIP
SOIC
SSOP
PIC16(L)F18445
●
●
●
●
PIC16(L)F18446
●
●
●
●
PIC16(L)F18455
●
●
●
●
PIC16(L)F18456
●
●
●
●
Note: Pin details are subject to change.
Important: For other small form-factor package availability and marking information, visit
www.microchip.com/ packaging or contact your local sales office.
Pin Diagrams
14/16-Pin Diagrams
Figure 1. 14-Pin PDIP, SOIC, TSSOP
Rev. 00-000014A
6/21/2017
VDD
1
RA5 2
14
13
RA4 3
12 RA1/ICSPCLK
VSS
RA0/ICSPDAT
MCLR/VPP/RA3
4
11 RA2
RC5
5
10
RC0
RC4 6
9
RC1
RC3 7
8
RC2
Figure 2. 16-Pin UQFN (4x4)
NC
VSS
NC
VDD
Rev. 00-000016A
6/21/2017
16 15 14 13
RA5 1
12 RA0/ICSPDAT
RA4 2
11 RA1/ICSPCLK
9 RC0
5
6
7
8
RC1
RC5 4
RC2
10 RA2
RC3
MCLR/VPP/RA3 3
RC4
1
Note: It is recommended that the exposed bottom pad be connected to VSS.
Related Links
14/16-Pin Allocation Table
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 6
PIC16(L)F184XX
20-Pin Diagrams
Figure 3. 20-Pin PDIP, SOIC, TSSOP
Rev. 00-000020A
6/21/2017
VDD 1
RA5 2
20 VSS
19 RA0/ICSPDAT
RA4 3
18 RA1/ICSPCLK
17 RA2
MCLR/VPP/RA3 4
RC5 5
16 RC0
RC4 6
15 RC1
RC3 7
14 RC2
RC6 8
13 RB4
RC7 9
12 RB5
RB7 10
11 RB6
Figure 4. 20-Pin UQFN (4x4)
RA0/ICSPDAT
VSS
VDD
RA5
RA4
Rev. 00-000020B
6/21/2016
20 19 18 17 16
15 RA1/ICSPCLK
MCLR/VPP/RA3 1
13 RC0
RC3 4
12 RC1
RC6 5
11 RC2
8
9 10
RB4
7
RB5
6
RB6
14 RA2
RC4 3
RB7
RC5 2
RC7
2
Note: It is recommended that the exposed bottom pad be connected to VSS.
Related Links
20-Pin Allocation Table
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 7
Figure 5. 28-pin SPDIP, SSOP, SOIC
Rev. 00-000 028A
3/6/201 7
MCLR/VPP /RE3
RA0
RA1
RA2
RA3
RA4
RA5
VSS
RA7
RA6
RC0
RC1
RC2
RC3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
RB7/ICSPDAT
RB6/ICSPCLK
RB6
RB4
RB3
RB2
RB1
RB0
VDD
VSS
RC7
RC6
RC5
RC4
RA1
RA0
RE3/MCLR/VPP
RB7/ICSPDAT
RB6/ICSPCLK
RB5
RB4
Figure 6. 28-pin UQFN
Rev. 00-000028B
6/23/2017
28 27 26 25 24 23 22
RA2
RA3
RA4
RA5
VSS
RA7
RA6
1
21 RB3
20 RB2
2
3
19 RB1
18 RB0
4
5
17 VDD
16 VSS
6
7
15 RC7
8 9 10 11 12 13 14
RC0
RC1
RC2
RC3
RC4
RC5
RC6
3
PIC16(L)F184XX
Filename:
00-000028A.vsd
Title:
28-pin DIP
Last Edit:
3/6/2017
First Used:
N/A
Notes:
Generic 28-pin dual in-line diagram
28-Pin
Diagrams
Note: It is recommended that the exposed bottom pad be connected to VSS.
Related Links
28-Pin Allocation Table
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 8
PIC16(L)F184XX
Pin Allocation Tables
RA0
13 12
ANA0
—
C1IN0+
—
DAC1OUT1
MDSRC(1)
—
—
—
—
SS2(1)
Basic
Pull-up
Interrupts
CLKR
CLC
EUSART
ZCD
MSSP
CWG
PWM
CCP
Timers
DSM
DAC
NCO
Comparator
Reference
ADC
16-pin UQFN
14/16-Pin Allocation Table
14-pin PDIP/SOIC/TSSOP
I/O
1
ICDDAT
—
—
—
—
IOCA0
Y
ICSPDAT
C1IN0
RA1
12 11
ANA1
ADCVREF+
ICDCLK
—
DAC1VREF+
—
—
—
—
—
—
—
—
—
—
IOCA1
Y
C2IN0-
RA2
11 10
RA3
4
3
ICSPCLK
CWG1IN(1)
ANA2
ADCVREF-
—
—
DAC1VREF-
—
T0CKI(1)
CCP3IN(1)
—
—
—
—
—
—
—
T6IN(1)
—
—
CWG2IN(1)
—
ZCD1
—
—
—
IOCA2
Y
—
—
—
—
—
IOCA3
Y
INT0(1)
MCLR
—
VPP
CLKOUT
T1G(1)
RA4
3
2
ANA4
—
—
—
—
—
SMT1WIN(1)
—
—
—
—
—
—
—
—
IOCA4
Y
SOSCO
OSC2
T1CKI(1)
RA5
2
1
ANA5
—
—
—
—
—
T2IN(1)
CLKIN
—
—
—
—
—
—
CLCIN3(1)
—
IOCA5
Y
SMT1SIG(1)
SOSCI
OSC1
SCK1(1)
RC0
10
9
ANC0
—
C2IN0+
—
—
—
T5CKI(1)
—
—
—
—
—
—
—
IOCC0
Y
—
—
—
CLCIN2(1)
—
IOCC1
Y
—
SCL1(1,3,4)
SDI1(1)
C1IN1RC1
9
8
ANC1
—
—
—
—
T4IN(1)
CCP4IN(1)
—
—
SDA1(1,3,4)
C2IN1-
ANC2
RC2
8
7
C1IN2—
ADACT(1)
—
—
MDCARL(1)
—
—
—
—
—
—
—
—
—
IOCC2
Y
—
—
—
—
T5G(1)
CCP2IN(1)
—
—
SS1(1)
—
—
CLCIN0(1)
—
IOCC3
Y
—
—
—
—
T3G(1)
—
—
—
CK1(1,3) CLCIN1(1)
—
IOCC4
Y
—
—
—
IOCC5
Y
—
C2IN2-
C1IN3RC3
7
6
ANC3
—
C2IN3-
SCK2(1,5)
RC4
6
5
ANC4
—
—
—
SCL2(1,3,4,5)
SDI2(1,5)
RC5
5
4
ANC5
—
—
—
—
MDCARH(1)
T3CKI(1)
CCP1IN(1)
—
—
RX1(1)
—
SDA2(1,3,4,5)
DT1(1,3)
VDD
1
16
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VDD
VSS
14 13
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VSS
CWG1A
SDO1
—
DSM1OUT
TMR0OUT
CCP1OUT
PWM6OUT
—
DT1(3)
—
—
—
CWG2A
SDO2
OUT(2) — — ADCGRDA
—
C1OUT NCO1OUT
© 2017 Microchip Technology Inc.
Product Brief
CLC1OUT CLKR
DS40001894B-page 9
— —
—
— —
C2OUT
—
—
—
—
—
—
—
—
—
—
—
—
—
—
CCP3OUT
—
CWG1B
SCK1
CWG2B
SCK2
CWG1C
SCL1(3)
CWG2C
SCL2(3)
CWG1D
SDA1(3)
CWG2D
SDA2(3)
—
CCP4OUT
—
Basic
Pull-up
Interrupts
CLKR
CLC
EUSART
ZCD
PWM7OUT
MSSP
CCP2OUT
—
CWG
Timers
DSM
DAC
—
PWM
—
CCP
— — ADCGRDB
NCO
Comparator
Reference
ADC
16-pin UQFN
14-pin PDIP/SOIC/TSSOP
I/O
PIC16(L)F184XX
—
CK1(3)
CLC2OUT
—
—
—
—
—
TX1
CLC3OUT
—
—
—
—
—
—
CLC4OUT
—
—
—
—
Note:
1. This is a PPS re-mappable input signal. The input function may be moved from the default location
shown to one of several other PORTx pins.
2. All digital output signals shown in these rows are PPS re-mappable. These signals may be mapped to
output onto one of several PORTx pin options.
3. This is a bidirectional signal. For normal module operation, the firmware should map this signal to the
same pin in both the PPS input and PPS output registers.
4. These pins are configured for I2C logic levels. PPS assignments to the other pins will operate, but input
logic levels will be standard TTL/ST as selected by the INLVL register, instead of the I2C specific or
SMBUS input buffer thresholds.
5. MSSP2 is not available on the PIC16(L)F18424 or PIC16(L)F18444 devices.
Basic
Pull-up
Interrupts
CLKR
CLC
EUSART
ZCD
MSSP
CWG
PWM
CCP
Timers
DSM
DAC
NCO
Comparator
Reference
ADC
20-pin UQFN
20-Pin Allocation Table
20-pin PDIP/SOIC/TSSOP
I/O
2
ICDDAT/
RA0
19 16
ANA0
—
C1IN0+
—
DAC1OUT1
—
—
—
—
—
—
—
—
—
—
IOCA0 Y
ICSPDAT
RA1
18 15
ANA1
ADCVREF
+
C1IN0—
C2IN0-
DAC1VREF
MDSRC(1)
+
ICDCLK/
—
—
—
—
SS2(1)
—
—
—
—
IOCA1 Y
ICSPCLK
CWG1IN(1)
RA2
17 14
ANA2
ADCVREF-
—
—
DAC1VREF-
—
T0CKI(1)
—
—
—
ZCD1
—
CLCIN0(1)
—
IOCA2 Y
—
—
—
—
—
IOCA3 Y
INT0(1)
CWG2IN(1)
MCLR
RA3
4
1
—
—
—
—
—
—
—
—
—
—
VPP
RA4
3 20
ANA4
—
—
—
© 2017 Microchip Technology Inc.
—
—
T1G(1)
CCP4IN(1)
Product Brief
—
—
—
—
—
—
—
DS40001894B-page 10
IOCA4 Y CLKOUT
Basic
Pull-up
Interrupts
CLKR
CLC
EUSART
ZCD
MSSP
CWG
PWM
CCP
Timers
DSM
DAC
NCO
Comparator
Reference
ADC
20-pin UQFN
20-pin PDIP/SOIC/TSSOP
I/O
PIC16(L)F184XX
SOSCO
SMT1WIN(1)
OSC2
T1CKI(1)
RA5
2 19
ANA5
—
—
—
—
—
T2IN(1)
CLKIN
—
—
—
—
—
—
—
—
IOCA5 Y
SMT1SIG(1)
SOSCI
OSC1
SDI1(1)
RB4
13 10
ANB4
—
—
—
—
—
T5G(1)
—
—
—
—
—
CLCIN2(1)
—
IOCB4 Y
—
CLCIN3(1)
—
IOCB5 Y
—
SDA1(1,3,4)
SCK2(1,5)
RB5
12 9
ANB5
—
—
—
—
—
—
CCP3IN(1)
—
—
RX1(1)
—
SCL2(1,3,4,5)
DT1(1,3)
SCK1(1)
RB6
11 8
ANB6
—
—
—
—
—
—
—
—
—
—
—
—
—
IOCB6 Y
—
—
CK1(1,3)
—
—
IOCB7 Y
—
SCL1(1,3,4)
SDI2(1,5)
RB7
10 7
ANB7
—
—
—
—
—
T6IN(1)
—
—
—
SDA2(1,3,4,5)
T3CKI(1)
RC0
16 13
ANC0
—
C2IN0+
—
—
—
—
—
—
—
—
—
—
—
IOCC0 Y
—
T3G(1)
C1IN1RC1
15 12
ANC1
—
—
—
—
—
—
—
—
—
—
—
—
—
IOCC1 Y
—
—
—
MDCARL(1)
T5CKI(1)
—
—
—
—
—
—
—
—
IOCC2 Y
—
—
—
—
—
CCP2IN(1)
—
—
—
—
—
CLCIN1(1)
—
IOCC3 Y
—
—
C2IN1-
ANC2
RC2
14 11
C1IN2—
ADACT(1)
C2IN2-
C1IN3RC3
7
4
ANC3
—
C2IN3-
RC4
6
3
ANC4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
IOCC4 Y
RC5
5
2
ANC5
—
—
—
—
MDCARH(1)
T4IN(1)
CCP1IN(1)
—
—
—
—
—
—
IOCC5 Y
—
RC6
8
5
ANC6
—
—
—
—
—
—
—
—
—
—
SS1(1)
—
—
—
—
IOCC6 Y
—
6
IOCC7 Y
RC7
9
ANC7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VDD
1 18
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VDD
VSS
20 17
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VSS
CWG1A
SDO1
—
DSM1OUT
CWG2A
SDO2
CWG1B
SCK1
CWG2B
SCK2
— — ADCGRDA
—
C1OUT NCO1OUT
TMR0OUT CCP1OUT PWM6OUT
—
—
DT1(3) CLC1OUT CLKR
—
—
—
—
CK1(3) CLC2OUT
—
—
—
OUT(2)
— — ADCGRDB
—
C2OUT
—
© 2017 Microchip Technology Inc.
—
—
—
CCP2OUT PWM7OUT
Product Brief
—
DS40001894B-page 11
— —
—
— —
—
—
—
—
—
—
—
—
—
—
—
—
CCP3OUT
—
CWG1C
SCL1(3)
CWG2C
SCL2(3)
CWG1D
SDA1(3)
CWG2D
SDA2(3)
—
CCP4OUT
—
TX1
CLC3OUT
—
—
—
—
—
—
CLC4OUT
—
—
—
—
Basic
Pull-up
Interrupts
CLKR
CLC
EUSART
ZCD
MSSP
CWG
PWM
CCP
Timers
DSM
DAC
NCO
Comparator
27
Reference
28-pin UQFN
2
ADC
28-pin PDIP/SOIC/TSSOP
I/O
28-Pin Allocation Table
C1IN0RA0
ANA0
—
—
—
—
—
—
—
—
—
—
—
CLCIN0(1)
—
IOCA0
Y
—
—
—
—
—
—
—
—
—
—
—
CLCIN1(1)
—
IOCA1
Y
—
—
—
—
—
—
—
—
—
—
—
IOCA2
Y
—
—
C2IN0-
C1IN1RA1
3
28
ANA1
—
C2IN1-
C1IN0+
RA2
4
1
ANA2
ADCVREF-
DAC1VREF—
DAC1OUT1
C2IN0+
RA3
5
2
ANA3
—
DAC1VREF+
MDCARL(1)
—
—
—
—
—
—
—
—
—
IOCA3
Y
RA4
6
3
ANA4
—
—
—
—
T0CKI(1)
CCP5IN(1)
—
—
—
—
—
IOCA4
Y
—
7
4
ANA5
—
—
—
—
—
—
—
—
—
SS1(1)
—
RA5
MDCARH(1)
MDSRC(1)
—
—
—
—
IOCA5
Y
—
RA6
10
7
ANA6
—
—
—
—
—
—
—
—
—
—
—
—
—
—
IOCA6
Y
ADCVREF+ C1IN1+
OSC2
CLKOUT
RA7
9
6
ANA7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
IOCA7
Y
OSC1
CLKIN
RB0
21 18
ANB0
—
C2IN1+
—
© 2017 Microchip Technology Inc.
—
—
—
CCP4IN(1)
—
CWG1IN(1)
Product Brief
—
ZCD1
—
Basic
—
Note:
1. This is a PPS re-mappable input signal. The input function may be moved from the default location
shown to one of several other PORTx pins.
2. All digital output signals shown in these rows are PPS re-mappable. These signals may be mapped to
output onto one of several PORTx pin options.
3. This is a bidirectional signal. For normal module operation, the firmware should map this signal to the
same pin in both the PPS input and PPS output registers.
4. These pins are configured for I2C logic levels. PPS assignments to the other pins will operate, but input
logic levels will be standard TTL/ST as selected by the INLVL register, instead of the I2C specific or
SMBUS input buffer thresholds.
5. MSSP2 is not available on the PIC16(L)F18424 or PIC16(L)F18444 devices.
3
Pull-up
Interrupts
CLKR
CLC
EUSART
ZCD
MSSP
CWG
PWM
CCP
Timers
DSM
DAC
NCO
Comparator
Reference
ADC
20-pin UQFN
20-pin PDIP/SOIC/TSSOP
I/O
PIC16(L)F184XX
—
—
IOCB0
Y
DS40001894B-page 12
INT0(1)
RB1
22 19
ANB1
—
—
—
—
—
—
—
CWG2IN(1)
C1IN3-
23 20
ANB2
—
—
SCK2(1)
Basic
Pull-up
Interrupts
CLKR
CLC
EUSART
—
—
—
—
IOCB1
Y
—
—
—
—
—
IOCB2
Y
—
SCL2(1,3)
C2IN3RB2
ZCD
MSSP
CWG
PWM
CCP
Timers
DSM
DAC
NCO
Comparator
Reference
ADC
28-pin UQFN
28-pin PDIP/SOIC/TSSOP
I/O
PIC16(L)F184XX
—
—
—
—
—
—
CWG3IN(1)
SDI2(1)
SDA2(1,3)SS2(1)
RB3
24 21
ANB3
—
—
—
—
—
—
—
—
—
—
—
—
—
IOCB3
Y
—
—
—
—
—
—
—
—
—
IOCB4
Y
—
CCP3IN(1)
—
—
—
—
—
—
—
IOCB5
Y
—
—
—
—
—
—
—
IOCB6
Y
C1IN2C2IN2-
T5G(1)
ANB4
RB4
25 22
RB5
26 23
RB6
27 24
—
—
—
—
—
ANB5
—
—
—
—
—
ANB6
—
—
—
—
—
ADACT(1)
SMT2WIN(1)
T1G(1)
SMT2SIG(1)
—
CK2(1,3) CLCIN2(1)
ICSPCLK
ICDCLK
RB7
28 25
ANB7
—
—
—
DAC1OUT2
—
T6IN(1)
RX2(1)
—
—
—
—
—
DT2(1,3)
ICSPDAT
—
—
IOCB7
Y
ICDDAT
T1CKI(1)
T3CKI(1)
RC0
11
8
ANC0
—
—
—
—
—
—
—
—
—
—
—
—
—
IOCC0
Y
SOSCO
CCP2IN(1)
CCP1IN(1)
—
—
—
—
—
—
—
IOCC1
Y
SOSCI
—
—
—
—
—
—
—
IOCC2
Y
—
—
—
—
—
IOCC3
Y
—
—
—
—
—
IOCC4
Y
—
T3G(1)
SMT1WIN(1)
RC1
12
9
ANC1
—
—
—
—
—
RC2
13 10
ANC2
—
—
—
—
—
SMT1SIG(1)
T5CKI(1)
SCK1(1)
RC3
14 11
ANC3
—
—
—
—
—
T2IN(1)
—
—
—
RC4
15 12
ANC4
—
—
—
—
—
—
—
—
—
RC5
16 13
ANC5
—
—
—
—
—
T4IN(1)
—
—
—
—
—
—
—
—
IOCC5
Y
—
RC6
17 14
ANC6
—
—
—
—
—
—
—
—
—
—
—
—
CK1(1,3)
—
IOCC6
Y
—
—
IOCC7
Y
—
—
IOCE3
Y
SCL1(1,3)
SDI1(1)
SDA1(1,3)
RX1(1)
RC7
18 15
RE3
1
26
ANC7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DT1(1,3)
—
MCLR
VPP
VDD
20 17
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VDD
VSS
8
5
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VSS
VSS
19 16
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
VSS
—
—
—
CWG1A
SDO1
OUT(2) — — ADCGRDA
—
C1OUT NCO1OUT
—
DSM1OUT
TMR0OUT
CCP1OUT PWM6OUT
CWG2A
DT1(3)
—
SDO2
DT2(3)
CLC1OUT CLKR
CWG3A
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 13
Basic
Pull-up
Interrupts
CLKR
CLC
EUSART
ZCD
MSSP
CWG
PWM
CCP
Timers
DSM
DAC
NCO
Comparator
Reference
ADC
28-pin UQFN
28-pin PDIP/SOIC/TSSOP
I/O
PIC16(L)F184XX
CWG1B
SCK1
— — ADCGRDB
—
C2OUT
—
—
—
—
CCP2OUT PWM7OUT
CWG2B
CK1(3)
—
SCK2
CK2(3)
CLC2OUT
—
—
—
—
CLC3OUT
—
—
—
—
—
—
—
—
—
CWG3B
CWG1C
SCL1(3)
— —
—
—
—
—
—
—
—
CCP3OUT
—
CWG2C
TX1
—
TX2
SCL2(3)
CWG3C
CWG1D
SDA1(3)
— —
—
—
—
—
—
—
—
CCP4OUT
—
CWG2D
—
—
CLC4OUT
—
—
—
—
—
SDA2(3)
CWG3D
— —
—
—
—
—
—
—
—
CCP5OUT
—
—
—
Note:
1. This is a PPS re-mappable input signal. The input function may be moved from the default location
shown to one of several other PORTx pins.
2. All digital output signals shown in these rows are PPS re-mappable. These signals may be mapped to
output onto one of several PORTx pin options.
3. This is a bidirectional signal. For normal module operation, the firmware should map this signal to the
same pin in both the PPS input and PPS output registers.
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 14
PIC16(L)F184XX
The Microchip Web Site
Microchip provides online support via our web site at http://www.microchip.com/. This web site is used as
a means to make files and information easily available to customers. Accessible by using your favorite
Internet browser, the web site contains the following information:
•
•
•
Product Support – Data sheets and errata, application notes and sample programs, design
resources, user’s guides and hardware support documents, latest software releases and archived
software
General Technical Support – Frequently Asked Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant program member listing
Business of Microchip – Product selector and ordering guides, latest Microchip press releases,
listing of seminars and events, listings of Microchip sales offices, distributors and factory
representatives
Customer Change Notification Service
Microchip’s customer notification service helps keep customers current on Microchip products.
Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata
related to a specified product family or development tool of interest.
To register, access the Microchip web site at http://www.microchip.com/. Under “Support”, click on
“Customer Change Notification” and follow the registration instructions.
Customer Support
Users of Microchip products can receive assistance through several channels:
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Customers should contact their distributor, representative or Field Application Engineer (FAE) for support.
Local sales offices are also available to help customers. A listing of sales offices and locations is included
in the back of this document.
Technical support is available through the web site at: http://www.microchip.com/support
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices:
•
•
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the
market today, when used in the intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of
these methods, to our knowledge, require using the Microchip products in a manner outside the
operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is
engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 15
PIC16(L)F184XX
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the
code protection features of our products. Attempts to break Microchip’s code protection feature may be a
violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software
or other copyrighted work, you may have a right to sue for relief under that Act.
Legal Notice
Information contained in this publication regarding device applications and the like is provided only for
your convenience and may be superseded by updates. It is your responsibility to ensure that your
application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY
OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS
CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life
support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend,
indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting
from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual
property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings,
BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo,
Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA,
SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight
Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom,
chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController,
dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient
Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL
ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
©
2017, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 16
PIC16(L)F184XX
ISBN: 978-1-5224-2115-3
Quality Management System Certified by DNV
ISO/TS 16949
Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer
fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California
®
®
and India. The Company’s quality system processes and procedures are for its PIC MCUs and dsPIC
®
DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design and manufacture of development
systems is ISO 9001:2000 certified.
© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 17
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
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Web Address:
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© 2017 Microchip Technology Inc.
Product Brief
DS40001894B-page 18