PL102-10SC

PL102-10 Low Skew Output Buffer Features General Description • Frequency Range: - 15 MHz to 170 MHz @ 3.3V - 15 MHz to 145 MHz @ 2.5V • Internal Phase Locked Loop Allows Spread Spectrum Modulation on Reference Clock to Pass to Outputs • Zero Input-to-Output Delay • Less than 700 ps Device-to-Device Skew • Less than 200 ps Skew between Outputs • Less than 100 ps Cycle-to-Cycle Jitter • 2.5V or 3.3V Power Supply • Available in 8-Lead SOIC or 6-Lead SOT23 GREEN/RoHS-Compliant Packages The PL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-lead SOIC or 6-lead SOT23 package. It has two outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL. Because the skew between the input and output is less than ±350 ps, the device acts as a zero delay buffer. Package Types PL102-10 6-Lead SOT23 (T) (Top View) PL102-10 8-Lead SOIC (S) (Top View) REFIN 1 8 CLKOUT CLK1 1 6 CLK2 GND 2 7 DNC GND 2 5 VDD CLK1 3 6 DNC REFIN 3 4 CLKOUT CLK2 4 5 VDD Block Diagram REFIN PLL CLKOUT CLK1 CLK2  2020 Microchip Technology Inc. DS20006345A-page 1 PL102-10 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings † Supply Voltage (VDD) .............................................................................................................................................. +4.6V DC Input Voltage (VI)........................................................................................................................ –0.5V to VDD + 0.5V DC Output Voltage (VO) ................................................................................................................... –0.5V to VDD + 0.5V † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Parameter Supply Voltage Symbol Min. Typ. Max. Units VDD 2.25 — 3.63 V Conditions — Input Low Voltage VIL — — 0.8 V — Input High Voltage VIH 2.0 — — V — Output Low Voltage VOL — — 0.4 V IOL = 24 mA Output High Voltage VOH 2.4 — — V IOH = 24 mA Supply Current IDD — 22 30 mA Min. Typ. Max. Units 15 — 145 15 — 170 Unloaded outputs at 100 MHz, VDD = 3.3V SWITCHING CHARACTERISTICS Parameter Input/Output Frequency Symbol t1 MHz Conditions 2.5V 3.3V Duty Cycle DC 45 50 55 % Measured at VDD/2, CL = 15 pF, fOUT = 100 MHz Rise Time tr — 1.2 1.5 ns Measured between 10% and 90% of VDD, CL = 15 pF Fall Time tf — 1.2 1.5 ns Measured between 90% and 10% of VDD, CL = 15 pF Output to Output Skew tSKEW — — 200 ps All outputs equally loaded, CL = 15 pF Delay, REF Rising Edge to CLKOUT Rising Edge tDELAY — 0 ±350 ps Measured at VDD/2 Device to Device Skew tDSK-DSK — 0 700 ps Measured at VDD/2 on the CLKOUT pins of devices Cycle to Cycle Jitter tCYC-CYC — — 60 ps Measured at 100 MHz PLL Lock Time tLOCK — — 1.0 ms Stable power supply, valid clock presented on REF pin Jitter; Absolutle Jitter tJABS — 20 50 ps Measured 10,000 cycles, low jitter input signal Jitter; 1-Sigma tJ1-S — 9 15 ps Measured 10,000 cycles, low jitter input signal DS20006345A-page 2  2020 Microchip Technology Inc. PL102-10 TEMPERATURE SPECIFICATIONS Parameters Sym. Min. Typ. Max. Units TA –40 — +85 °C Conditions Temperature Ranges Ambient Operating Temperature — Junction Operating Temperature TJ — — +125 °C — Storage Temperature Range TS –65 — +150 °C — Lead Temperature — — +260 — °C Soldering, 10s Switching Waveforms VDD/2 t1 Input t2 VDD/2 VDD/2 VDD/2 Output VDD/2 t DELAY FIGURE 1-1: FIGURE 1-4: Delay. Duty Cycle Timing. Input-to-Output Propagation VDD/2 Output VDD/2 Device1 CLKOUT VDD/2 Device2 CLKOUT VDD/2 t DSK-DSK Output FIGURE 1-5: t SKEW FIGURE 1-2: Output-to-Output Skew. 2.0V Output 2.0V 0.8V 0.8V tr FIGURE 1-3: Device-to-Device Skew. 3.3V 0V tf All Outputs Rise/Fall Time.  2020 Microchip Technology Inc. DS20006345A-page 3 PL102-10 2.0 PIN DESCRIPTION The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE Pin Number SOIC-8 Pin Number SOT23-6 Pin Name Pin Type 1 3 REFIN I Input reference frequency. Spread spectrum modulation on this signal will be passed to the output (up to 100 kHz SST modulation). 2 2 GND P Ground connection. 3 1 CLK1 O Buffered clock output. O Buffered clock output. If CLK2 is pulled high during startup, the device will enter test mode. 4 6 CLK2 Description 5 5 VDD P 2.5V or 3.3V power supply connection. 6, 7 — NC — Do not connect. 8 4 CLKOUT O Buffered clock output. Internal feedback on this pin. DS20006345A-page 4  2020 Microchip Technology Inc. PL102-10 3.0 OUTPUT-TO-OUTPUT SKEW The skew between CLKOUT and the CLK(1-2) outputs is not dynamically adjusted by the PLL. Because CLKOUT is one of the inputs to the PLL, zero phase difference is maintained from REF to CLKOUT. If all outputs are equally loaded, zero phase difference will be maintained from REF to all outputs. If applications requiring zero output-output skew, all the outputs must be equally loaded. If the CLK(1-2) outputs are less loaded than CLKOUT, CLK(1-2) outputs will lead it; if the CLK(1-2) is more loaded than CLKOUT, CLK(1-2) will lag the CLKOUT. Because the CLKOUT and the CLK(1-2) outputs are identical, they all start at the same time, but difference loads cause them to have different rise times and different times crossing the measurement thresholds. REF REF CLKOUT CLKOUT CLK(1-2) CLK(1-2) Zero Delay REF input and all outputs are equally loaded FIGURE 3-1: Zero Delay. Advanced REF input and CLK(1-2) outputs are equally loaded, with CLK(1-2) less loaded than CLKOUT. FIGURE 3-3: Advanced. REF CLKOUT CLK(1-2) Delayed REF input and CLK(1-2) outputs loaded equally, withCLK(1-2) more loaded then CLKOUT. FIGURE 3-2: Delayed.  2020 Microchip Technology Inc. DS20006345A-page 5 PL102-10 4.0 PACKAGING INFORMATION 4.1 Package Marking Information 8-Lead SOIC* XXXX-XX XX WWNNN Legend: XX...X Y YY WW NNN *e3 Example P102-10 SC 23093 6-Lead SOT23* Example XXX NNN C10 831 Product code Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( ) e3 can be found on the outer packaging for this package. ●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle mark). Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. Package may or may not include the corporate logo. Underbar (_) and/or Overbar (‾) symbol may not be to scale. DS20006345A-page 6  2020 Microchip Technology Inc. PL102-10 8-Lead SOIC Package Outline and Recommended Land Pattern  2020 Microchip Technology Inc. DS20006345A-page 7 PL102-10 DS20006345A-page 8  2020 Microchip Technology Inc. PL102-10  2020 Microchip Technology Inc. DS20006345A-page 9 PL102-10 6-Lead SOT23 Package Outline and Recommended Land Pattern Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging. DS20006345A-page 10  2020 Microchip Technology Inc. PL102-10 APPENDIX A: REVISION HISTORY Revision A (April 2020) • Converted Micrel document PL102-10 to Microchip data sheet template DS20006345A. • Minor text changes throughout.  2020 Microchip Technology Inc. DS20006345A-page 11 PL102-10 NOTES: DS20006345A-page 12  2020 Microchip Technology Inc. PL102-10 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. PART No. X X -X Device Package Temperature Range Media Type Device: PL102-10: Package: S T = = 8-Lead SOIC 6-Lead SOT23 Temperature Range: C = 0C to +70C (Commercial) Media Type: = R = R = Examples: a) PL102-10SC-R: Low Skew Output Buffer, 8-Lead SOIC, 0°C to +70°C Temperature Range, 2,500/Reel b) PL102-10TC: Low Skew Output Buffer, 6-Lead SOT23, 0°C to +70°C Temperature Range, 20/Bag c) PL102-10TC-R: Low Skew Output Buffer, 6-Lead SOT23, 0°C to +70°C Temperature Range, 3,000/Reel Low Skew Output Buffer 20/Bag (SOT23 Option Only) 3,000/Reel (SOT23 Option Only) 2,500/Reel (SO?? Option Only)  2020 Microchip Technology Inc. Note 1: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. DS20006345A-page 13 PL102-10 NOTES: DS20006345A-page 14  2020 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2020, Microchip Technology Incorporated, All Rights Reserved. For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.  2020 Microchip Technology Inc. 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