PL620-00DC

PL620-00 Low Phase Noise XO with multipliers (for HF Fund. and 3 r d O.T.) DIE CONFIGURATION FEATURES 100MHz to 200MHz Fundamental or 3 rd Overtone Crystal input. Output range: 100 – 200MHz (no multiplication), 200 – 400MHz (2x multiplier) or 400 – 700MHz (4x multiplier). Available outputs: PECL, LVDS, or CMOS (High Drive (30mA) or Standard Drive (10mA) output). Supports 3.3V-Power Supply. Available in die form. Thickness 10 mil. VDD VDD VDD VDD SEL0^ SEL1^ OUTSEL1^ 23 22 21 20 19 18 26 XOUT 27 SEL3^ 28 SEL2^ 29 OE CTRL 30 Die ID: A1010-10A C502 NC 3 4 5 6 X 7 8 GNDBUF 2 GND 1 NC (0,0) (1550,1475) 17 GNDBUF 16 CMOS 15 LVDSB 14 PECLB 13 12 VDDBUF VDDBUF 11 PECL 10 LVDS 9 GND Y 31 GND The PL620-00 is an XO IC specifically designed to work with high frequency fundamental and third overtone crystals. Its design was optimized to tolerate higher limits of interelectrode capacitance and bonding capacitance to improve yield. It achieves very low current into the crystal resulting in better overall stability. It is ideal for XO applications requiring LVDS or PECL output levels at high frequencies. 24 GND DESCRIPTION 25 GND    XIN OUTSEL0^  62 mil  65 mil GND  OE_SEL^ OUTPUT SELECTION AND ENABLE DIE SPECIFICATIONS Name Value Size Reverse side Pad dimensions Thickness 62 x 65 m il GND 80 m icron x 80 micron 10 m il OUTSEL1 (Pad #18) 0 OUTSEL0 (Pad #25) 0 0 1 Standard CMOS 1 0 LVDS 1 1 PECL (default) OE_SELECT (Pad #9) 0 BLOCK DIAGRAM SEL 1 (Default) OE Vi n X+ Oscillator Amplifier PLL (Phase Locked Loop) Q Q OE_CTRL (Pad #30) 0 1 (Default) 0 (Default) 1 Selected Output High Drive CMOS State Tri-state Output enabled Output enabled Tri-state Pad # 9: Bond to GND to set to “0”, bond to VDD to set to “1” Pad # 30: Logical states defined by PECL levels if OE_SELECT (pad # 9) is “1” Logical states defined by CMOS levels if OE_SELECT is “0” XPLL by-pass PL620-00 Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474-1000 • www.micrel.com Rev 5/10/07 Page 1 PL620-00 Low Phase Noise XO with multipliers (for HF Fund. and 3 r d O.T.) FREQUENCY SELECTION TABLE SEL3 (Pad #28) 1 SEL2 (Pad #29) 0 SEL1 (Pad #19) 1 SEL0 (Pad #20) 1 Fin x 4 1 1 1 0 Fin x 2 1 1 1 1 No multiplication (no PLL) Selected Multiplier All pads have internal pull-ups (default value is 1). Bond to GND to set to 0. ELECTRICAL SPECIFICATIONS 1. Absolute Maximum Ratings PARAMETERS SYMBOL Supply Voltage Input Voltage, dc Output Voltage, dc Storage Temperature Ambient Operating Temperature* Junction Temperature Lead Temperature (soldering, 10s) ESD Protection, Human Body Model MIN. VDD VI VO TS TA TJ -0.5 -0.5 -65 -40 MAX. UNITS 4.6 VDD +0.5 VDD +0.5 150 85 125 260 2 V V V C C C C kV Exposure of the device under conditions beyond the limits specified by Maximum Ratings for extended periods may cause permane nt damage to the device and affect product reliability. These conditions represent a stress rating only, and functional operations of the device at these or any other conditions above the operational limits noted in this specification is not implied. * Note: Operating Temperature is guaranteed by design for all parts (COMMERCIAL and INDUSTRIAL), but tested f or COMMERCIAL grade only. 2. Crystal Specifications PARAMETERS Crystal Resonator Frequency Crystal Loading Rating Interelectrode Capacitance Recommended ESR SYMBOL CONDITIONS Fundamental or 3 r d overtone* Die only F XIN C L ( xtal) C0 MIN. TYP. 100 UNITS 200 MHz 3 pF pF 30 25 30    3.0 F XIN