PL902150USY

PL902150USY Layout Configuration Block Diagram REFIN CLK0 LVCMOS CSEL = 1/CSEL = 0 70-140/56-112MHz Drive Level: Std (8mA) Programmable Jitter Filter 14-28 OE Logic Control CSEL Operating Voltage: 3.3V Ordering Information Ordering Part Number Marking Industrial Temperature Range Shipping Package PL902150USY TR K2150 -40°C to +85°C Tape and Reel SOT23-6L Devices are Green and RoHS compliant. Sample material may have only a partial top mark. Pin Configuration and Package Drawing SOT23-6L Symbol OE Min. Max. A 1.05 1.35 A1 0.05 0.15 A2 1.00 1.20 b 0.30 0.50 c 0.08 0.20 D 2.80 3.00 E 1.50 1.70 H 2.60 3.0 L 0.35 0.55 CLK0 GND CSEL REFIN VDD SOT23-6L (3mm x 3mm x 1.35mm) Dimension in MM e 0.95 BSC Pin Description Pin Number Pin Name Pin Type Output Type Pin Function 1 OE I LVCMOS 2 GND GND - Power supply ground 3 REF_IN I, (SE) LVCMOS Reference clock input 4 VDD PWR - 5 CSEL I LVCMOS Configuration select control input with pull-up 6 CLK0 O LVCMOS CLK0 output Output enable control input with pull-up Power supply 3.3V Please refer to page 10 of PL902xxx datasheet for usage of this device. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com October 02, 2014 2335 Revision 1.0 tcghelp@micrel.com or (408) 955-1690