RE46C180E16F

RE46C180 CMOS Programmable Ionization Smoke Detector ASIC with Interconnect, Timer Mode and Alarm Memory Features Description • • • • • • The RE46C180 is a next generation low power, CMOS ionization-type, smoke detector IC. With minimal external components, this circuit will provide all the required features for an ionization-type smoke detector. • • • • • • • • • • • • • • • • 6 – 12V Operation Low Quiescent Current Consumption Programmable Standby Sensitivity Programmable HUSH Sensitivity Programmable Hysteresis Programmable Chamber Voltage for Push-to-Test (PTT) and Chamber Test Programmable ±150 mV Low Battery Set Point Internal Ionization Chamber Test Internal Low Battery Test Internal Power-On Reset and Power-up Low Battery Test Alarm Memory Auto Alarm Locate Horn Synchronization IO Filter and Charge Dump Smart Interconnect Interconnect up to 40 Detectors ±5% All Internal Oscillator 9 Minute or 80 Second Timer for Sensitivity Control Temporal or Continuous Horn Pattern Guard Outputs for Ion Detector Input ±0.75 pA Detect Input Current 10-year End-of-Life Indication An on-chip oscillator strobes power to the smoke detection circuitry for 5 ms every 10 seconds to keep the standby current to a minimum. A check for a Low Battery condition is performed every 80s and an ionization chamber test is performed once every 320s when in Standby. The temporal horn pattern complies with the National Fire Protection Association NFPA 72® National Fire Alarm and Signaling Code® for emergency evacuation signals. An interconnect pin allows multiple detectors to be connected, such that when one unit alarms, all units will sound. A charge dump feature quickly discharges the interconnect line when exiting a Local Alarm condition. The interconnect input is also digitally filtered. An internal 9 minute or 80s timer can be used for a Reduced Sensitivity mode. An alarm memory feature allows the user to determine whether the unit has previously entered a Local Alarm condition. Utilizing low-power CMOS technology, the RE46C180 is designed for use in smoke detectors that comply with the Standard for Single and Multiple Station Smoke Alarms, UL217 and the Standard for Smoke Detectors for Fire Alarm Systems, UL268. Package Types RE46C180 PDIP, SOIC  2011-2019 Microchip Technology Inc. TEST 1 16 GUARD2 IO 2 15 DETECT GLED 3 14 GUARD1 CHAMBER 4 13 T3 RLED 5 12 T2 VDD 6 11 HS TESTOUT 7 10 HB FEED 8 9 VSS DS20002275B-page 1 DS20002275B-page 2 VSS (9) GUARD2 (16) DETECT (15) GUARD1 (14) Trimmable Low Batt Setting VDD (6) TEST (1) Trimmable Smoke Reference Trimmable Low Batt Reference Guard Amp - + - + - + Smoke Comp Low Batt Comp Programmable Trim BIAS, Power Reset and Trimmable Oscillator Logic and Timing Chamber Voltage Test and Program Mode Sel CHAMBER (4) T3 (13) T2 (12) TESTOUT (7) GLED (3) RLED (5) HB (10) HS (11) FEED (8) IO (2) RE46C180 Functional Block Diagram  2011-2019 Microchip Technology Inc. RE46C180 Typical Application TEST and HUSH To Other Units R5 100 10 µF Rled C3 + 1 µF C2 - 1 TEST GUARD2 16 2 IO DETECT 15 3 GLED GUARD1 14 Gled R1 390 9V Battery RE46C180 R2 390 4 CHAMBER T3 13 5 RLED T2 12 6 VDD HS 11 7 TESTOUT HB 10 8 FEED VSS 9 R4 220K R3 1.5M C1 .001 µF Note 1: R3, R4 and C1 are typical values, and may be adjusted to maximize sound pressure. 2: C2 should be located as close as possible to the device power pins. 3: Route the pin 8 PC board trace away from pin 4 to avoid coupling. 4: No internal reverse battery protection. External reverse battery protection circuitry required.  2011-2019 Microchip Technology Inc. DS20002275B-page 3 RE46C180 1.0 ELECTRICAL CHARACTERISTICS 1.1 Absolute Maximum Ratings† † Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. VDD.................................................................................12.5V Input Voltage Range Except FEED, IO .......... VIN = -.3V to VDD +.3V FEED Input Voltage Range ..................... VINFD =-10 to +22V IO Input Voltage Range................................. VIO1= -.3 to 15V Input Current except FEED ...................................IIN = 10 mA Operating Temperature ................................TA = -10 to +60°C Storage Temperature............................ TSTG = -55 to +125°C Maximum Junction Temperature ............................TJ = +150° DC ELECTRICAL CHARACTERISTICS DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C, VDD = 9V, VSS = 0V (Note 1) Symbol Test Pin Supply Voltage VDD 6 6 — 12 V Operating Supply Current IDD1 6 — 3.8 5.3 µA Operating, RLED off, GLED off IDD2 6 — — 6 µA Operating, VDD = 12V, RLED off, GLED off IDD3 6 — 9.6 13.9 µA Operating, RLED off, GLED off, Smoke check IDD4 6 — 21.4 30 µA Operating, RLED off, GLED off, Low Battery check VIH1 8 6 — — V VIH2 2 3 — — V Parameter Input Voltage High Input Voltage Low Input Leakage Low Note 1: 2: 3: 4: Min Typ Max Units VIH3 1 5.6 — — V VIH4 12 5.6 — — V VIL1 8 — — 2.8 V VIL2 Conditions No Local Alarm, IO as an input 2 — — 1 V VIL3 No Local Alarm, IO as an input 1 — — 3.4 V VIL4 12 — — 3.4 ILDET1 15 — — -0.75 pA VDD = 9V, DETECT = VSS, 0-40% RH, TA = +25°C ILDET2 15 — — -1.5 pA VDD = 9V, DETECT = VSS, 85% RH, TA = +25°C (Note 2) ILFD1 8 — — -50 µA FEED = -10V ILFD2 8 — — -100 nA FEED = VSS Production tested at room temperature with temperature guard banded limits. Sample test only. Not 100% production tested. Same limit range at each programmable step, see Table 4-1. DS20002275B-page 4  2011-2019 Microchip Technology Inc. RE46C180 DC ELECTRICAL CHARACTERISTICS (CONTINUED) DC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C, VDD = 9V, VSS = 0V (Note 1) Parameter Input Leakage High Symbol Test Pin Min Typ Max Units IHDET1 15 — — 0.75 pA VDD = 9V, DETECT = VDD, 0–40% RH, TA = +25°C IHDET2 15 — — 1.5 pA VDD = 9V, DETECT = VDD, 85% RH, TA = +25°C (Note 2) IHFD1 8 — — 50 µA FEED = 22V Conditions IHFD2 8 — — 100 nA FEED = VDD IIOL2 2 — — 150 µA No Alarm, VIO = 15V Output Off Leakage High IIOHZ 3, 5 — — 1 µA Outputs Off, VRLED = 9V, VGLED = 9V Input Pull Down Current IPD1 1 20 50 80 µA TEST = 9V IPD2 12 0.4 0.8 1.3 mA Output High Voltage VOH1 10,11 6.3 — — V IOH = -16 mA, VDD = 7.2V Output Low Voltage VOL1 10,11 — — 0.9 V IOL = 16 mA, VDD = 7.2V VOL3 3, 5 — — 1 V IOL = 10 mA, VDD = 7.2V IIOL1 2 25 — 60 µA No Alarm, VIO = VDD -2V IIOH1 2 -4 — -16 mA Alarm, VIO = 4V or VIO = 0V IIODMP 2 5 — — mA At conclusion of Local Alarm or PTT, VIO = 1V VLB 6 6.75 6.9 7.05 V LBTR[2:1] = 1 0 7.05 7.2 7.35 V LBTR[2:1] = 1 1 7.35 7.5 7.65 V LBTR[2:1] = 0 0 7.65 7.8 7.95 V LBTR[2:1] = 0 1 Output Current Low Battery Voltage Offset Voltage Common Mode Voltage VGOS1 14,15 -50 — 50 mV Guard amplifier VGOS2 15,16 -50 — 50 mV Guard amplifier VGOS3 15 -50 — 50 mV VCM1 14,15 2 — VDD–.5 V VCM2 15 0.5 — VDD–2 V Output Impedance ZOUT 14,16 — 10 — k Chamber Voltage in PTT/Chamber Test VCHAMBER 4 4.49 4.5 4.51 V VHYS 13 140 150 160 mV Hysteresis Note 1: 2: 3: 4: T2 = 9V Smoke comparator Guard amplifier (Note 3) Smoke comparator (Note 3) Guard amplifier outputs (Note 3) User programmable (2.1V to 6.75V) (Note 4) No Alarm to Alarm condition, user programmable (50 to 225 mV) (Note 4) Production tested at room temperature with temperature guard banded limits. Sample test only. Not 100% production tested. Same limit range at each programmable step, see Table 4-1.  2011-2019 Microchip Technology Inc. DS20002275B-page 5 RE46C180 AC ELECTRICAL CHARACTERISTICS AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C, VDD = 9V, VSS = 0V. Symbol Test Pin Min Typ Max Units Internal Oscillator Period TPOSC 7 593 625 657 µs Test mode (Note 1) Internal Clock Period TPCLK 9.5 10 10.5 ms Operating Parameter Conditions Time Base RLED Indicator On Time Period TON1 5 9.5 10 10.5 ms TPLED1 5 304 320 336 s Standby TPLED2 5 0.95 1 1.05 s Local alarm TPLED3 5 9.5 10 10.5 s HUSH mode, No Local Alarm TPLED4 3 38 40 42 s Alarm Memory Indication GLED period, No Alarm, no PTT TPLED5 3 237 250 263 ms Alarm Memory Indication GLED period upon PTT, AMLEDEn = 1 TOFLED1 3 0.95 1 1.05 s Alarm Memory Indication GLED off time between pulses TOFLED2 3 36 38 40 s Alarm Memory Indication GLED off time between pulse trains (3x) TAMTO 3 22.8 24 25.2 Hour 45.6 48 50.4 Hour AMTO[2:1] = 0 1 0 0 0 Hour AMTO[2:1] = 1 0, No Alarm Memory Indication — — — — AMTO[2:1] = 1 1, Alarm Memory Indication never times out, as long as Alarm Memory Latch is set Operating Operating GLED Indicator Period Off Time Alarm Memory Indication Timeout Period AMTO[2:1] = 0 0 Smoke Check Smoke Check Time TSCT — 4.7 5 5.3 ms Smoke Check Period TPER0 — 9.5 10 10.5 s Standby, No Alarm TPER1 — 0.95 1 1.05 s Standby, after one valid smoke sample and before entering Local Alarm, no PTT TPER2 — 237 250 263 ms TPER3 — 0.95 1 1.05 s Local Alarm (after three consecutive valid smoke samples) or Remote Alarm TPCT1 — 304 320 336 s Operating Chamber Test Period Note 1: 2: 3: 4: Standby, upon start of PTT and before entering Local Alarm TPOSC is 100% production tested. All other timing is verified by functional testing. See timing diagram for CO alarm horn pattern. See timing diagram for smoke alarm temporal and non-temporal horn pattern. See timing diagram for horn synchronization and Auto Alarm Locate (AAL). DS20002275B-page 6  2011-2019 Microchip Technology Inc. RE46C180 AC ELECTRICAL CHARACTERISTICS (CONTINUED) AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C, VDD = 9V, VSS = 0V. Parameter Symbol Test Pin Min Typ Max Units TPLB1 — 76 80 84 s Standby, No Alarm, No Low Battery TPLB2 — 304 320 336 s Standby, No Alarm, Low Battery THDLY1 10, 11 475 500 525 ms From Local Alarm to Horn Active, temporal horn pattern THDLY2 10, 11 380 400 420 ms From Local Alarm to Horn Active, continuous horn pattern THPER1 10, 11 38 40 42 s Low Battery, No Alarm THPER2 10, 11 38 40 42 s Chamber Failure, No Alarm THPER3 10, 11 237 250 263 ms THPER4 10, 11 5.5 5.8 6.1 s THON1 10, 11 9.5 10 10.5 ms 1. 2. 3. THON2 10, 11 475 500 525 ms Smoke Alarm, temporal horn pattern (Note 3) THON3 10, 11 332 350 368 ms Smoke Alarm, continuous horn pattern (Note 3) THON4 10, 11 95 100 105 ms CO Alarm, COEn = 1 THOF1 10, 11 475 500 525 ms Smoke Alarm, temporal horn pattern (Note 3) THOF2 10, 11 1.43 1.5 1.58 s Smoke Alarm, temporal horn pattern (Note 3) THOF3 10, 11 143 150 158 ms Smoke Alarm, continuous horn pattern (Note 3) THOF4 10, 11 37 39 41 s Chamber Fail horn off time between pulse trains (3x) THOF5 10, 11 465 490 515 ms Chamber Fail horn off time between pulses THOF6 10, 11 95 100 105 ms CO Alarm horn off time between pulses, COEn = 1 (Note 2) THOF7 10, 11 4.8 5.1 5.4 s CO alarm horn off time between pulse trains, COEn = 1 (Note 2) Conditions Low Battery Low Battery Check Period Horn Operation Horn Delay Horn Period Horn On Time Horn Off Time Note 1: 2: 3: 4: Alarm Memory Indication upon PTT, AMHCEn=1 CO Alarm horn period (Note 2) Low Battery, No Alarm Chamber Failure Alarm Memory Indication upon PTT, AMHCEn = 1 TPOSC is 100% production tested. All other timing is verified by functional testing. See timing diagram for CO alarm horn pattern. See timing diagram for smoke alarm temporal and non-temporal horn pattern. See timing diagram for horn synchronization and Auto Alarm Locate (AAL).  2011-2019 Microchip Technology Inc. DS20002275B-page 7 RE46C180 AC ELECTRICAL CHARACTERISTICS (CONTINUED) AC Electrical Characteristics: Unless otherwise indicated, all parameters apply at TA = -10°C to +60°C, VDD = 9V, VSS = 0V. Symbol Test Pin Min Typ Max Units TIODLY1 2 3.5 3.7 3.9 s From start of Local Alarm to IO Active. SyncEn = 1 2 3.1 3.3 3.5 s From start of Local Alarm to IO Active. SyncEn = 0 TIODLY2 2 769 810 851 ms No Local Alarm, from IO Active to Alarm, temporal horn pattern TIODLY3 2 299 315 331 ms No Local Alarm, from IO Active to alarm, continuous horn pattern IO Filter for Remote Smoke Alarm TIOFILT 2 — — 291 ms IO pulse-width to be filtered IO as input, no Local Alarm IO Pulse On Time for CO Alarm TIOPW1 2 37 — 290 ms No Local Alarm, 2 valid pulses required for CO IO Pulse Off Time for CO Alarm TIOTO1 2 — — 5.4 s TIODMP1 2 475 500 525 ms At conclusion of Local Alarm or PTT IO Pulse Period TPIO1 2 3.8 4 4.2 s Local Alarm, temporal horn pattern, SyncEn =1 (Note 4) IO Pulse On Time TONIO 2 3.41 3.59 3.77 s Local Alarm, temporal horn pattern, SyncEn =1 (Note 4) Horn Sync IO Dump TIODMP2 2 95 100 105 ms Local Alarm, SyncEn =1 (Note 4) Horn Sync IO Dump Delay TIODLY4 2 285 300 315 ms Local Alarm, SyncEn =1 (Note 4) IO Cycle Period TPIO2 2 15.2 16 16.8 s Local Alarm, temporal horn pattern, SyncEn =1, NoAAL = 0 (Note 4) IO Cycle Off Time TOFIO 2 4.19 4.41 4.63 s Local Alarm, temporal horn pattern, SyncEn = 1, No AAL = 0, IO off time between IO pulse trains (3x) (Note 4) TTPER — 8.5 9 9.5 min No Alarm, ShrtTO = 0 — 76 80 84 s No Alarm, ShrtTO = 1 — 346 364 382 Hours Parameter Conditions Interconnect IO Active Delay Remote Smoke Alarm Delay IO Dump IO = Low Horn Synchronization Auto Alarm Locate (AAL) HUSH Timer Operation HUSH Timer Period EOL End-of-Life Age Sample Note 1: 2: 3: 4: TEOL Standby, EOLEn = 1 TPOSC is 100% production tested. All other timing is verified by functional testing. See timing diagram for CO alarm horn pattern. See timing diagram for smoke alarm temporal and non-temporal horn pattern. See timing diagram for horn synchronization and Auto Alarm Locate (AAL). DS20002275B-page 8  2011-2019 Microchip Technology Inc. RE46C180 TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = 9V, VSS = 0V Parameters Sym Min Typ Max Units Conditions Temperature Ranges Operating Temperature Range TA -10 — +60 °C TSTG -55 — +125 °C Thermal Resistance, 16L-PDIP θJA — 70 — °C/W Thermal Resistance, 16L-SOIC (150 mil.) θJA — 86.1 — °C/W Storage Temperature Range Thermal Package Resistances  2011-2019 Microchip Technology Inc. DS20002275B-page 9 RE46C180 2.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 2-1. TABLE 2-1: PIN FUNCTION TABLE RE46C180 PDIP, SOIC Symbol 1 TEST This input is used to invoke Push-to-Test, Timer mode and Alarm Memory Indication. This input has an internal pull-down. 2 IO This bidirectional pin provides the capability to interconnect many detectors in a single system. This pin has an internal pull-down device and a charge dump device. 3 GLED 4 CHAMBER 5 RLED 6 VDD 7 TESTOUT 8 FEED Function Open drain NMOS output, used to drive a visible LED to provide visual indication of an Alarm Memory condition. Connect to the ionization smoke chamber. This pin provides power to the chamber Open drain NMOS output, used to drive a visible LED. This pin provides the load current for the Low Battery test, and is a visual indicator for alarm and HUSH mode. Connect to the positive supply voltage This output is an indicator of the internal IO dump signal. This pin is also used for Test modes. Usually connected to the feedback electrode through a current limiting resistor. If not used, this pin must be connected to VDD or VSS. 9 VSS Connect to the negative supply voltage. 10 HB This pin is connected to the metal electrode of a piezoelectric transducer. 11 HS This pin is a complementary output to HB, connected to the ceramic electrode of the piezoelectric transducer. 12 T2 Test input to invoke Test modes. This pin has an internal pull-down. 13 T3 Test output for Test modes. 14 GUARD1 Output of the guard amplifier. This allows for measurement of the DETECT input without loading the ionization chamber. 15 DETECT Connect to the CEV of the ionization smoke chamber. 16 GUARD2 Output of the guard amplifier. This allows for measurement of the DETECT input without loading the ionization chamber. DS20002275B-page 10  2011-2019 Microchip Technology Inc. RE46C180 3.0 DEVICE DESCRIPTIONS 3.1 Standby Internal Timing The internal oscillator is manufactured to ±5% tolerance. The oscillator period, TPOSC, is 625 µs. The internal clock period, TPCLK, of 10 ms is derived from the internal oscillator period. In Standby, once every 10s, the smoke detection circuitry is powered on for 5 ms. At the conclusion of the 5 ms, the status of the smoke comparator is latched. If a Smoke condition is present, the period to the next detection decreases and additional checks are made. In Standby, once every 80s, the Low Battery detection circuitry is powered on for 10 ms. At the conclusion of the 10 ms, the status of the Low Battery comparator is latched. RLED is enabled for 10 ms every 320s to provide a battery load in the loaded battery test. In Standby, once every 320s, the chamber test circuitry is powered on for 5 ms. At the conclusion of the 5 ms, the status of the chamber test is latched. See Section 3.3 “Supervisory Tests” for details. 3.2 Smoke Detection Circuitry The collection electrode voltage (CEV) of the ionization chamber is compared to the stored reference voltage at the conclusion of the 5 ms smoke sample period. After the first Smoke condition is detected, the smoke detection rate increases to once every 1s. Three consecutive smoke detections will cause the device to go into Local Alarm, and the horn circuit and IO will be active. RLED will turn on for 10 ms at 1 Hz rate. In Local Alarm, the smoke reference voltage (smoke sensitivity) is internally increased to provide alarm hysteresis. 3.3 Supervisory Tests Once every 80s, the status of the battery voltage is checked by comparing a fraction of the VDD voltage to an internal reference. In each period of 320s, the battery is checked four times. Of these four battery checks, three are unloaded and one is loaded with RLED enabled, which provides a battery load. Low battery status is latched at the end of the 10 ms RLED pulse. If the Low Battery test fails, the horn will chirp for 10 ms every 40s, and will continue to chirp until the next loaded Low Battery check is passed. The unloaded Low Battery checks are skipped in Low Battery condition. As a user programmable option, a Low Battery Hush mode can be selected. If a Low Battery condition exists, upon release of PTT, the unit will enter the Low Battery Hush mode, and the 10 ms horn chirp will be silenced for 8 hours. At the conclusion of the 8 hours the audible indication will resume, if the Low Battery condition still exists In addition, every 320s, a background chamber test is performed by internally lowering the CHAMBER voltage to a pre-determined level (user programmable) for 3.7s. This will emulate a Smoke condition. At the end of this 3.7s period, the smoke detection circuitry is powered on for 5 ms, and the Smoke condition is detected. If two consecutive chamber tests failed to detect a simulated Smoke condition, the chamber fail latch is set and the failure warning is generated. The horn will chirp three times every 40s. Each chirp is 10 ms long and three chirps are spaced at a 0.5s interval. The chamber fail warning chirp is separated from the Low Battery warning chirp by about 20s. There are three separate smoke sensitivity settings (all user programmable): The horn will continue this pattern until the chamber fail latch is reset. The chamber fail latch resets when any one of the followings is active: • Standby sensitivity • Local alarm (hysteresis) sensitivity • HUSH sensitivity • Two consecutive chamber tests pass • Local smoke alarm • PTT smoke alarm During PTT, the standby smoke sensitivity is used in smoke detection; but the CHAMBER voltage is user programmable. After the chamber test is completed, the CHAMBER voltage goes back to its normal standby level. The guard amplifier and outputs are always active, and will be within 50 mV of the DETECT input to reduce surface leakage. The guard outputs also allow for measurement of the DETECT input without loading the ionization chamber.  2011-2019 Microchip Technology Inc. Chamber test is performed approximately 140s after the loaded Low Battery test. In a Local Alarm, PTT Alarm or Remote Alarm condition, the chamber test is not performed, and the Low Battery chirping is prohibited. DS20002275B-page 11 RE46C180 3.4 Push-to-Test (PTT) PTT is an event when TEST is activated (VIH3). Release of PTT is an event when TEST is deactivated (VIL3). PTT has different functions for different circumstances. In Standby, PTT tests the unit. Upon start of PTT, the CHAMBER voltage is lowered to a pre-determined level (user programmable) to emulate a Smoke condition. The smoke detection rate increases to once every 250 ms. After three consecutive smoke detections, the unit will go into a Local Alarm condition. In alarm, the smoke detection rate decreases to once every 1s. Upon release of PTT, the unit is immediately reset out of Local Alarm, and the horn is silenced. The chamber voltage goes back to the normal standby level, and the detection rate goes back to once every 10s. When the unit exits a Local Alarm condition, the alarm memory latch is set. PTT will activate the alarm memory indication if the alarm memory latch is set and if the alarm memory indication function has been enabled. If the alarm memory indication function has not been enabled and the alarm memory latch is set, PTT will test the unit as described above. The release of PTT will always reset the alarm memory latch. In Standby and Low Battery conditions, PTT tests the unit and RLED will be constantly enabled. This allows the user to easily identify the low battery unit without waiting for 40s to hear a horn chirp. Upon release of PTT, RLED goes back to normal standby pulse rate. The Low Battery HUSH mode is then activated, if this function is enabled. 3.5 Interconnect Operation The bidirectional IO pin allows the interconnection of multiple detectors. In a Local Alarm condition, this pin is driven high 3.7s after a Local Alarm condition is sensed through a constant current source. Shorting this output to ground will not cause excessive current. The IO is ignored as input during a Local Alarm. The IO also has an NMOS discharge device that is active for 0.5s after the conclusion of any type of Local Alarm. This device helps to quickly discharge any capacitance associated with the interconnect line. If a remote active high signal is detected, the device goes into Remote Alarm and the horn will be active. RLED will be off, indicating a Remote Alarm condition. Internal protection circuitry allows the signaling unit to have higher supply voltage than the signaled unit, without excessive current draw. The interconnect input has a 291 ms maximum digital filter. This allows for interconnection to other types of alarms (CO, for example) that may have a pulsed interconnect signal. As a user-programmable option, the smart interconnect (smart IO) function can be selected. If the IO input is pulsed high twice with a nominal pulse on time DS20002275B-page 12 greater than 37 ms and within 5.4s, a CO Alarm condition is detected, and the CO temporal horn pattern will sound. The CO temporal pattern will sound at least two times, if a CO Alarm condition is detected. 3.6 Reduced Sensitivity Mode (HUSH Mode) Upon release of PTT, the unit may or may not go into a HUSH mode, depending on the user’s selection. If the hush-in-alarm-only option is selected, then only the release of PTT in a Local Alarm condition can initiate a HUSH mode. Upon release of PTT, the unit is immediately reset out of alarm, and the horn is silenced. If the hush-in-alarm-only option is not selected, then anytime a release of PTT occurs, the HUSH mode is initiated. In HUSH mode, the smoke sensitivity is lowered to a pre-determined level, which is user programmable. RLED is turned on for 10 ms every 10s. The HUSH mode period is user programmable – it can be either 9 minutes or 80s. After this period times out, the unit goes back to its standby sensitivity. If the unit is currently in a HUSH mode, then PTT will test the unit with the standby sensitivity. Upon release of PTT, a new HUSH mode will be initiated. As another user-programmable option, HUSH mode can be terminated earlier by a smart hush function. This function allows the HUSH mode to be canceled by either a high smoke alarm, or a remote smoke alarm. High smoke alarm is the local smoke alarm caused by a smoke level that exceeds the reduced sensitivity level. 3.7 Alarm Memory Alarm memory is a user-programmable option. If a unit has entered a Local Alarm, when exiting that Local Alarm, the alarm memory latch is set. The GLED can be used to visually identify any unit that had previously been in a Local Alarm condition. The GLED is pulsed on three times every 40s. Each GLED pulse is 10 ms long and 1s spaced from the next pulse. This alarm memory indication period can be 0, 24, 48 hours or no limit, depending on the user’s selection. The user will be able to identify a unit with an active alarm memory anytime by PTT. Upon start of PTT, the alarm memory indication will be activated. Depending on the user’s selection, it can be 4 Hz horn chirp, 4 Hz GLED pulse, or both. Upon release of PTT, the alarm memory latch will be reset. Anytime a release of PTT occurs, the alarm memory latch will be reset. The initial visual GLED indication is not displayed if a Low Battery condition exists.  2011-2019 Microchip Technology Inc. RE46C180 3.8 End-of-Life (EOL) Indicator 3.11 Auto Alarm Locate The EOL indicator is a user-programmable function. If the EOL indicator function is enabled, then approximately every 15 days of continuous operation, TEOL, the circuit will read an age count stored in EEPROM, and will increment this age. After 10 years of operation, an audible indication will be given to signal that the unit should be replaced. The EOL indicator is the same as the chamber test failure warning. Auto Alarm Locate (AAL) is also a user-programmable function. To use AAL, the horn synchronization has to be selected first. The purpose of AAL is to let users quickly find the local alarm units just by listening. The local alarm units will sound the temporal pattern without interruption. The remote alarm units will sound the pattern with interruption. Every four temporal patterns (or 16s), the remote units are kept silenced for one pattern (or 4s). 3.9 The originating unit conducts the IO cycling. Every four temporal patterns the IO is driven low for one temporal pattern. In the remaining three temporal patterns, the IO is still pulsing to keep the horn synchronized. Tone Pattern The smoke alarm tone pattern can be either a temporal pattern, or a continuous pattern, depending on the user’s selection. The temporal horn pattern supports the NFPA 72® National Fire Alarm and Signaling Code® for emergency evacuation signals. The continuous pattern is a 70% duty cycle continuous pattern. The RLED of the origination unit and other local smoke units will be turned on 10 ms every 1s. The RLED of the remote smoke units will be off. If a CO alarm is detected through the IO, the unit will sound the CO tone pattern. The CO tone pattern consists of 4 horn beeps in every 5.8s. Each horn beep is 100ms long and separated by 100ms. 3.10 Horn Synchronization The horn synchronization function is programmable by the user. In an interconnected system, if one unit goes into Local Alarm, other units will also go into Remote Alarm. The IO line is driven high by the origination local smoke unit, and stays high during the alarm. If the Horn Synchronization function is enabled, at the end of every temporal horn pattern and when the horn is off, the origination unit will drive IO low, then high again. This periodic IO pulsing high and low will cause the remote smoke units to go into and out of the Remote Alarm repeatedly. Each time a unit goes into a Remote Alarm, its timing is reset. The horn sound of all remote smoke units will be synchronized with the horn sound of the origination unit. A protection circuit ensures that the unit that goes first into a Local Alarm will be the master unit that conducts the horn synchronization. The units that go later into Local Alarm will not drive the IO line. This prevents bus contention problem. This function works with the temporal tone pattern only.  2011-2019 Microchip Technology Inc. DS20002275B-page 13 RE46C180 NOTES: DS20002275B-page 14  2011-2019 Microchip Technology Inc. RE46C180 4.0 USER PROGRAMMING MODES TABLE 4-2: Tables 4-1 to 4-6 show the parameters for user smoke calibration. PARAMETRIC PROGRAMMING Parametric Programming Range Resolution TABLE 4-1: STANDBY SENSITIVITY (VSTD) PROGRAMMING CONFIGURATION AT VDD = 9V VSTD Register STTR [5:1] Configuration Values STTR5 STTR4 STTR3 STTR2 STTR1 VSTD 0 0 0 0 0 4.5V 0 0 0 0 1 4.6V 0 0 0 1 0 4.7V 0 0 0 1 1 4.8V Standby Smoke Sensitivity (VSTD) 2.9  6.0V (Note 1) 100 mV (Note 1) Hysteresis (VHYS) +50  +225 mV (Note 2) 25 mV (Note 2) 0 0 1 0 0 4.9V 0 0 1 0 1 5.0V HUSH Smoke Sensitivity (VHSH) -1600 mV-100 mV (Note 3) 100 mV (Note 3) 0 0 1 1 0 5.1V 0 0 1 1 1 5.2V 2.10  6.75V (Note 4) 150 mV (Note 4) 0 1 0 0 0 5.3V 0 1 0 0 1 5.4V 0 1 0 1 0 5.5V 0 1 0 1 1 5.6V 0 1 1 0 0 5.7V 0 1 1 0 1 5.8V 0 1 1 1 0 5.9V 0 1 1 1 1 6.0V 1 0 0 0 0 2.9V 1 0 0 0 1 3.0V 1 0 0 1 0 3.1V 1 0 0 1 1 3.2V 1 0 1 0 0 3.3V 1 0 1 0 1 3.4V 1 0 1 1 0 3.5V 1 0 1 1 1 3.6V 1 1 0 0 0 3.7V 1 1 0 0 1 3.8V 1 1 0 1 0 3.9V 1 1 0 1 1 4.0V 1 1 1 0 0 4.1V 1 1 1 0 1 4.2V 1 1 1 1 0 4.3V 1 1 1 1 1 4.4V CHAMBER Voltage at PTT/Chamber Test (VCHAMBER) Note 1: 2: 3: 4: VSTD listed is based on VDD = 9V. The actual range is (29/90)VDD  (60/90)VDD, resolution is VDD/90. VHYS is a positive offset from VSTD. The listed value is based on VDD = 9V. The actual range is +(0.5/90)VDD  +(2.25/ 90)VDD, resolution is (0.25/90)VDD. VHSH is a negative offset from VSTD. The listed value is based on VDD = 9V. The actual range is –(16/90)VDD  –(1/90)VDD, resolution is VDD/90 VCHAMBER listed value is based on VDD = 9V. Actual range is (21/90)VDD  (67.5/90)VDD, resolution is (1.5/90)VDD.  2011-2019 Microchip Technology Inc. DS20002275B-page 15 RE46C180 TABLE 4-3: HYSTERESIS (VHYS) PROGRAMMING CONFIGURATION AT VDD = 9V VHYS Register HYTR[3:1] Configuration TABLE 4-5: HYTR3 HYTR2 HYTR1 VHYS 0 0 0 150 mV PTTR3 PTTR2 PTTR1 Values PTTR4 VCHAMBER Register PTTR[5:1] Configuration PTTR5 Values CHAMBER VOLTAGE (VCHAMBER) PROGRAMMING CONFIGURATION AT VDD = 9V VCHAMBER 0 0 1 175 mV 0 0 0 0 0 4.50V 0 1 0 200 mV 0 0 0 0 1 4.65V 0 1 1 225 mV 0 0 0 1 0 4.80V 1 0 0 50 mV 0 0 0 1 1 4.95V 1 0 1 75 mV 0 0 1 0 0 5.10V 1 1 0 100 mV 0 0 1 0 1 5.25V 1 1 1 125 mV 0 0 1 1 0 5.40V 0 0 1 1 1 5.55V 0 1 0 0 0 5.70V 0 1 0 0 1 5.85V 0 1 0 1 0 6.00V 0 1 0 1 1 6.15V 0 1 1 0 0 6.30V 0 1 1 0 1 6.45V 0 1 1 1 0 6.60V 0 1 1 1 1 6.75V TABLE 4-4: HUSH SENSITIVITY (VHSH) PROGRAMMING CONFIGURATION AT VDD = 9V TMTR3 TMTR2 TMTR1 Values TMTR4 VHSH Register TMTR[4:1] Configuration VHSH 0 0 0 0 VSTD – 800 mV 1 0 0 0 0 2.10V 0 0 0 1 VSTD – 700 mV 1 0 0 0 1 2.25V 0 0 1 0 VSTD – 600 mV 1 0 0 1 0 2.40V 0 0 1 1 VSTD – 500 mV 1 0 0 1 1 2.55V 0 1 0 0 VSTD – 400 mV 1 0 1 0 0 2.70V 0 1 0 1 2.85V 0 1 0 1 VSTD – 300 mV 1 0 1 1 0 VSTD – 200 mV 1 0 1 1 0 3.00V 0 1 1 1 VSTD – 100 mV 1 0 1 1 1 3.15V 1 0 0 0 VSTD – 1600 mV 1 1 0 0 0 3.30V 1 0 0 1 VSTD – 1500 mV 1 1 0 0 1 3.45V 1 0 1 0 VSTD – 1400 mV 1 1 0 1 0 3.60V 1 0 1 1 3.75V 1 0 1 1 VSTD – 1300 mV 1 1 1 0 0 VSTD – 1200 mV 1 1 1 0 0 3.90V 1 1 0 1 VSTD – 1100 mV 1 1 1 0 1 4.05V 1 1 1 0 VSTD – 1000 mV 1 1 1 1 0 4.20V 1 1 1 1 VSTD – 900 mV 1 1 1 1 1 4.35V DS20002275B-page 16  2011-2019 Microchip Technology Inc. RE46C180 TABLE 4-6: Features Options Low Battery Detection Selection 6.9V 7.2V 7.5V 7.8V 10 Year End-of-Life Indicator Enable/Disable Smart IO with CO Alarm Sensing Enable/Disable Auto Alarm Locate Enable/Disable Horn Synchronization Enable/Disable Low Battery Hush Enable/Disable Alarm Memory Indicator at PTT: Horn Chirping Enable/Disable Alarm Memory Indicator at PTT: GLED Flashing Enable/Disable Alarm Memory Indicator at Standby Time Out Period 0/24/48 hr or no limit Alarm Memory Sixteen separate programming and Test modes are available for user customization. The T2 input is used to enter these modes and step through them. To enter these modes, after power-up, T2 must be driven to VDD and held at that level. To step through the modes, the TEST input must first be driven to VDD. T2 is then clocked. TEST has to be high when clocking T2. Anytime T2 and TEST are both driven to low, the unit will come out of these modes and go back to the normal operation mode. FEED and IO are re-configured to become Test mode inputs. A T2 clock occurs when it switches from VSS to VDD. The Test mode functions are outlined in the Table 4-7. 9 minutes or 80s Smart HUSH Enable/Disable HUSH In Alarm Only Enable/Disable HUSH Enable/Disable Tone Select Temporal or Continuous Mode Calibration and Programming Procedures Enable/Disable HUSH Time Out Period TABLE 4-7: 4.1 FEATURE PROGRAMMING TEST MODE FUNCTIONS Descriptions M0 Normal Operation Note 1 T2 Clock TEST T2 FEED IO T3 TESTOUT 0 PTT/HUSH 0 FEED IO Not Used IO Dump Note 2 TM0 Speedup Mode 1 PTT/HUSH VDD CLK IO Not Used IO Dump Note 2 TM1 Load Timer for Spill 2 EOL Timer Clock VDD HUSH/LB HUSH Timer Clock Alarm Mem Timer Clock Not Used Not Used TM2 User Feature Programming 3 ProgData VDD ProgClk ProgEn Not Used Not Used TM3 Horn Test/LED On; IO High/Low 4 HornEnB Note 3 VDD IOHi En IO Dump EnB HB/HS En Note 4 LEDEn Not Used Not Used TM4 Standby Sen Set 5 SmkCompEnB T3EnB VDD CalClk ReadReg VSEN SmkCompOut Note 5 TM5 Hyst Sen Set 6 SmkCompEnB T3EnB VDD CalClk ReadReg VSEN SmkCompOut Note 5 Note 1: 2: 3: 4: 5: 6: After power-up, the unit is in M0, the normal operation mode. When in M0, if T2 is driven to VDD, the unit will enter TM0. In M0 and TM0, the digital output TESTOUT is driven by the internal IO dump signal. In TM3, if TEST = VSS, the horn is turned on. IO is in weak pull-down; If TEST = VDD, the horn is off. FEED controls IO and HB/HS. Valid when TEST = VDD; SmkCompOut – digital comparator output (high if DETECT < VSEN; low if DETECT > VSEN). LBCompOut – digital comparator output (high if VDD < LB trip point; low if VDD > LB trip point).  2011-2019 Microchip Technology Inc. DS20002275B-page 17 RE46C180 TABLE 4-7: Mode TEST MODE FUNCTIONS (CONTINUED) Descriptions T2 Clock TEST T2 FEED IO T3 TESTOUT TM6 HUSH Sen Set 7 SmkCompEnB T3EnB VDD CalClk ReadReg VSEN SmkCompOut Note 5 TM7 PTT/Chamber Test Set 8 SmkCompEnB T3EnB VDD CalClk ReadReg VSEN SmkCompOut Note 5 Not Used VDD Not Used ProgEn Not Used Not Used ProgData VDD ProgClk ProgEn Not Used Not Used TM8 Program Calibration 9 TM9 Not Used 10 TM10 Serial Read/Write Calibration 11 TM11 Not Used 12 TM12 Standby Sen Check 13 SmkCompEnB T3EnB VDD Not Used Not Used VSEN SmkCompOut Note 5 TM13 Hyst Sen Check 14 SmkCompEnB T3EnB VDD Not Used Not Used VSEN SmkCompOut Note 5 TM14 HUSH Sen Check 15 SmkCompEnB T3EnB VDD Not Used Not Used VSEN SmkCompOut Note 5 TM15 PTT/Chamber Test CHAMBER Voltage Check 16 SmkCompEnB T3EnB VDD Not Used Not Used VSEN SmkCompOut Note 5 TM16 Not Used 17 TM17 LB Test 18 Not Used VDD Not Used LB Test En RLED En Not Used LBCompOut Note 6 TM18 Serial Read/Write Feature and Calibration 19 ProgData VDD ProgClk ProgEn Not Used Serial Out TM19 User EE Lock Bit 20 LockSetEn VDD Not used ProgEn Not Used Lock Out Note 1: 2: 3: 4: 5: 6: After power-up, the unit is in M0, the normal operation mode. When in M0, if T2 is driven to VDD, the unit will enter TM0. In M0 and TM0, the digital output TESTOUT is driven by the internal IO dump signal. In TM3, if TEST = VSS, the horn is turned on. IO is in weak pull-down; If TEST = VDD, the horn is off. FEED controls IO and HB/HS. Valid when TEST = VDD; SmkCompOut – digital comparator output (high if DETECT < VSEN; low if DETECT > VSEN). LBCompOut – digital comparator output (high if VDD < LB trip point; low if VDD > LB trip point). DS20002275B-page 18  2011-2019 Microchip Technology Inc. RE46C180 + V1 9V Battery- R1 1k R2 1k V2 FIGURE 4-1: 4.2 RE 46C180 GUARD2 16 1 TEST V3 2 IO DETECT 15 3 GLED GUARD1 14 4 CHAMBER T3 13 5 RLED T2 12 6 VDD HS 11 7 TESTOUT HB 10 8 FEED VSS 9 V4 V5 Smoke Calibration In all calibration modes the VSEN voltage, which represents the smoke sensitivity level, can be accessed at T3 output. The SmkCompOut output voltage is the result of the comparison of DETECT and VSEN, and can be accessed at TESTOUT output. The FEED input can be clocked to cycle through the available smoke sensitivity levels. Once the desired smoke sensitivity level is reached, the IO input is pulsed low to high to store the result. The detailed procedure is described in the following steps: Power up with the bias condition shown in Figure 4-1. At power-up: TEST = IO = FEED = T2 = VSS, DETECT = VDD. Now in mode M0. 2. 3. V6 Nominal Application Circuit for Programming. 4. A separate calibration mode is entered for each measurement mode (Normal, Hysteresis, HUSH and PTT/ Chamber Test) so that independent limits can be set for each. 1. Monitor TESTOUT, T3 and CHAMBER 5. Apply four clock pulses to the T2 input (VDD to VSS and back to VDD) to enter in TM4 mode. This initiates the Calibration mode for the normal sensitivity setting. Drive TEST from VDD to VSS to turn on the smoke comparator and enable the T3 switch. The standby smoke sensitivity VSEN will appear at T3. The smoke comparator output will appear at TESTOUT. Clock FEED to increase or decrease the VSEN levels as needed. The IO input is pulsed low-to-high to save the result. Drive TEST from VSS to VDD and hold at VDD. Apply another clock pulse to the T2 input, to enter in TM5 mode. This initiates the Calibration mode for the hysteresis setting. Drive TEST from VDD to VSS to turn on the smoke comparator and enable the T3 switch. The local alarm smoke sensitivity VSEN will appear at T3. The smoke comparator output will appear at TESTOUT. Clock FEED to increase or decrease the VSEN levels as needed. The IO input is pulsed low-to-high to save the result. Drive T2 input from VSS to VDD and hold at VDD to enter TM0. Drive TEST from VSS to VDD and hold at VDD.  2011-2019 Microchip Technology Inc. DS20002275B-page 19 RE46C180 6. 7. 8. Drive TEST from VSS to VDD and hold at VDD. Apply another clock pulse to the T2 input, to enter in TM6 mode. This initiates the calibration mode for the HUSH sensitivity setting. Drive TEST from VDD to VSS to turn on the smoke comparator and enable the T3 switch. The HUSH smoke sensitivity VSEN will appear at T3. The smoke comparator output will appear at TESTOUT. Clock FEED to increase or decrease the VSEN levels as needed. The IO input is pulsed low-to-high to save the result Drive TEST from VSS to VDD and hold at VDD. Apply another clock pulse to the T2 input to enter in TM7 mode. This initiates the calibration mode for the CHAMBER voltage at PTT/Chamber Test. Drive TEST from VDD to VSS to turn on the smoke comparator and enable the T3 switch. The standby smoke sensitivity VSEN will appear at T3. The smoke comparator output will appear at TESTOUT. Clock FEED to increase or decrease the CHAMBER voltages as needed. The IO input is pulsed low-to-high to save the result. After sensitivity settings and CHAMBER voltage calibrations have been made, pulse IO to store all results into memory. Before this step, no settings are stored into memory. DS20002275B-page 20  2011-2019 Microchip Technology Inc. FIGURE 4-2:  2011-2019 Microchip Technology Inc. TM1 MODE TM0 Undefined CHAMBER (Analog Voltage) M0 Min TSETUP1 = 10 µs Min THOLD1 = 10 µs Undefined VSS VDD VSS VDD VSS VDD VSS VDD T3 (Analog Voltage) IO FEED T2 TEST TM2 TM3 Min PW1= 10 µs TM4 VSEN at Standby Undefined TM5 VSEN at Alarm Min T1 = 20 µs Min THOLD1 = 10 µs Min TSETUP1 = 10 µs Min PW2 = 10 ms Min PW1 = 10 µs Min TSETUP2 = 100 µs Undefined TM6 VSEN at HUSH TM7 Chamber Voltage at PTT/Chamber Test UndefinedVSEN at Standby TM8 Undefined Undefined RE46C180 Timing Diagram for Smoke Calibration (Mode TM4 ~ TM8). DS20002275B-page 21 RE46C180 4.3 Serial Read/Write Calibration As an alternative to the steps in Section 4.2, Smoke Calibration, the sensitivity settings can be entered directly from a Serial Read/Write Calibration mode (if the system has been well characterized). To enter this mode, follow these steps: 1. Power up with the bias condition shown in Figure 4-1 to enter M0. At power-up: TEST = IO = FEED = T2 = VSS, DETECT = VDD, 2. 3. 4. 5. Drive T2 input from VSS to VDD and hold at VDD to enter TM0. Drive TEST from VSS to VDD and hold at VDD. Apply 10 clock pulses to the T2 input (VDD to VSS and back to VDD) to enter in TM10 mode. This enables the Serial Read/Write Calibration mode. TEST now acts as a data input (High = VDD, Low = VSS). FEED acts as the clock input (High = VDD, Low = VSS). Clock in the sensitivity settings. The data sequence should be as follows: 6. 5 bit Standby Sensitivity (LSB first) 3 bit Hysteresis (LSB first) 4 bit HUSH Sensitivity (LSB first) 5 bit CHAMBER voltage in PTT/Chamber Test (LSB first) After all 17 bits have been entered, pulse IO to store into the EEPROM memory. DS20002275B-page 22  2011-2019 Microchip Technology Inc. RE46C180 REGISTER 4-1: CALIBRATION CONFIGURATION REGISTER W-x PTTR5 bit 17 W-x W-x W-x W-x W-x W-x W-x W-x PTTR4 PTTR3 PTTR2 PTTR1 TMTR4 TMTR3 TMTR2 TMTR1 bit 16 bit 8 W-x W-x W-x W-x W-x W-x W-x W-x HYTR3 HYTR2 HYTR1 STTR5 STTR4 STTR3 STTR2 STTR1 bit 8 bit 1 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared bit 17 x = Bit is unknown PTTR5: MSB (See Table 4-5) bit 16 PTTR4: 4SB bit 15 PTTR3: 3SB bit 14 PTTR2: 2SB bit 13 PTTR1: LSB bit 12 TMTR4: MSB (See Table 4-4) bit 11 TMTR3: 3SB bit 10 TMTR2: 2SB bit 9 TMTR1: LSB bit 8 HYTR3: MSB (See Table 4-3) bit 7 HYTR2: 2SB bit 6 HYTR1: LSB bit 5 STTR5: MSB (See Table 4-2) bit 4 STTR4: 4SB bit 3 STTR3: 3SB bit 2 STTR2: 2SB bit 1 STTR1: LSB  2011-2019 Microchip Technology Inc. DS20002275B-page 23 FIGURE 4-3: DS20002275B-page 24 MODE IO FEED T2 TEST Min THOLD1 = 10 µs TM0 TM1 Min TSETUP1 = 10 µs M0 VSS VDD VSS VDD VSS VSS VDD VDD TM2 TM3 Min PW1 = 10 µs TM4 TM5 TM6 Min T1 = 20 µs TM7 TM8 TM9 TM10 D2 Min TSETUP1 = 10 µs D1 D3 D5 Min THOLD1 = 10 µs D4 D6 D7 D9 Min PW1 = 10 µs D8 D10 D12 Min T3 = 30 µs D11 D17 TM10 Min PW2 = 10 ms RE46C180 Timing Diagram for Mode TM10.  2011-2019 Microchip Technology Inc. RE46C180 4.4 User Feature Selections User feature selections can be clocked in serially using TEST as data input, and FEED, as a clock input, then stored in the internal EEPROM. The detailed steps are as follows: 1. Power up with the bias condition shown in Figure 4-1. At power-up: 5. 6. 7. TEST = IO = FEED = T2 = VSS, DETECT = VDD. Now in mode M0. 2. 3. 4. Drive T2 input from VSS to VDD and hold at VDD to enter TM0. REGISTER 4-2: Drive TEST from VSS to VDD and hold at VDD. Apply two clock pulses to the T2 input (VDD to VSS and then back to VDD) to enter in TM2. Using TEST as data and FEED as clock, shift in values of 18 bits as selected from Register 4-2. After shifting in data, pull IO input to VDD, then VSS (minimum pulse-width of 10 ms) to store shift register contents in the memory. If any changes are required, power down the part and return to Step 1. All bit values must be reentered. USER FEATURE CONFIGURATION REGISTER U W-x — LBTR2 bit 18 bit 17 W-x W-x W-x W-x W-x W-x W-x W-x LBTR1 EOLEn COEn NoAAL SyncEn LBHshEn AMHCEn AMLEDEn bit 16 bit 8 W-x W-x W-x W-x W-x W-x W-x W-x AMTO2 AMTO1 AMEn ShrTO SmrtH HIAO HushEnB TSEL bit 8 bit 1 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared bit 18 Unimplemented: Read as ‘x’ bit 17 LBTR2: MSB bit 16 LBTR1: LSB 00 =7.5V 01 =7.8V 10 =6.9V 11 =7.2V bit 15 EOLEn: End-of-Life Indicator Enable Bit 1 = Enable 0 = Disable bit 14 COEn: CO Alarm Function (Smart IO) Enable Bit 1 = Enable 0 = Disable bit 13 NoAAL: Auto Alarm Locate Disable Bit 1 = AAL is Disabled 0 = AAL is Enabled bit 12 SyncEn: Horn Synchronization Enable Bit 1 = Enable 0 = Disable  2011-2019 Microchip Technology Inc. x = Bit is unknown DS20002275B-page 25 RE46C180 REGISTER 4-2: USER FEATURE CONFIGURATION REGISTER (CONTINUED) bit 11 LBHshEn: Low Battery Hush Enable Bit 1 = Enable 0 = Disable bit 10 AMHCEn: Alarm Memory PTT Indicator Horn Chirp Enable Bit 1 = Enable 0 = Disable bit 9 AMLEDEn: Alarm Memory PTT Indicator LED Flashing Enable Bit 1 = Enable 0 = Disable bit 8 AMTO2: MSB bit 7 AMTO1: LSB 00 =24 Hours Timeout 01 =48 Hours Timeout 10 =0 Hour Timeout 11 =Never Timeout bit 6 AMEn: Alarm Memory Enable Bit 1 = Enable 0 = Disable bit 5 ShrTO: HUSH Timer Time Out Select Bit 1 = 80 seconds 0 = 9 minutes bit 4 SmrtH: Smart HUSH Bit 1 = Enable (Hush is canceled by either high smoke, or remote smoke) 0 = Disable (Hush is never canceled until timeout) bit 3 HIAO: HUSH-in-Alarm -Only Bit 1 = Enable (Hush is activated upon release of PTT during local smoke only) 0 = Disable (Hush is activated upon release of PTT at anytime) bit 2 HushEnB: HUSH Enable Bit 1 = Enable (Hush is disabled) 0 = Disable (Hush is enabled) bit 1 TSEL: Tone Select Bit 1 = Continuous Tone Pattern 0 = Temporal Tone Pattern The minimum pulse-width for FEED is 10 µs, while the minimum pulse-width for TEST is 100 µs. Alarm Memory PTT Indicator Horn Chirp Enable = Yes For example, for the following options, the sequence would be: Alarm Memory PTT Indicator LED Flashing Enable = No Alarm memory LED indicator time out = 24 hours Data – X Bit – 18 17 16 15 14 13 12 11 10 Alarm Memory Enable = Yes Data – 0 0 0 1 0 0 1 0 0 HUSH time out = 9 minutes Bit – 9 8 7 6 5 4 3 2 1 Smart HUSH = No 1 0 1 1 1 1 0 1 Low battery Trip Point = 6.9V Hush in alarm only = Yes End of Life Enable = Yes Hush Enable = Yes CO Enable = Yes Tone Select = Temporal Auto Alarm Locate Disable = Yes Horn Synchronization Enable = Yes Low Battery Hush Enable = No DS20002275B-page 26  2011-2019 Microchip Technology Inc. FIGURE 4-4:  2011-2019 Microchip Technology Inc. MODE IO FEED T2 TEST M0 VSS VDD VSS TM0 TM1 D1 TM2 D2 Min TSETUP1 = 10 µs Min TSETUP1 = 10 µs Min PW1 = 10 µs VDD VSS VSS VDD VDD Min THOLD1 = 10 µs D3 D5 Min THOLD1 = 10 µs D4 D6 D7 D9 Min PW1 = 10 µs D8 D10 D12 Min T1 = 30 µs D11 D18 TM2 Min PW2 = 10 ms RE46C180 Timing Diagram for Mode TM2. DS20002275B-page 27 RE46C180 4.5 Sensitivity Verification After all sensitivity levels and CHAMBER voltage at PTT/Chamber Test have been entered and stored into the memory, additional Test modes are available to verify if the sensitivities are functioning as expected. Table 4-8 describes several verification tests. TABLE 4-8: SENSITIVITY VERIFICATION DESCRIPTION Sensitivity Test Description Standby Sensitivity Clock T2 to Mode TM12 (12 clocks). With appropriate smoke level in the chamber, pull TEST to VSS and hold for at least 1 ms. The TESTOUT output will indicate the detection status (High = smoke detected). Hysteresis Clock T2 to Mode TM13 (13 clocks). Pulse TEST and monitor TESTOUT. HUSH Sensitivity Clock T2 to Mode TM14 (14 clocks). Pulse TEST and monitor TESTOUT. CHAMBER voltage at Clock T2 to Mode TM15 (15 clocks). Pulse TEST and monitor TESTOUT. PTT/Chamber Test DS20002275B-page 28  2011-2019 Microchip Technology Inc. FIGURE 4-5:  2011-2019 Microchip Technology Inc. TM1 TM0 MODE M0 Min TSETUP1 = 10 µs Min THOLD1 = 10 µs Undefined VSS VDD VSS VDD TESTOUT T2 TEST TM2 TM3 Min PW1= 10 µs TM12 SmokeCmpOut TM13 Undefine SmokeCmpOut Min THOLD1 = 10 µs Min TSETUP1 = 10 µs TM14 Undefine SmokeCmpOut Min T2 = 100 µs TM15 Undefine SmokeCmpOut RE46C180 Timing Diagram for Sensitivity Verification in Mode TM12 ~ TM15. DS20002275B-page 29 RE46C180 4.6 Serial Read/Write Calibration and User Features 4. To enter this mode, follow these steps: Apply 18 clock pulses to the T2 input (VDD to VSS and then back to VDD) to enter in TM18 mode. This enables the Serial Read/Write Calibration and User Features modes. TEST now acts as a data input (High = VDD, Low = VSS). FEED acts as the clock input (High = VDD, Low = VSS). Clock in the sensitivity settings. The data sequence should be as follows: 1. D1 ~ D18 User Features (18 bits, LSB first) D19 ~ D35 Calibration (17 bits, LSB First) As an alternative to the steps in Section 4.2, Smoke Calibration and Section 4.4, User Feature Selections, the sensitivity settings and user feature selections can be entered directly from a Serial Read/Write Calibration mode. 5. Power up with the bias condition shown in Figure 4-1 to enter M0. At power-up: TEST = IO = FEED = T2 = VSS, 6. DETECT = VDD. 2. 3. After all 35 bits have been entered, pulse IO to store into the EEPROM memory. Drive T2 input from VSS to VDD and hold at VDD to enter TM0. Drive TEST from VSS to VDD and hold at VDD. REGISTER 4-3: SERIAL READ/WRITE REGISTER W-x W-x W-x PTTR5 PTTR4 PTTR3 bit 35 bit 33 W-x W-x W-x W-x W-x W-x W-x W-x PTTR2 PTTR1 TMTR4 TMTR3 TMTR2 TMTR1 HYTR3 HYTR2 bit 32 bit 25 W-x W-x W-x W-x W-x W-x U W-x HYTR1 STTR5 STTR4 STTR3 STTR2 STTR1 — LBTR2 bit 24 bit 17 W-x W-x W-x W-x W-x W-x W-x W-x LBTR1 EOLEn COEn NoAAL SyncEn LBHshEn AMHCEn AMLEDEn bit 16 bit 8 W-x W-x W-x W-x W-x W-x W-x W-x AMTO2 AMTO1 AMEn ShrTO SmrtH HIAO HushEnB TSEL bit 8 bit 1 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared bit 35 x = Bit is unknown PTTR5: MSB (See Table 4-5) bit 34 PTTR4: 4SB bit 33 PTTR3: 3SB bit 32 PTTR2: 2SB bit 31 PTTR1: LSB bit 30 TMTR4: MSB (See Table 4-4) DS20002275B-page 30  2011-2019 Microchip Technology Inc. RE46C180 REGISTER 4-3: SERIAL READ/WRITE REGISTER (CONTINUED) bit 29 TMTR3: 3SB bit 28 TMTR2: 2SB bit 27 TMTR1: LSB bit 26 HYTR3: MSB (See Table 4-3) bit 25 HYTR2: 2SB bit 24 HYTR1: LSB bit 23 STTR5: MSB (See Table 4-2) bit 22 STTR4: 4SB bit 21 STTR3: 3SB bit 20 STTR2: 2SB bit 19 STTR1: LSB bit 18 Unimplemented: Read as ‘x’ bit 17 LBTR2: MSB bit 16 LBTR1: LSB 00 =7.5V 01 =7.8V 10 =6.9V 11 =7.2V bit 15 EOLEn: End-of-Life Indicator Enable Bit 1 = Enable 0 = Disable bit 14 COEn: CO Alarm Function (Smart IO) Enable Bit 1 = Enable 0 = Disable bit 13 NoAAL: Auto Alarm Locate Disable Bit 1 = AAL is Disabled 0 = AAL is Enabled bit 12 SyncEn: Horn Synchronization Enable Bit 1 = Enable 0 = Disable bit 11 LBHshEn: Low Battery Hush Enable Bit 1 = Enable 0 = Disable bit 10 AMHCEn: Alarm Memory PTT Indicator Horn Chirp Enable Bit 1 = Enable 0 = Disable bit 9 AMLEDEn: Alarm Memory PTT Indicator LED Flashing Enable Bit 1 = Enable 0 = Disable bit 8 AMTO2: MSB bit 7 AMTO1: LSB 00 =24 Hours Timeout 01 =48 Hours Timeout 10 =0 Hours Timeout 11 =Never Timeout bit 6 AMEn: Alarm Memory Enable Bit 1 = Enable 0 = Disable  2011-2019 Microchip Technology Inc. DS20002275B-page 31 RE46C180 REGISTER 4-3: SERIAL READ/WRITE REGISTER (CONTINUED) bit 5 ShrTO: HUSH Timer Time Out Select Bit 1 = 80 secondse 0 = 9 minutes bit 4 SmrtH: Smart HUSH Bit 1 = Enable (Hush is canceled by either high smoke, or remote smoke) 0 = Disable (Hush is never canceled until timeout) bit 3 HIAO: HUSH-in-Alarm-Only Bit 1 = Enable (Hush is activated upon release of PTT during local smoke only) 0 = Disable (Hush is activated upon release of PTT at anytime) bit 2 HushEnB: HUSH Enable Bit 1 = Enable (Hush is disabled) 0 = Disable (Hush is enabled) bit 1 TSEL: Tone Select Bit 1 = Continuous Tone Pattern 0 = Temporal Tone Pattern DS20002275B-page 32  2011-2019 Microchip Technology Inc. FIGURE 4-6:  2011-2019 Microchip Technology Inc. MODE IO FEED T2 TEST Min THOLD1 = 10 µs M0 VSS VDD VSS VDD TM0 TM1 Min TSETUP1 = 10 µs VSS VDD VSS VDD TM2 TM3 Min PW1 = 10 µs TM4 TM5 TM6 Min T1 = 20 µs TM17 D2 TM18 Min TSETUP1 = 10 µs D1 D3 D5 Min THOLD1 = 10 µs D4 D6 D7 D9 Min TPW1 = 10 µs D8 D10 D12 Min T3 = 30 µs D11 D35 TM18 Min PW2 = 10 ms RE46C180 Timing Diagram for Serial Read/Write Calibration and User Features in Mode TM18. DS20002275B-page 33 RE46C180 4.7 Horn Test Test mode TM3 allows the horn to be enabled indefinitely for audibility testing. To enter this mode, follow the next steps: 1. Power up with the bias condition shown in Figure 4-1 to enter M0. At power-up: TEST = IO = FEED = T2 = VSS, DETECT = VDD. 2. 3. 4. 5. Drive T2 input from VSS to VDD and hold at VDD to enter TM0. Drive TEST from VSS to VDD and hold at VDD. Apply three clock pulses to the T2 input (VDD to VSS and then back to VDD) to enter in TM3 mode. Drive TEST from VDD to VSS to enable the horn. VDD Horn Enabled TEST VSS Min T1 = 20 µs VDD T2 VSS Min TSETUP1 = 10 µs MODE M0 FIGURE 4-7: DS20002275B-page 34 TM0 Min PW1 = 10 µs TM1 TM2 TM3 Timing Diagram for Horn Test in Mode TM3.  2011-2019 Microchip Technology Inc. RE46C180 4.8 Low Battery Test Test mode TM17 allows the low battery trip point to be tested. To enter this mode, follow these steps: 1. Power up with the bias condition shown in Figure 4-1 to enter M0. At power-up: TEST = IO = FEED = T2 = VSS, DETECT = VDD. 2. 3. 4. 5. Drive T2 input from VSS to VDD and hold at VDD to enter TM0. Drive TEST from VSS to VDD and hold at VDD. Apply 17 clock pulses to the T2 input (VDD to VSS and then back to VDD) to enter in TM17 mode. Drive IO from VSS to VDD to enable the low battery testing and turn on the RLED. Sweep VDD from high to low and monitor TESTOUT output. The TESTOUT output will indicate the Low Battery status (High = Low Battery detected). VDD TEST VSS VDD T2 VSS Min TSETUP1 = 10 µs Min TPW1 = 10 µs Min T1 = 20 µs VDD Low Battery Test Enabled IO VSS 9V VDD 7.5V 6V VDD TESTOUT VSS MODE M0 TM0 TM1 TM2 TM3 TM4 TM5 TM6 TM16 TM17 Note: Assume the 7.5V low battery trip point is selected. FIGURE 4-8: Timing Diagram for Low Battery Test in Mode TM17.  2011-2019 Microchip Technology Inc. DS20002275B-page 35 RE46C180 4.9 User Lock Bit Programming Test mode TM19 allows users to program the user EE lock bit. Once the user EE lock bit is set, the programmed user EE data can not be changed unless the lock bit is reset. To enter this mode, follow these steps: 1. Power up with the bias condition shown in Figure 4-1 to enter M0. At power-up: TEST = IO = FEED = T2 = VSS, DETECT = VDD. 2. 3. 4. 5. 6. Drive T2 input from VSS to VDD and hold at VDD to enter TM0. Drive TEST from VSS to VDD and hold at VDD. Apply 19 clock pulses to the T2 input (VDD to VSS and then back to VDD) to enter in TM19 mode. Hold TEST at VDD and pulse IO once to set the lock bit and store into the EEPROM memory. To reset the lock bit from Step 5, drive TEST to VSS and pulse IO once. To set user EE lock bit VDD TEST VSS VDD T2 VSS Min TSETUP1 = 10 µs Min TPW1 = 10 µs Min T1 = 20 µs Min PW2 = 10 ms VDD IO VSS MODE M0 TM0 TM1 TM2 TM3 TM4 TM5 TM6 TM18 TM19 To reset user EE lock bit VDD TEST VSS VDD T2 VSS Min TSETUP1 = 10 µs Min TPW1 = 10 µs Min T1 = 20 µs Min PW2 = 10 ms VDD IO VSS MODE M0 FIGURE 4-9: DS20002275B-page 36 TM0 TM1 TM2 TM3 TM4 TM5 TM6 TM18 TM19 Timing Diagram for User Lock Bit Programming in Mode TM19  2011-2019 Microchip Technology Inc. RE46C180 5.0 APPLICATION NOTES 5.1 Standby Current Calculation A calculation of the standby current is shown in Table 5-1, based on the following conditions: VDD = 9V LED current in loaded battery check = 10 mA EOLEn = 1 TABLE 5-1: STANDBY CURRENT CALCULATION IDD Component Current (µA) Duration (s) Period (s) Factor Average Current (µA) Fixed IDD 3.8 Always Always 1 3.8 Smoke Check 9.6 0.005 10 0.0005 0.0048 Low Battery Check (unloaded) 21.4 0.01 80 0.00013 0.0028 Low Battery Check (loaded) 10000 0.01 320 3.10E-05 0.31 Chamber Test (smoke check) 9.6 0.005 320 1.60E-05 0.00015 Chamber Test (chamber low) 3.2 3.7 320 0.012 0.038 End-of-Life (reading EE and counting) 35 0.14 1310400 1.10E-07 3.74E-06 End-of-Life (writing EE) 100 0.01 1310400 7.40E-09 7.63E-07 Total 5.1.1 FIXED IDD 5.1.6 4.16 CHAMBER TEST (CHAMBER LOW) The fixed IDD is the current from the constantly active internal oscillator, bias circuit and guard amplifier. The current drawn to pull the chamber low when the chamber test is performed. 5.1.2 5.1.7 SMOKE CHECK The current draw from the smoke detection circuitry during the 5 ms smoke check period. 5.1.3 LOW BATTERY CHECK (UNLOADED) The current drawn by the low battery detection circuitry during the 10 ms unloaded low battery check period. 5.1.4 LOW BATTERY CHECK (LOADED) END-OF-LIFE (READING EE AND COUNTING) The current drawn to read EOL bits from EE and then increase by 1. 5.1.8 END-OF-LIFE (WRITING EE) The current drawn to write EOL bits back to EE. 5.1.9 TOTAL CURRENT The average total current drawn in Standby The current drawn by the RLED during the 10 ms loaded low battery check period. 5.1.5 CHAMBER TEST (SMOKE CHECK) The current drawn by the smoke detection circuitry during the 5 ms smoke check period, while the chamber is pulled low.  2011-2019 Microchip Technology Inc. DS20002275B-page 37 RE46C180 5.2 FUNCTIONAL TIMING DIAGRAMS FIGURE 5-1: DS20002275B-page 38 RLED Low Battery Test (Internal Signal) Chamber Test (Internal Signal) Smoke Sample (Internal Signal) TPER0 TPLB1 TSCT TPLED1 Standby, No Alarm (not to Scale) TPLB1 TPCT1 TON1 Figures 5-1 to 5-8 show the timing diagrams for the smoke detector functions described in Section 3.0, Device Descriptions. Timing Diagram – Standby, No Alarm.  2011-2019 Microchip Technology Inc. FIGURE 5-2:  2011-2019 Microchip Technology Inc. HORN Chamber Test (Internal Signal) RLED HORN Low Battery Test (Internal Signal) THOF5 THON1 THPER1 THPER2 THOF4 THON1 Chamber Test (not to Scale) TPCT1 TPLED1 TPLB2 TON1 Low Battery Test Failure (not to Scale) RE46C180 Timing Diagram – Low Battery Test Failure and Chamber Test Failure. DS20002275B-page 39 FIGURE 5-3: DS20002275B-page 40 7(67287 6PRNH6DPSOH LQWHUQDOVLJQDO 6PRNH LQWHUQDOVLJQDO 7(67 7(67287 ,2'803 6PRNH6DPSOH ,QWHUQDO6LJQDO 6PRNH ,QWHUQDOVLJQDO 6PRNH/HYHO 73(5 73(5 '(7(&7!96(1 73(5 QRVPRNHDODUP 73(5 73(5 Push-to-Test (not to scale) 73(5 VPRNHDODUP '(7(&796(1 From no alarm to local alarm then back to no alarm (not to scale) 7,2'03 7,2'03 QRVPRNHDODUP '(7(&7!96(1 RE46C180 Timing Diagram – From Standby to Local Smoke and Push-To-Test.  2011-2019 Microchip Technology Inc. FIGURE 5-4:  2011-2019 Microchip Technology Inc. IO RLED (internal signal) Smoke Sample HORN (Continuous Pattern) HORN (Temporal Pattern) Smoke (internal signal) No Smoke Alarm TON1 THDLY2 TSCT THDLY1 Smoke Alarm THON3 TPLED2 TPER3 THOF3 THON2 THOF1 TIODLY1 Local Smoke Alarm (Not to Scale) THOF2 RE46C180 Timing Diagram – Local Smoke Alarm. DS20002275B-page 41 FIGURE 5-5: DS20002275B-page 42 HORN (Continuous Pattern) HORN (Temporal Pattern) IO as input TIOFILT TIODLY3 TIODLY2 IO Alarm (Not to Scale) RE46C180 Timing Diagram – IO Smoke Alarm.  2011-2019 Microchip Technology Inc. FIGURE 5-6:  2011-2019 Microchip Technology Inc. TEST HORN RLED TEST HORN GLED RLED TPLED2 Alarm, No Low Battery TON1 Alarm, No Low Battery TAMTO TPLED4 TOFLED2 TPLED3 TTPER HUSH Timer, No Alarm, No Low Battery HUSH Timer (not to scale) TON1 TOFLED1 TPLED1 Alarm Memory, No Alarm, No Low Battery Alarm Memory (not to scale) TPLED1 Standby, No Alarm, No Low Battery TPLED1 Alarm Memory, after 24 hour THPER3 TON1 TPLED5 Alarm Memory Indication RE46C180 Timing Diagram – Alarm Memory and HUSH Timer. DS20002275B-page 43 FIGURE 5-7: DS20002275B-page 44 HORN CO Alarm (Internal Signal) IO as Input TIOPW1 TIOTO1 CO Alarm THON4 THOF6 THPER4 THOF7 RE46C180 Timing Diagram – CO Alarm.  2011-2019 Microchip Technology Inc. FIGURE 5-8:  2011-2019 Microchip Technology Inc. IO Horn Sync IO Dump (internal signal) HORN Smoke (internal signal) no alarm alarm TPIO1 TIODMP2 TONIO TPIO2 TIODLY4 Horn Synchronization and AAL TOFIO RE46C180 Timing Diagram – Horn Synchronization and AAL. DS20002275B-page 45 RE46C180 NOTES: DS20002275B-page 46  2011-2019 Microchip Technology Inc. RE46C180 6.0 PACKAGING INFORMATION 6.1 Package Marking Information 16-Lead PDIP (300 mil) Example RE46C180-V/P e3 1123256 16-Lead Narrow SOIC (3.90 mm) Example RE46C180 V/SL e3 1123256 Legend:XX...XCustomer-specific information YYear code (last digit of calendar year) YYYear code (last 2 digits of calendar year) WWWeek code (week of January 1 is week ‘01’) NNNAlphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) *This package is Pb-free. The Pb-free JEDEC designator (e3 ) can be found on the outer packaging for this package. Note:In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.  2011-2019 Microchip Technology Inc. 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