SEC1100/SEC1200
Smart Card Bridge to Full-Speed USB, SPI,
and UART Interfaces
PRODUCT FEATURES
Data Brief
General Description
The SEC1100 and SEC1200 provide a single-chip
solution for a Smart Card bridge to USB, SPI, and UART
interfaces. These bridges are controlled by an enhanced
8051 micro controller and all chip peripherals are
accessed and controlled through the SFR or XDATA
register space. SMSC’s TrustSpan TM Technology
enables digital systems to securely communicate,
process, move and store information on system boards,
across networks and through the cloud.
— Full-speed (12 Mbps) USB operation compliant to the
USB 2.0 Specification
— Integrated USB 1.5 K pull-up resistor
— Integrated USB devices controller with:
– 8/16/32/64 byte control buffer
– Five 8/16/32/64 byte programmable (bulk/interrupt)
endpoint buffers
Smart Card
— The SEC1100 provides one Smart Card interface and
the SEC1200 provides two
— Fully compliant with ISO/IEC 7816, EMV, and PC/SC
standards
— Versatile ETU rate generation, supporting current and
proposed rates (up to 826 Kbps)
— Full support of both T=0 and T=1 protocols
— Full-packet FIFO (259 bytes), for transmit and receive
— Half-duplex operation (no software intervention required
between transmit and receive phases of exchange)
— Loose real-time response required of software
(approximately 180 ms)
— Dynamically programmable FIFO threshold with byte
granularity
— Time-out FIFO flush interrupt, independent of threshold
— Programmable Smart Card clock frequency
— UART-like register file structure, expanded to 4 banks
of 16 registers
— Supports Class A, Class B, Class C, or Class AB
Smart Cards (1.8 V, 3.0 V and 5.0 V cards)
— Automatic character repetition for T=0 protocol parity
error recovery
— Automatic card deactivation on card removal and on
other system events, including persistent parity errors
— Internal procedure byte filtering for T=0 protocol
— Protocol timers (Guard, Timeout, and CWT) for EMVdefined timing parameters
– Detection of an unresponsive card
– Activation/deactivation sequences
– Cold/warm resets
– Monitoring for all EMV timing constraints
– 16-bit general purpose down counter for software
timing use
— Fully compliant ESD protection on card pins
8051 Processor
— Reduced instruction cycle time (approximately 9 times
80C51)
— 16 MHz max clock speed
— Enhanced peripherals; three 16-bit timers, watchdog
timer, interrupt controller, JTAG
— OTP (One Time Programmable) ROM
– 16 KB
— RAM
– 1.5 KB
General Features
USB
UART (SEC1200 only)
— Standard PC baud rates supported
— 1 M baud high-speed rate (not PC standard)
SPI (SEC1200 only)
— Master and Slave capability with 12 MHz max
performance
General
— 5.0 V tolerance on user accessible IO pins
— Self-clocking internal oscillator, no external crystal
required
— 3.0 V - 5.5 V supply input
– Internal 4.8 V comparator disables Class A card
support if the input voltage is too low
Applications
USB Smart Card reader
SPI-based Smart Card reader
UART-based Smart Card reader
Dual Smart Card reader
SMSC SEC1100/SEC1200
Revision 1.0 (12-08-11)
PRODUCT PREVIEW
Smart Card Bridge to Full-Speed USB, SPI, and UART Interfaces
Order Numbers:
ORDER NUMBERS
LEAD-FREE
ROHS COMPLIANT
PACKAGE
SEC1100-A5-xx
16QFN
SEC1200-CN-xx
24QFN
SEC1202-HZE-xx
48QFN
PACKAGE/
REEL SIZE
TEMPERATURE RANGE
5x5 mm
0ºC to 70ºC
This product meets the halogen maximum concentration values per IEC61249-2-21
For RoHS compliance and environmental information, please visit www.smsc.com/rohs
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000 or 1 (800) 443-SEMI
Copyright © 2011 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
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TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.0 (12-08-11)
2
PRODUCT PREVIEW
SMSC SEC1100/SEC1200
Smart Card Bridge to Full-Speed USB, SPI, and UART Interfaces
Overview
The SEC1100 and SEC1200 provide a single-chip solution for a Smart Card bridge to USB, SPI, and
UART interfaces. These bridges are controlled by an enhanced 8051 micro controller and all chip
peripherals are accessed and controlled through the SFR or XDATA register space.
Feature Highlights
Smart Card
— Fully compliant with standards: ISO/IEC 7816, EMV 4.2 (May 2008), and PC/SC
— Versatile ETU rate generation, supporting current and proposed rates (to 826 Kbps and beyond)
— Full support of both T=0 and T=1 protocols
— Full-packet FIFO (259 bytes), for transmit and receive
— Half-duplex operation, with no software intervention required between Transmit and Receive
phases of an exchange
— Very loose real-time response required of software: approximately 180 ms worst case
— Dynamically programmable FIFO threshold, with byte granularity
— Time-out FIFO flush interrupt, independent of threshold
— Programmable Smart Card clock frequency
— UART-like register file structure
— Supports Class A, Class B, Class C, or Class AB Smart Cards (all 1.8 V, 3.0 V and 5.0 V cards)
— Automatic character repetition for T=0 protocol parity error recovery
— Automatic card deactivation on card removal and on other system events, including persistent
parity errors
— Internal procedure byte filtering for T=0 protocol
— Protocol timers (guard, time-out and CWT) for EMV-defined timing parameters
–
–
–
–
–
Detection of an unresponsive card
Activation/deactivation sequences
Cold/warm resets
Monitoring for all EMV timing constraints
16-bit general purpose down counter for software timing use
— Fully compliant ESD protection on card pins per JESD22-A114D (March 2006) and JESD22A115A “Machine Model” from AN1181
— Fully EMV compliant, internal signal current limits
— 3.3 V internal operation with 5.0 V tolerant buffers where required
— Self-contained management of Smart Card power:
–
–
–
–
–
SC1VCC and SC2VCC, supply output
Regulator for 3.0 V, and 5.0 V from supply input
Current limiter with over-current sense interrupt (short circuit detect)
Hardware-guaranteed, compliant deactivation sequence on card removal
Synchronous card support
USB
— Full-Speed (12 Mbps) USB operation compliant with the USB 2.0 Specification
— Integrated USB 1.5 K pull-up resistor
— Integrated USB devices controller with:
– 8/16/32/64 byte control endpoint 0 buffer
– Five 8/16/32/64 byte programmable (bulk/interrupt) endpoint buffers
8051
— Reduced instruction cycle time (approximately 9 times 80C51)
— 16 MHz max clock speed
— Enhanced peripherals: three 16-bit timers, watch dog timer, interrupt controller, JTAG
— 16 KB One Time Programmable (OTP) ROM
SMSC SEC1100/SEC1200
3
PRODUCT PREVIEW
Revision 1.0 (12-08-11)
Smart Card Bridge to Full-Speed USB, SPI, and UART Interfaces
— 1.5 KB RAM
UART
— Standard PC (9600, 19200, 38400 and 115200) baud rates supported
— 1 M baud high-speed rate (non-PC standard)
SPI
— Master and Slave capability with 12 MHz max performance
General
— 5.0 V tolerance on user accessible IO pins
— Self-clocking internal oscillator, no external crystal required
— 3.0 V-5.5 V supply input
— Internal 4.8 V comparator disables Class A card support if the input voltage is too low
Revision 1.0 (12-08-11)
4
PRODUCT PREVIEW
SMSC SEC1100/SEC1200
Smart Card Bridge to Full-Speed USB, SPI, and UART Interfaces
Block Diagrams
Reset
VDD33
1
1
2
1
Smart
Card
Power
Control
Smart
Card
Regulators
5.0 V
3.0 V
1.8 V
USB/GPIO/Core
Regulators
3.3 V
1.2 V
Power On Reset
Power Fail Detect
D+
D-
3.0 V - 5.5 V or VBUS
USB FS XDATA
Device
Controller
ISO7816 /
Smart
Card
Interface
USB FS
PHY
1.5
KB
RAM
CLK_PWR
48 MHz
Oscillator
16
KB
OTP
ROM
4/16
KB
ROM
Smart Card 1
7 pins
8051
CPU
Watchdog
Timer
256 x 8
RAM
CPU Power
Management
CPU Clock
Management
Timer 0
External
Interrupts
On Chip
Debug
JTAG
Timer 1
6
6
Timer 2
4
GPIO
4
Miscellaneous
Figure 1 SEC1100 Block Diagram
SMSC SEC1100/SEC1200
5
PRODUCT PREVIEW
Revision 1.0 (12-08-11)
Smart Card Bridge to Full-Speed USB, SPI, and UART Interfaces
Reset
VDD33
1
1
USB
FS
PHY
2
USB FS
Device
Controller
1
Smart
Card
Regulators
5.0 V
3.0 V
1.8 V
USB/GPIO/Core
Regulators
3.3 V
1.2 V
Power On Reset
Power Fail Detect
D+
D-
3.0 V - 5.5 V or VBUS
Smart Card
Power
Control
Smart
Card
Regulators
5.0 V
3.0 V
1.8 V
3
Smart Card
Power
Control
16
KB
OTP
ROM
4/16
KB
OTP
ROM
CLK_PWR
48 MHz
Oscillator
Smart Card1
7 pins
6+3
8051
CPU
Watchdog
Timer
256 x 8
RAM
CPU Power
Management
CPU Clock
Management
Timer 0
External
Interrupts
Timer 1
On Chip
Debug
JTAG
SAM2
4
1
ISO7816 /
Smart
Card
Interface
XDATA
1.5 KB
RAM
1
6
UART
16550
Timer 2
SPI1
4
4
GPIO
6
Miscellaneous 8
Figure 2 SEC1200 Block Diagram
Reset
3.0 V – 5.5 V or
VBUS
VDD33
1
1
1
SMSC SEC1202
USB/GPIO/Core
Regulators
3.3 V
1.2 V
Power On Reset
Power Fail Detect
D+
D-
2
USB
FS
PHY
USB FS
Device
Controller
48 MHz
Oscillator
Smart Card
Power
Control
Smart
Card
Regulators
5.0 V
3.0 V
1.8 V
1
1
ISO7816 /
Smart
Card
Interface
16
KB
OTP
ROM
4/16
KB
ROM
SAM2
4
3
Smart Card
Power
Control
XDATA
1.5 KB
RAM
CLK_PWR
Smart
Card
Regulators
5.0 V
3.0 V
1.8 V
Smart Card1
7 pins
8051
CPU
Watchdog
Timer
256 x 8
RAM
CPU Power
Management
CPU Clock
Management
Timer 0
External
Interrupts
On Chip
Debug
JTAG
Timer 1
Timer 2
6+3
6
S
PI
2
UART
16550
4
S
PI
1
4
4
GPIO
4
15
Miscellaneous
Figure 3 SEC1202 Block Diagram
Revision 1.0 (12-08-11)
6
PRODUCT PREVIEW
SMSC SEC1100/SEC1200
Smart Card Bridge to Full-Speed USB, SPI, and UART Interfaces
Package Outlines
Figure 4 SEC1100 16-Pin QFN Package Outline
Table 1 Package Parameters
A
A1
A3
D/E
D2/E2
L
b
K
e
MIN
NOMINAL
MAX
REMARKS
0.80
0
0.90
0.02
0.20 REF
5.00
3.30
0.40
0.30
0.45
0.80 BSC
1.00
0.05
Overall Package Height
Standoff
Lead-Frame Thickness
X/Y Body Size
X/Y Exposed Pad Size
Terminal Length
Terminal Width (Note 2)
Terminal to Pad Distance
Terminal Pitch
4.90
3.20
0.35
0.25
0.35
SMSC SEC1100/SEC1200
5.10
3.40
0.45
0.35
-
7
PRODUCT PREVIEW
Revision 1.0 (12-08-11)
Smart Card Bridge to Full-Speed USB, SPI, and UART Interfaces
Figure 5 SEC1200 24-Pin QFN Package Outline
Revision 1.0 (12-08-11)
8
PRODUCT PREVIEW
SMSC SEC1100/SEC1200
Smart Card Bridge to Full-Speed USB, SPI, and UART Interfaces
Figure 6 SEC1202 48-pin QFN Package Outline
SMSC SEC1100/SEC1200
9
PRODUCT PREVIEW
Revision 1.0 (12-08-11)
