SY100ELT23
Dual Differential PECL-to-TTL Translator
Features
General Description
•
•
•
•
•
•
•
The SY100ELT23 is a dual differential PECL-to-TTL
translator. Because PECL (positive ECL) levels are
used, only +5V and ground are required. The small
outline 8-lead SOIC package and low skew, dual gate
design make the ELT23 ideal for applications that
require the translation of a clock or data signal.
3.0 ns Typical Propagation Delay
很抱歉,暂时无法提供与“SY100ELT23ZI”相匹配的价格&库存,您可以联系我们找货
免费人工找货