SY100S314FC

QUINT DIFFERENTIAL LINE RECEIVER FEATURES SY100S314 FINAL DESCRIPTION ■ Max. propagation delay of 900ps ■ Differential outputs ■ IEE min. of –60mA ■ Extended supply voltage option: VEE = –4.2V to –5.5V ■ Voltage and temperature compensation for improved noise immunity ■ VBB output for single-ended use ■ More than twice as fast as Fairchild ■ Function and pinout compatible with Fairchild F100K ■ Available in 24-pin CERPACK and 28-pin PLCC packages The SY100S314 offers five differential line receivers with emitter follower outputs, designed for use in highperformance ECL systems. For single-ended operation, the VBB reference voltage is available. In the single-ended mode, the apparent input threshold of the true inputs is 30mV higher than the threshold of the complementary inputs. Common mode rejection of +1.0V is achieved through the use of active current sources. If both the true and complement inputs are at the same potential between VEE and VCC, then the complementary outputs will take on a logic HIGH state. Unlike the other members of the Synergy 300K family, the inputs on this device do not have pulldown resistors. Oc Dd Od Dd Od De De Ob Ob 1 24 23 22 21 20 19 18 Da 2 3 17 16 Da Oa 15 14 Oa Ob 13 7 8 9 10 11 12 Ob Oe Dd Dd Oe De VBB Oe 4 5 Oe 6 De Top View Flatpack F24-1 Od PIN NAMES Pin Db Dc Od 19 20 21 22 23 24 25 Db Oc Od Oc Oc Dc Dc Dc VCC VCC VCC VCCA Ob Oc VCCA Dc Dc VBB VEE Db Oc Od Ob Top View PLCC J28-1 Oe Db 4 3 2 1 28 27 26 De Oe Oa 12 13 14 15 16 17 18 VEES Da 11 10 9 8 7 6 5 Db Db VEE VEES VBB Dd De Oa Dd Da Oa Da BLOCK DIAGRAM Da Oa VEES PIN CONFIGURATIONS Function Da – De Data Inputs Da – De Inverting Data Inputs Oa – Oe Data Outputs Oa – Oe Complementary Data Outputs VEES VEE Substrate VCCA VCCO for ECL Outputs Rev.: G 1 Amendment: /1 Issue Date: December 2001 SY100S314 Micrel LOGIC EQUATION O=D DC ELECTRICAL CHARACTERISTICS VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND Symbol Parameter Min. Typ. Max. Unit Condition VDIFF Input Voltage Differential 150 — — mV Required for Full Output Swing VCM Common Mode Voltage — — 1.0 V Permissible ±VCM with Respect to VBB IIH Input HIGH Current — — 50 µA VIN = VIH (Max.), Da - De = VBB, Da - De = VIL (Min.) ICBO Input Leakage Current –10 — — µA VIN = VEE, Da - De = VBB, Da - De = VIL (Min.) IEE Power Supply Current –60 –45 –30 mA Da - De = VBB, Da - De = VIL (Min.) AC ELECTRICAL CHARACTERISTICS CERPACK VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND TA = 0°C Symbol Parameter TA = +25°C TA = +85°C Min. Max. Min. Max. Min. Max. Unit tPLH tPHL Propagation Delay Data to Output 300 1000 300 1000 300 1000 ps tTLH tTHL Transition Time 20% to 80%, 80% to 20% 300 900 300 900 300 900 ps Condition PLCC VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND TA = 0°C Symbol Parameter TA = +25°C TA = +85°C Min. Max. Min. Max. Min. Max. Unit tPLH tPHL Propagation Delay Data to Output 300 900 300 900 300 900 ps tTLH tTHL Transition Time 20% to 80%, 80% to 20% 300 900 300 900 300 900 ps 2 Condition SY100S314 Micrel TIMING DIAGRAM 0.7 ± 0.1 ns 0.7 ± 0.1 ns INPUT –0.95V 80% 50% 20% –1.69V TRUE tPHL tPLH 50% tPLH OUTPUT tPHL 80% 50% 20% COMPLEMENT tTLH tTHL Propagation Delay and Transition Times NOTE: VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND PRODUCT ORDERING CODE Ordering Code Package Type Operating Range SY100S314FC F24-1 Commercial SY100S314JC J28-1 Commercial SY100S314JCTR J28-1 Commercial 3 SY100S314 Micrel 24 LEAD CERPACK (F24-1) Rev. 03 4 SY100S314 Micrel 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD + 1 (408) 980-9191 FAX SANTA CLARA + 1 (408) 914-7878 WEB CA 95054 USA http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. © 2000 Micrel Incorporated 5