SY58052AUMG-TR

SY58052AU Ultra-Precision CML Data and Clock Synchronizer with Internal Input and Output Termination Precision Edge® General Description The SY58052AU is an ultra-fast, precision, low jitter datato-clock resynchronizer with a guaranteed maximum data throughput of 10.7Gbps and a maximum clock of 10.7GHz. The SY58052AU is an ideal solution for backplane retiming or retiming after the data passes through long trace lengths. Serial data comes into the data input, and the CML output is synchronous to the input reference clock’s rising edge. The SY58052AU differential inputs include a unique, internal termination design that allows access to the termination network through a VT pin. This feature allows the device to easily interface to different logic standards, both AC- and DC-coupled, without external resistor-bias and termination networks. The result is a clean, stub-free, low-jitter interface solution. The differential CML output is optimized for 50Ω environments with internal 50Ω source termination and a 400mV output swing. The SY58052AU operates from a 2.5V or 3.3V supply and is guaranteed over the full industrial temperature range (−40°C to +85°C). The SY58052AU is part of a Micrel’s Precision Edge® product family. Datasheets and support documentation are available on Micrel’s web site at: www.micrel.com. Functional Block Diagram Precision Edge® Features • Resynchronize data to a reference clock • Guaranteed AC performance over temperature and voltage: − DC-to > 10.7Gbps data rate throughput − DC-to > 10.7GHz clock fMAX − 160ps any in-to-out tPD − 30ps typical Rise/Fall time • Ultra low-jitter design: − 0.3psRMS typical random jitter − 3psPP typical deterministic jitter (data) − < 10psPP total jitter (clock) • Internal 50Ω input termination • Unique input termination and VT pin accepts DC- and AC-coupled inputs (CML, PECL) • Internal 50Ω output source termination • 400mV CML output swing • Power supply: 2.5V ±5% or 3.3V ±10% • −40°C to +85°C industrial temperature range • Available in a 3mm × 3mm 16-pin QFN package Applications • • • • • • • • Data communications systems Serial OC-192, OC192+FEC data-to-clock realignment Parallel 10Gbps for OC-768 All SONET OC-3 − OC-768 applications Fiber channel Gigabit Ethernet ATE Test and measurement AnyGate and Precision Edge are registered trademarks of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com February 11, 2014 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Typical Application Ordering Information(1) Part Number SY58052AUMG (2) SY58052AUMG TR Package Type Operating Range Package Marking Lead Finish 3mm × 3mm QFN-16 Industrial 052A with Pb-Free Bar Line Indicator NiPdAu Pb-Free 3mm × 3mm QFN-16 Industrial 052A with Pb-Free Bar Line Indicator NiPdAu Pb-Free Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC electricals only. 2. Tape and reel. Pin Configuration 16-Pin 3mm × 3mm QFN February 11, 2014 2 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Pin Description Pin Number Pin Name Pin Function 1, 2 CLK, /CLK Differential Input: This input pair is the clock signal that re-times the data signal at DATA, /DATA. Each pin of this pair internally terminates to the VTCLK pin to 50Ω. Note that this input will default to an indeterminate state if left open (see Input Interface Applications). 3, 4 DATA, /DATA Differential Input: This input pair is the signal to be synchronized by the CLK, /CLK signal. Each pin of this pair internally terminates to the VTDATA pin to 50Ω. Note that this input will default to an indeterminate state if left open (see Input Interface Applications). 5 VTDATA Input Termination Center-Tap: Each of the two inputs, DATA, /DATA terminates to this pin. The VTDATA pin provides a center-tap to a termination network for maximum interface flexibility (see Input Interface Applications). 6 /RESET TTL/CMOS-Compatible Input: The /RESET input asynchronously forces the Q output to a logic “0” state whenever it is active low. Possible state changes due to rising edges on CLK, /CLK are ignored until /RESET goes inactive high. 7, 10, 11, 14, 15 GND (Exposed Pad) 8, 13 VCC Positive Power Supply. Bypass with 0.1µF  0.01µF low-ESR capacitors. 12, 9 Q, /Q Differential Output: This CML output pair is the output of the flip-flop. The data input is transferred to the Q output at the rising edge of CLK (falling edge of /CLK) (see Input Interface Applications). 16 VTCLK Ground. Exposed pad must be connected to the same potential as the GND pin. Input Termination Center-Tap: Each of the two inputs, CLK, /CLK terminates to this pin. The VTCLK pin provides a center-tap to a termination network for maximum interface flexibility (see Input Interface Applications). Truth Table DATA /DATA CLK /CLK /RESET Q /Q X X X X 0 0 1 X X 0 1 1 QN−1 /QN−1 X X 1 0 1 QN−1 /QN−1 0 1 1 0 1 1 0 1 1 0 February 11, 2014 3 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Absolute Maximum Ratings(3) Operating Ratings(4) Supply Voltage (VCC) .................................... −0.5V to +4.0V Input Voltage (VIN). ........................................... −0.5V to VCC CML Output Voltage (VOUT) ...........VCC − 1.0V to VCC + 0.5V (6) Termination Current Source or Sink Current on VTDATA, VCLK ....... ±60mA Input Current Source or Sink Current on DATA, /DATA, CLK, /CLK ............................................................................ ±30mA Lead Temperature (soldering, 20s) .......................... +260°C Storage Temperature (TS) ......................... −65°C to +150°C Supply Voltage (VCC) .................. +2.375V to +2.625V / +2.97V to 3.63V Ambient Temperature (TA) .......................... –40°C to +85°C (5) Package Thermal Resistance QFN (θJA) Still-Air ......................................................... 61°C/W QFN (ψJB) Junction-to-Board ........................................ 38°C/W DC Electrical Characteristics(7) TA = –40°C to +85°C, unless otherwise noted. Symbol Parameter Condition Min. Typ. Max. VCC Power Supply ICC Power Supply Current RIN Differential Input Resistance (DATA, /DATA or CLK, /CLK) VIH Input HIGH Voltage (DATA, /DATA or CLK, /CLK) Note 8 VIL Input LOW Voltage (DATA, /DATA or CLK, /CLK) Note 8 VIN Input Voltage Swing (DATA, /DATA or CLK, /CLK) Note 8, see Figure 4 100 mV VDIFF_IN Differential Input Voltage Swing (DATA, /DATA) or (CLK, /CLK) Note 8, see Figure 5 200 mV IIN Input Current (DATA, /DATA) or (CLK, /CLK) Note 8 2.375 2.625 2.97 3.63 With load, for either 2.5V or 3.3V supply Units V 42 60 mA 100 110 Ω 1.2 VCC V 0 VIH − 0.1 V 90 21 mA Notes: 3. Permanent device damage may occur if the ratings in the Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation is not implied for conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. 4. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 5. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device’s most negative potential on the PCB. ψJB uses 4-layer θJA in still-air, unless otherwise stated. 6. Due to the limited drive capability use for input of the same package only. 7. The circuit is designed to meet the DC specifications shown in the DC Electrical Characteristics chart after thermal equilibrium has been established. 8. Due to the internal termination (see Input and Output Stage Internal Termination) the input current depends on the applied voltages at DATA, /DATA and VTDATA inputs, or the CLK, /CLK and VTCLK inputs. Do not apply a combination of voltages that causes the input current to exceed the maximum limit. February 11, 2014 4 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU LVTTL/CMOS DC Electrical Characteristics(9) VCC = 2.5V ±5% or 3.3V ±10%; TA = –40°C to +85°C, unless otherwise noted. Symbol Parameter Condition Min. VIH Input HIGH Voltage VIL Input LOW Voltage IIH Input HIGH Current −50 IIL Input LOW Current −100 Typ. Max. 2.0 Units V 0.8 mV 20 µA µA CML Outputs DC Electrical Characteristics(9) VCC = 2.5V ±5% or 3.3V ±10%; RL = 100Ω across output pair or equivalent; TA = –40°C to +120°C, unless otherwise noted. Symbol Parameter Condition Min. Typ. VOH Output HIGH Voltage (Q, /Q) RL = 50Ω to VCC VOUT Output Voltage Swing (Q, /Q) See Figure 4 325 400 mV VDIFF_OUT Differential Output Voltage Swing (Q, /Q) See Figure 5 650 800 mV ROUT Output Source Impedance (Q, /Q) 45 50 VCC − 0.020 Max. Units VCC V 55 Ω AC Electrical Characteristics(10) VCC = 2.5V ±5% or 3.3V ±10%; RL = 100Ω across output pair or equivalent; TA = –40°C to +85°C, unless otherwise noted. Symbol Parameter fMAX Maximum Operating Frequency tPD Propagation Delay (CLK-to-Q) tRESET Propagation Delay (Reset-to-Q) tS Set-Up Time 20 ps tH Hold Time 20 ps tRR Reset Recovery Time 250 ps Random Jitter (RJ) tJITTER Deterministic Jitter (DJ) Min. Typ. Clock 10.7 GHz Data 10.7 Gbps 70 VTH = VCC/2 Rise/Fall Times (20% to 80%) Max. ps 300 ps Typical values at ambient temperature . 0.3 1 Typical values at ambient temperature (12) . 3 10 Clock Data 10 (13) Units 160 (11) (13) Total Jitter (TJ) tr , tf Condition psRMS psPP 14 At full output swing 30 50 ps Notes: 9. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 10. Measured with 100mV input swing (see Timing Diagrams for definition of parameters). High-frequency AC-parameters are guaranteed by design and characterization. 11. RJ is measured with a K28.7 comma detect character pattern, measured at 10.7Gbps and 2.5Gbps. 12. DJ is measured at 10.7Gbps and 2.5Gbps, with both K28.5 and 223–1 PRBS pattern. 13. Total jitter definition: with an ideal clock input frequency of ≤ fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. February 11, 2014 5 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Typical Operating Characteristics VCC = 3.3V, GND = 0V, CLK = 400mV, DATA = 400mV, TA = +25°C Output Swing (100mV/div) 2.5Gbps Data Output Swing (100mV/div) Time (100ps/div) 5Gbps Data Output Swing (100mV/div) Time (50ps/div) 10.7Gbps Data Time (20ps/div) February 11, 2014 6 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Typical Operating Characteristics (Continued) Single-Ended Output Swing vs. Data Rate 140 420 135 400 130 380 Q AMPLITUDE (mVP) PROPAGATION DELAY (ps) IN-to-Q Propagation Delay vs. Temperature 125 120 115 110 105 360 340 320 300 280 100 260 -50 -25 0 25 50 75 100 0 TEMPERATURE (°C) February 11, 2014 2 4 6 8 10 DATA RATE (Gbps) 7 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Timing Diagram Input and Output Stage Internal Termination Figure 1. Simplified Differential Input Stage February 11, 2014 8 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Input and Output Stage Internal Termination (Continued) Figure 2. Simplified TTL/CMOS Input Figure 3. Simplified Differential Output Stage Operating Characteristics Definition of single-ended and differential swings. Figure 4. Single-Ended Swing February 11, 2014 Figure 5. Differential Swing 9 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Input Interface Applications Figure 6. Static Input Level Figure 8. LVDS Interface (AC-Coupled) Note: Be certain that the LVDS driver can be AC-coupled. Figure 7. LVDS Interface (DC-Coupled) Figure 9. CML Interface (DC-Coupled) (OPTION: VT may be connected to VCC) February 11, 2014 Figure 10. CML Interface (AC-Coupled) 10 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Input Interface Applications (Continued) Figure 11. LVPECL Interface (DC-Coupled) Figure 12. LVPECL Interface (AC-Coupled) Related Product and Support Documentation Part Number Function Data Sheet Link SY58016L 3.3V 10Gbps Differential CML Line Driver/Receiver with Internal Termination www.micrel.com/product-info/products/sy58061l.shtml SY58051AU 10.7Gbps AnyGate with Internal Input and Output Termination www.micrel.com/_PDF/HBW/SY58051AU.pdf HBW Solutions New Products and Applications www.micrel.com/product-info/products/solutions.shtml ® February 11, 2014 11 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU Package Information(14) 16-Pin 3mm × 3mm QFN Package (MM) Note: 14. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com. February 11, 2014 12 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58052AU MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2014 Micrel, Incorporated. February 11, 2014 13 Revision 1.0 FOMhelp@micrel.com or (408) 955-1690