SY58627LMG-TR

SY58627L DC-to-6.4Gbps Backplane Receive Buffer with Four Stage Programmable Equalization and DC-Offset Control General Description The SY58627L high-speed, low jitter receive buffer is optimized for backplane and transmission line data-path management applications. The SY58627L is capable of receiving serial data up to 6.4Gbps across up to 36 inches of FR4. The SY58627L differential input includes Micrel’s unique, 3-pin input termination architecture that directly interfaces to any differential signal as small as 100mVpk (AC- or DC-coupled) without any termination resistor networks in the signal path. The outputs are 50Ω source-terminated CML optimized to drive 400mVpk into 50Ω (100Ω load across the output pair). The I/O termination is connected to a dedicated VTT pin for added bias flexibility. The SY58627L receiver input provides four levels of equalization to compensate for degraded signals resulting from transmission losses. The equalization is programmed with a three-bit interface. The SY58627L operates at 3.3V ±10% supply and is guaranteed over the full industrial temperature range of -40°C to +85°C. The SY58627L is part of Micrel’s high® speed, Precision Edge product line. All data sheets and support documentation can be found on Micrel’s web site at: www.micrel.com. Precision Edge® Features • • • • • • • • • • Selectable equalizing network to optimize incoming data eye pattern Four selectable equalization levels Receives up to 36” FR4 PCB trace, or longer combinations of FR4+cable+interconnect DC through 6.4Gbps data rate throughput Integrated loopback capability Unique, flexible I/O: - Patented, Internal termination to VTTIN pin interfaces to any differential AC- or DC-coupled signals - 50Ω source terminated CML outputs minimize round-trip reflections - Wide input voltage range: 100mV to 1.3VPK - Output disable - DC-offset control with VTT I/O Input loss-of-signal - Hysteresis included 3.3V ±10% supply voltage -40°C to +85°C temperature range Available in 32-pin (5mm x 5mm) QFN package Applications • • • • • ATE, T&M backplane management Serial backplane management Combination FR4+cable+interconnect receiver Fibre Channel, GigE, SONET/SDH data transmission Electrical interface and interconnect applications that require DC-offset control United States Patent No. RE44,134 Precison Edge is a registered trademark of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com January 2006 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58627L Functional Block Diagram January 2006 2 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58627L Ordering Information(1) Part Number Package Type Operating Range Package Marking Lead Finish SY58627LMG QFN-32 Industrial SY58627L with Pb-Free bar-line indicator NiPdAu Pb-Free QFN-32 Industrial SY58627L with Pb-Free bar-line indicator NiPdAu Pb-Free (2) SY58627LMGTR Notes: Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only. Tape and Reel. Pin Configuration 32-Pin QFN January 2006 3 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58627L Pin Description Pin Number 3, 4 6 7 27 23 15 10 11, 12 January 2006 Pin Name Pin Function RXIN, /RXIN Differential receiver input pair: This input pair is the differential signal input to the device. It accepts AC- or DC-coupled signals as small as 100mV (200mVPP). The signal detect (SD Level) includes a small amount of hysteresis to prevent the signal detect output from oscillating when no signal is present. RXIN and /RXIN internally terminate to the VTTIN pin through 50Ω. Please refer to the “Input Interface Applications” section for more details. RXIN, /RXIN differential inputs recommended be ≥ 90mVPK to ensure valid outputs. Consider disabling the outputs when the differential input is not present, or < 90mVPK (e.g.: Hot Swap Applications). VTTIN Input termination center-tap: RXIN and /RXIN terminate to VTTIN. The VTTIN pin provides a center-tap to the internal termination network for maximum interface flexibility, and DC-offset capability. Please refer to the “Input Interface Applications” section for more details. VREF-AC Reference voltage: This output biases to VCC-0.84V. It is used for AC-coupling the input pair (RXIN, /RXIN). Connect VREF-AC directly to the VTTIN pin. Bypass with 0.01µF low ESR capacitor to VCC. Maximum sink/source current is ±1.5mA. Due to the limited drive capability, the VREF-AC pin is only intended to drive the VTTIN pin. Leave VREF-AC pin floating when not used. Please refer to the “Input Interface Applications” section for more details. VTH Input logic threshold control voltage for logic control threshold settings other than LVTTL/CMOS. This input control pin can be externally biased to set the proper threshold for all the logic control pins, /RXEN, LBSEL, 3-bit equalization control, and /RXLBEN. For standard LVTTL/CMOS control, simply leave the VTH pin floating and the threshold voltage defaults to VCC/2 (When VEE = 0V). For LVPECL thresholds, set VTH to VCC-1.3V. /RXEN TTL/CMOS (or VTH controlled) compatible control input for the RXQ output pair. When pulled HIGH, the RXQ output pair is disabled. This input is internally connected to a 25kΩ pull-down resistor and will default to a logic LOW state (Enable) if left open. When disabled, the RXQ output goes LOW, and /RXQ output goes HIGH. Default threshold is VCC/2 when VTH pin is floating. /RXLBEN TTL/CMOS (or VTH controlled) compatible control input for RXLBQ output pair. When pulled HIGH, the RXLBQ output pair is disabled. This input is internally connected to a 25kΩ pull-down resistor and will default to a logic LOW state (Enable) if left open. When disabled, the RXLBQ output goes LOW, and /RXLBQ output goes HIGH. Default threshold is VCC/2 when VTH pin is floating. In normal operating mode when the RXLBQ output pair is not needed, disable the RXLBQ output pair (/RXLBEN = HIGH) to minimize noise. LBSEL TXLBIN, /TXLBIN Loopback MUX select control: The TTL/CMOS (or VTH controlled) compatible input selects the input to the Loopback mode multiplexer. When LBSEL input is logic HIGH, Loopback mode is selected, and the TXLBIN input pair is selected to pass through the RXQ and RXLBQ output pairs. Note that the LBSEL pin is internally connected to a 25kΩ pull-down resistor and will default to a logic LOW state if left open (normal operation). The Loopback MUX includes internal input isolation to minimize crosstalk. Loopback differential input pair: AC-coupled, CML-compatible input. This input pair includes internal termination connected to an internal VBB for an AC-coupled bias configuration. For local Loopback operation, the TXLBIN input pair receives a signal from the SY58626L transmitter TXLBQ output pair. The input signal from TXLBIN does not have any equalization. When the SY58627L Loopback mode is selected (LBSEL = HIGH), the signal at TXLBIN is directed to the RXQ and RXLBQ output pairs. 4 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58627L Pin Description (Continued) Pin Number 13, 14 21, 19 26 20 Pin Name Pin Function Receiver loopback CML compatible output pair. When the SY58627L is in local Loopback mode (LBSEL = 1), RXLBQ output is directed from TXLBIN (no equalization). When the SY58627L is in normal mode (LBSEL = LOW) and the RXLBQ output is not required, disable the RXLBQ output (/RXLBEN = HIGH) to minimize switching noise. This differential output pair is optimized to drive 400mVPK swing into a 50Ω load (100Ω across the pair). The RXLBQ output pair includes 50Ω internal source termination resistors. RXLBQ, /RXLBQ Receiver differential CML compatible output pair: This CML-compatible output pair is the equalized signal seen at the RXIN input pair and is optimized to drive 400mVPK swing into a 50Ω load (100Ω across the pair). The RXQ output pair includes 50Ω internal source termination resistors. When the SY58627L is in Loopback mode (LBSEL = HIGH), the RXQ output signal is directed from the unequalized TXLBIN input. RXQ, /RXQ Loss-of-Signal output. This LVTTL/CMOS output signal switches LOW when the signal is valid and switches HIGH when the signal is not valid. This open-collector output includes an internal 5kΩ pull-up resistor. Input signal valid, LOS = LOW, RXIN swing is >110mVPK (220mVPP). Input signal not valid, LOS = HIGH, RXIN swing is 100mV; TA = 25°C, RL = 100Ω across output pair; unless otherwise stated. 1m FR4 Output with SY58627L 23 (2.5Gbps PRBS 2 ) Output Swing (100mV/div.) Output Swing (100mV/div.) 1m FR4 Output without SY58627L 23 (2.5Gbps PRBS 2 ) Time (100ps/div.) 1m FR4 Output without SY58627L 23 (4.25Gbps PRBS 2 ) 1m FR4 Output with SY58627L 23 (4.25Gbps PRBS 2 ) Output Swing (100mV/div.) Output Swing (100mV/div.) Time (100ps/div.) Time (50ps/div.) 1m FR4 Output without SY58627L 23 (6.4Gbps PRBS 2 ) 1m FR4 Output without SY58627L 23 (6.4Gbps PRBS 2 ) Output Swing (100mV/div.) Output Swing (100mV/div.) Time (100ps/div.) Time (100ps/div.) Time (100ps/div.) January 2006 12 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58627L Typical Operating Characteristics (Continued) VCC = 3.3V ±10%; VIN > 100mV; TA = 25°C, RL = 100Ω across output pair; unless otherwise stated. (1) (1) 5m Cable Output with SY58627L 23 (4.25Gbps PRBS 2 ) Output Swing (100mV/div.) Output Swing (100mV/div.) 5m Cable Output without SY58627L 23 (4.25Gbps PRBS 2 ) Time (50ps/div.) Time (50ps/div.) (1) (1) 5m Cable Output without SY58627L 23 (6.4Gbps PRBS 2 ) Output Swing (100mV/div.) Output Swing (100mV/div.) 5m Cable Output with SY58627L 23 (6.4Gbps PRBS 2 ) Time (20ps/div.) Time (20ps/div.) Output Disable /RXQ HIGH RXQ LOW HIGH /RXEN LOW Time (250ns/div.) Note: 1. Measurements made with 26AWG Amphenol Skew Clear Eye Opener Plus cable. January 2006 13 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58627L Single-Ended and Differential Swings Figure 4a. Single-Ended Voltage Swing Figure 4b. Differential Voltage Swing Input and Output Stages Figure 5a. Simplified RXIN Differential Input Stage Figure 5b. Simplified RXIN Differential Output Stage Figure 5c. Simplified RXIN Differential Input Stage Figure 5d. Simplified RXIN Differential Output Stage January 2006 14 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58627L Input Interface Applications option: may connect VTTIN to VCC Figure 6a. LVPECL Interface (DC-Coupled) Figure 6b. LVPECL Interface (AC-Coupled) Figure 6c. CML Interface (DC-Coupled) Figure 6d. CML Interface (AC-Coupled) Figure 6e. LVDS Interface (DC-Coupled) Figure 6f. TXLBIN Interface (AC-Coupled) January 2006 15 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58627L CML Output Interface Applications Figure 7a. CML DC-Coupled Termination Figure 7b. CML DC-Coupled Termination Figure 7c. CML AC-Coupled Termination RXLBQ Output Interface Applications Figure 7a. CML DC-Coupled Termination Figure 7b. CML DC-Coupled Termination Figure 7c. CML AC-Coupled Termination Related Product and Support Information Part Number Function Data Sheet Link SY58626L DC-to-6.4Gbps Backplane Transmit Buffer with Selectable Output Pre-emphasis, I/O DC-Offset Control, and 200mV-3VPP Output Swing www.micrel.com/product-info/products/sy58626l.shtml HBW Solutions New Products and Applications www.micrel.com/product-info/products/solutions.shtml January 2006 16 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. SY58627L Package Information 32-Pin QFN Package Notes: 1. 2. 3. Package meets Level 2 Moisture Sensitivity Classification. All parts are dry-packed before shipment. Exposed pad must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2006 Micrel, Incorporated. January 2006 17 M9999-010606-A hbwhelp@micrel.com or (408) 955-1690