SY88953AL
3.3V 10.7Gbps CML Limiting Post Amplifier
with TTL SD and /SD
General Description
Features
The SY88953AL high-speed, limiting post amplifier is
designed for use in fiber-optic receivers. The device
connects to typical transimpedance amplifiers (TIAs). The
linear signal output from TIAs can contain significant
amounts of noise and may vary in amplitude over time.
The SY88953AL quantizes these signals and outputs CML
level waveforms.
•
•
•
•
•
•
The SY88953AL operates from a single +3.3V power
supply over temperatures ranging from –40°C to +85°C.
With its wide bandwidth and high gain, the SY88953AL
can take signals with data rates up to 10.7Gbps and as
small as 5mVPP and amplify them to drive devices with
CML inputs.
The SY88953AL outputs TTL signal-detect (SD and /SD)
signals. A programmable signal-detect level set pin (SDLVL)
sets the sensitivity of the input amplitude detection. SD
asserts high if the input amplitude rises above the
threshold set by SDLVL and deasserts low otherwise. /SD is
the complementary output of SD. /SD can be fed back to
the enable (/EN) input to maintain output stability under a
loss-of-signal (LOS) condition. /EN deasserts the true
output signal without removing the input signal. Typically
6dB SD hysteresis is provided to prevent chattering.
The SY88953AL also includes an input
adjustment to correct pulse-width distortion.
Single 3.3V power supply
Up to 10.7Gbps operation
700mVPP output swing with 25ps edge rates (typically)
28dB voltage gain with 5mVPP input sensitivity
On-chip 50Ω I/O termination
Programmable signal detect (SD and /SD) with 6dB
hysteresis
• Chatter-free OC-TTL SD and /SD outputs with internal
5kΩ pull-up resistors can feedback to TTL enable (/EN)
input
• Available in a tiny 3mm x 3mm 16-pin QFN package or
die
• Low power (62mA)
Applications
•
•
•
•
•
OC-192 SDH/SONET
10G Ethernet/Fibre Channel receivers
Up to 10.7Gbps proprietary link
XFP transceivers
Line driver/receiver
threshold
Datasheets and support documentation are available on
Micrel’s web site at: www.micrel.com.
Typical Application
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
August 29, 2013
Revision 1.1
hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SY88953AL
Ordering Information
Part Number
SY88953ALMG
(1)
SY88953ALMGTR
Package Marking
Operating Range
Package
Lead Finish
953A with Pb-Free bar-line
indicator
Industrial
16-Pin QFN
Pb-Free, NiPdAu
953A with Pb-Free bar-line
indicator
Industrial
16-Pin QFN
Pb-Free, NiPdAu
Note:
1. Tape and reel.
Pin Configuration
16-Pin QFN
Pin Description
Pin Number
Pin Name
Type
1
DIN
Data input
2, 3, 10, 11
VCC
Power supply
4
/DIN
Data input
5
VTHN
Input
6
SD
Open-collector TTL output with
internal 5kΩ pull-up resistor
Signal detect asserts high when the data input amplitude
rises above the threshold set by SDLVL.
7
/SD
Open-collector TTL output with
internal 5kΩ pull-up resistor
Inverted signal detect asserts low when the data input
amplitude rises above the threshold set by SDLVL.
8, 13, EP
GND
Ground
Device ground. Exposed pad must be soldered to PCB
ground for proper electrical and thermal performance.
9
/DOUT
CML output
Complementary data output.
12
DOUT
CML output
True data output.
14
SDLVL
Input
15
/EN
TTL input
default is high
16
VTHP
Input
August 29, 2013
Pin Function
True data input with 50Ω resistor to VCC.
Positive power supply.
Complementary data input with 50Ω resistor to VCC.
/DIN DC threshold adjustment pin.
Signal detect level set: A resistor from this pin to VCC set the
threshold for the data input amplitude at which SD asserts.
Enable: Deasserts true data output when high.
DIN DC threshold adjustment pin.
2
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SY88953AL
Absolute Maximum Ratings(2)
Operating Ratings(3)
Supply Voltage (VCC) .................................... –0.5V to +4.0V
Data Input Voltage
(DIN, /DIN) ...................................... (VCC–1.0V) to (VCC+0.5V)
Data Output Voltage
(DOUT, /DOUT) ................................. (VCC–1.0V) to (VCC+0.5V)
/EN Voltage ........................................................... 0V to VCC
SD, /SD Current ............................................................ 5mA
SDLVL Voltage ......................................... (VCC–1.3V) to VCC
Storage Temperature (TS) ......................... –65°C to +150°C
Supply Voltage (VCC) .................................... +3.0V to +3.6V
Ambient Temperature (TA) .......................... –40°C to +85°C
Junction Temperature (TJ) ........................ –40°C to +120°C
(4)
Junction Thermal Resistance
QFN-16 (θJA) Still-Air ......................................... 59°C/W
QFN-16 (θJB) Still-Air ......................................... 32°C/W
DC Electrical Characteristics(5)
VCC = 3.0V to 3.6V; RLOAD = 50Ω to VCC; TA = –40°C to +85°C, typical values at VCC = 3.3V; TA = 25°C.
Symbol
Parameter
Condition
Min.
ICC
Power supply current
No output load
VSDLVL
SDLVL voltage
VIH
/EN input HIGH voltage
VIL
/EN input LOW voltage
IIH
/EN input HIGH current
VIN = VCC
IIL
/EN input LOW current
VIN = 0.5V
VOH
SD, /SD output HIGH level
VOL
SD, /SD output LOW level
IOL = +2mA
VOH
Output HIGH voltage
50Ω to VCC output load
VCC−0.02
VOL
Output LOW voltage
50Ω to VCC output load
VCC−0.40
VOFFSET
Differential output offset
ZO
Single-ended output impedance
ZIN
Single-ended input impedance
Typ.
Max.
Units
62
85
mA
VCC
V
VCC−1.3
2.0
V
0.8
V
20
μA
−0.3
mA
2.4
V
45
0.5
V
VCC−0.005
VCC
V
VCC−0.35
VCC−0.24
V
±80
mV
55
Ω
50
Notes:
2. Exceeding the absolute maximum ratings may damage the device.
3. The device is not guaranteed to function outside its operating ratings.
4. Exposed pad must be soldered to PCB’s ground plane.
5. Specification for packaged product only
August 29, 2013
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SY88953AL
AC Electrical Characteristics
VCC = 3.0V to 3.6V; RLOAD = 50Ω to VCC; TA = –40°C to +85°C, typical values at VCC = 3.3V; TA = 25°C.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
HYS
SD Hysteresis
Electrical signal
2
6
8
dB
PSRR
Power supply rejection ratio
35
tOFF
SD, /SD release time
0.1
0.5
μs
tON
SD, /SD assert time
0.2
0.5
μs
tr/tf
Output rise/fall time
25
35
ps
VID
Differential input voltage swing
1800
mVPP
VOD
Differential output voltage swing
800
mVPP
VSR
SD sensitivity range
50
mVPP
LOSAL
Low LOS assert level
RLOSLVL = 10kΩ, Note 6
11
mVPP
LOSDL
Low LOS de-assert level
RLOSLVL = 10kΩ, Note 6
17
mVPP
HSYL
Low LOS hysteresis
RLOSLVL = 10kΩ, Note 7
3.5
dB
LOSAM
Medium LOS assert level
RLOSLVL = 5kΩ, Note 6
17
mVPP
LOSDM
Medium LOS de-assert level
RLOSLVL = 5kΩ, Note 6
26
mVPP
HSYM
Medium LOS hysteresis
RLOSLVL = 5kΩ, Note 7
3.5
dB
LOSAH
High LOS assert level
RLOSLVL = 100Ω, Note 6
45
mVPP
LOSDH
High LOS de-assert level
RLOSLVL = 100Ω, Note 6
68
mVPP
HSYH
High LOS hysteresis
RLOSLVL = 100Ω, Note 7
3.5
dB
S21
Single-ended small-signal gain
16
22
dB
AOV(Diff)
Differential voltage gain
22
28
dB
B-3dB
3dB Bandwidth
7.5
GHz
VID ≥ 50mVPP
5
600
700
5
dB
Notes:
6. See “Typical Operating Characteristics” for the graph that demonstrates how to choose a particular RLOSLVL for a particular LOS assert and its
associated de-assert amplitude.
7. This specification defines electrical hysteresis as 20log(LOS de-assert/LOS assert). The ratio between optical hysteresis and electrical hysteresis is
found to vary between 1.5 and 2, depending on the level of received power and ROSA characteristics.
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SY88953AL
Typical Operating Characteristics
10.7Gbps, VIN = 5mVPP, VTH Open (20ps/div)
10.7Gbps, VIN = 10mVPP, VTH Open (20ps/div)
10.7Gbps, VIN = 20mVPP, VTH = 1.0V (20ps/div)
10.7Gbps, VIN = 20mVPP, VTH = 1.5V (20ps/div)
SY88953AL LOSA, LOSD vs. RLOSlvl
SY88953AL Hysteresis vs. RLOSlvl
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SY88953AL
Functional Diagram
The SY88953AL’s ground pins should be connected to
the circuit board ground. Use multiple PCB vias close to
the part to connect to ground. Avoid long, inductive runs
that can degrade performance.
Design Procedure
Layout and PCB Design
Because the SY88953AL is a high-frequency component,
performance can be largely determined by the board
layout and design. A common problem with high-gain
amplifiers is the feedback from large swing outputs to the
input via the power supply.
August 29, 2013
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SY88953AL
Threshold Adjustment
The SY88953AL’s duty cycle can be controlled by forcing
an offset at either input using VTHP or VTHN. Typically, only
one of the inputs is required to be adjusted, depending on
the required direction of the pulse width adjustment. The
SY88953AL implements current source based offset
control of the inputs. The Typical Operating
Characteristics section shows the offset applied to the
input for a given VTH voltage. This feature is disabled by
simply setting VTH to GND.
Functional Description
The SY88953AL high-speed limiting post amplifier
operates from a single +3.3V power supply over
temperatures from –40°C to +85°C. Signals with data
rates up to 10.7Gbps and as small as 5mVPP can be
amplified. Figure 1 shows the allowed input voltage
swing. The SY88953AL generates SD and /SD outputs.
SDLVL sets the sensitivity of the input amplitude
detection. The SY88953AL also includes an input
threshold adjustment to correct pulse width distortion.
Output Buffer
The SY88953AL’s CML output buffer is designed to drive
50Ω lines. The output buffer requires appropriate
termination for proper operation. An external 50Ω resistor
to VCC for each output pin provides this. Figure 3 shows a
simplified schematic of the output stage and includes an
appropriate termination method. Of course, driving a
downstream device that is internally terminated with 50Ω
to VCC eliminates the need for external termination. As
noted in the previous section, the amplifier outputs
typically 700mVPP waveforms across 25Ω total loads. The
output buffer thus switches typically 16mA tail-current.
Figure 1. VIS and VID Definitions
Input Amplifier/Buffer
Figure 2 shows a simplified schematic of the
SY88953AL’s input stage. The high-sensitivity of the
input amplifier allows signals as small as 5mVPP to be
detected and amplified. The input amplifier allows input
signals as large as 1800mVPP. Input signals are linearly
amplified with a typical differential voltage gain of 28dB.
Because it is a limiting amplifier, the SY88953AL outputs
typically 700mVPP voltage-limited waveforms for input
signals that are greater than 32mVPP. Applications
requiring the SY88953AL to operate with high-gain
should have the upstream TIA placed as close as
possible to the SY88953AL’s input pins to ensure the
best performance of the device.
Figure 3. Output Structure
Signal-Detect
The SY88953AL generates chatter-free signal-detect (SD
and /SD) open-collector TTL outputs with internal 5kΩ
pull-up resistors as shown in Figure 4. SD is used to
determine that the input amplitude is large enough to be
considered a valid input. SD asserts high if the input
amplitude rises above the threshold set by SDLVL and
deasserts low otherwise. /SD is the complementary
output of SD. /SD asserts low if the input amplitude rises
Figure 2. Input Structure
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SY88953AL
above the threshold set by SDLVL and deasserts high
otherwise. /SD can be fed back to the enable (/EN) input
to maintain output stability under a loss of signal
condition. /EN deasserts the true output signal without
removing the input signals. Typically 6dB SD hysteresis
is provided to prevent chattering.
Figure 5. SDLVL Setting Circuit
Figure 4. SD, /SD Output Structure
Hysteresis
The SY88953AL provides typically 6dB SD electrical
hysteresis. By definition, a power ratio measured in dB is
2
10log(power ratio). Power is calculated as V IN/R for an
electrical signal. Hence the same ratio can be stated as
20log(voltage ratio). While in linear mode, the electrical
voltage input changes linearly with the optical power and
hence the ratios change linearly. Therefore, the optical
hysteresis in dB is half the electrical hysteresis in dB
given in the datasheet. The SY88953AL provides
typically 3dB SD optical hysteresis. As the SY88953AL is
an electrical device, this datasheet refers to hysteresis in
electrical terms. With 6dB SD hysteresis, a voltage factor
of two is required to assert or de-assert SD.
Signal-Detect Level Set
A programmable signal-detect level set pin (SDLVL) sets
the threshold of the input amplitude detection.
Connecting an external resistor between VCC and SDLVL
sets the voltage at SDLVL. This voltages ranges from VCC
to VCC−1.3V. The external resistor creates a voltage
divider between VCC and VCC−1.3V as shown in Figure 5.
If desired, an appropriate external voltage may be applied
rather than using a resistor. The smaller the external
resistor, implying a smaller voltage difference from SDLVL
to VCC, the smaller the SD sensitivity. Hence, larger input
amplitude is required to assert SD. The Typical Operating
Characteristics section shows the relationship between
the input amplitude detection sensitivity and the SDLVL
voltage.
August 29, 2013
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SY88953AL
Package Information(8)
PCB Thermal Consideration for 16-Pin QFN Package
(Always solder, or equivalent, the exposed pad to the PCB)
Note:
8. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2013 Micrel, Incorporated.
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