SY88992L
3.3V, 4.25Gbps VCSEL Driver
General Description
Features
The SY88992L is a single supply 3.3V, low power
consumption, small-form factor VCSEL driver ideal for
use in datacom applications; Ethernet, GbE (Gigabit
Ethernet), and FC (Fibre Channel) applications that
operate from 100Mbps up to 4.25Gbps. The
modulation current is set by applying an external
voltage at the IM_SET pin. The driver features an
adjustable peaking option with variable amplitude and
duration to improve VCSEL edge response. The driver
can deliver modulation current up to 25mA and a
peaking current up to 35% of the modulation current.
This device is intended to be used with Micrel’s
MIC3001 Optical Transceiver Management IC, which
allows for both modulation and bias current control and
monitoring, APC (Automatic Power Control), and
temperature compensation.
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
• Up to 25mA modulation current
• Operates from 100Mbps to 4.25Gbps
• Peaking with variable duration option for better
VCSEL response
• Dual peaking, on the rise and falling edges
• Peaking current proportional to modulation current
• Easy modulation current setting
• Fully controllable with Micrel MIC3001
• Small (3mm x 3mm) 16 pin QFN package
Applications
• Multirate LAN, SAN applications up to 4.25Gbps:
Ethernet, GbE, FC
• SFF, SFP Modules
Markets
• Datacom
________________________________________________________________
Typical Application
January 2006
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SY88992L
Functional Block Diagram
Ordering Information(1)
Part Number
SY88992LMG
(2)
SY88992LMGTR
Package
Type
Operating
Range
Package Marking
Lead Finish
QFN-16
Industrial
992L with Pb-Free bar-line indicator
NiPdAu Pb-Free
QFN-16
Industrial
992L with Pb-Free bar-line indicator
NiPdAu Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = +25°C, DC Electricals only.
2. Tape and Reel.
Pin Configuration
16-Pin QFN
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SY88992L
Pin Description
Pin Number
Pin Name
Pin Function
2
DIN+
Non-Inverting Input Data. Internally terminated with 50Ω to a reference voltage.
3
DIN-
Inverting Input Data. Internally terminated with 50Ω to a reference voltage.
6
IP_SET1
Peaking Current Setting. Connect this pin to GND and keep pins 7 and 8 open to set
peaking-to-modulation current ratio to 5%. Combinations of the three pins, as shown
in table below, will set different ratios up to 35%.
7
IP_SET2
Peaking Current Setting. Connect this pin to GND and keep pins 6 and 8 open to set
peaking-to-modulation current ratio to 10%. Combinations of the three pins, as shown
in table below, will set different ratios up to 35%.
8
IP_SET3
Peaking Current Setting. Connect this pin to GND and keep pins 6 and 7 open to set
peaking-to-modulation current ratio to 20%. Combinations of the three pins, as shown
in table below, will set different ratios up to 35%.
10
MOD-
Inverted Modulation Current Output. Provides modulation current when input data is
negative.
11
MOD+
Non-Inverted Modulation Current Output. Provides modulation current when input
data is positive.
13
IM_SET
Modulation Current Setting. The modulation current is set by applying a 0V to 1.2V
voltage at this pin.
14
IPD_SET
Peaking Duration Setting. The peaking current duration is set by installing a resistor
between this pin and ground. The plot on page 6 shows peaking duration versus the
value of the resistor installed.
16
/EN
A low level signal applied to this pin will enable the output stage of the driver.
Internally pulled down to ground with 75kΩ resistor.
1, 4, 9, 12
GND
Ground. Ground and exposed pad must be connected to the plane of the most
negative potential.
5, 15
VCC
Supply Voltage. Bypass with a 0.1µF//0.01µF low ESR capacitor as close to VCC pin
as possible.
Truth Table
MOD+
(1)
DIN+
DIN-
/EN
MOD-
VCSEL Output
L
H
L
H
L
L
H
L
L
L
H
H
X
X
H
H
H
L
(2)
Notes:
1. IMOD = 0 when MOD+ = H.
2. Assuming a common anode VCSEL with its cathode tied to MOD+.
Peaking Current-to-Modulation Current Ratio Setting
IP/IMOD
0%
5%
10 %
15 %
20 %
25 %
30 %
35 %
IP_SET1
NC
GND
NC
GND
NC
GND
NC
GND
IP_SET2
NC
NC
GND
GND
NC
NC
GND
GND
IP_SET3
NC
NC
NC
NC
GND
GND
GND
GND
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SY88992L
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VIN) ........................... –0.5V to +4.0V
CML Input Voltage (VIN) .......... VCC–1.2V to VCC+0.5V
TTL Control Input Voltage (VIN) ...................0V to VCC
Lead Temperature (soldering, 20sec.) ........... +260°C
Storage Temperature (Ts) ............... –65°C to +150°C
Supply Voltage (VCC) .......................... +3.0V to +3.6V
Ambient Temperature (TA) ................ –40°C to +85°C
(3)
Package Thermal Resistance
QFN
(θJA) Still-air .............................................. 60°C/W
(ψJB) ......................................................... 33°C/W
DC Electrical Characteristics
TA = -40°C to 85°C and VCC = 3.0V to 3.6V, unless otherwise noted. Typical values are at: VCC = 3.3V, TA = 25°C,
(4)
IMOD = 13mA
Symbol
Parameter
ICC
Power Supply Current
(4)
Condition
Min
Max
Units
Peaking not used
57
95
mA
Maximum peaking used
70
110
mA
25
mA
100
µA
IMOD
Modulation Current
AC-coupled
IMOD_OFF
Modulation OFF Current
Current at MOD+ and MOD- when
the part is disabled
VMOD_MIN
Minimum Voltage required at the
driver output (headroom) for proper
operation
1.5
RIN
Input Resistance (DIN+-to-DIN-)
90
VID
Differential Input Voltage Swing
VIM_SET
Voltage Range on IM_SET
VIL
/EN Input Low
VIH
Typ
3
V
100
200
(4)
IMOD range 3mA – 25mA
/EN Input High
2
Input Impedance at /EN
110
Ω
2400
mVPP
1.2
V
0.8
V
V
75
kΩ
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is
not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings
conditions for extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package Thermal Resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the PCB. θJB
uses a 4-layer and θJA in still air unless otherwise stated.
4. IMOD is defined as the current at the output of the driver. That current splits between the pull-up network at the output and the VCSEL. For a
nominal pull-up resistor of 75Ω at the output of the driver and a nominal 50Ω VCSEL equivalent resistor, 60% of that current goes to the
VCSEL.
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SY88992L
AC Electrical Characteristics
TA = -40°C to +80°C and VCC = 3.0 to 3.6V, unless otherwise noted. Typical values are at VCC = 3.3V, TA = 25°C,
(5)
IMOD = 13mA , and AC-coupled 50Ω load to ground with 75Ω pull-up (see Figure below).
Symbol
tOFF
(6)
(7)
tON
tr
tf
(IP / IMOD)
Parameter
Condition
Min
Data Rate
NRZ
0.1
Turn OFF Time
50Ω load
Turn ON Time
Output Current Rise Time
Output Current Fall Time
Typ
Max
Units
4.25
Gbps
1
1.5
ns
50Ω load
1.8
2.5
ns
20% to 80%, IMOD = 13mA, no
peaking, 50Ω load
65
95
ps
20% to 80%, IMOD = 13mA,
IP/IMOD=20%, RIPD=1.5kΩ
60
75
ps
20% to 80%, IMOD = 13mA, no
peaking, 50Ω load
65
95
ps
20% to 80%, IMOD = 13mA,
IP/IMOD=20%, RIPD=1.5kΩ
60
75
ps
Total Jitter
@ 2.5Gbps data rate, 50Ω load
30
psPP
Pulse-Width Distortion
50Ω load
20
ps
Max
Maximum Peaking Current-toModulation Current Ratio
tP
Peaking Current Duration
(8)
IMOD = 13mA, RIPD_SET = 0Ω
35
%
150
ps
Notes:
5. IMOD is defined as the current at the output of the driver. That current splits between the pull-up network at the output and the VCSEL. For a
nominal pull-up resistor of 75Ω at the output of the driver and a nominal 50Ω VCSEL equivalent resistor, 60% of that current goes to the
VCSEL.
6. Turn-OFF time is defined as the delay between the time the signal at /EN rises to 50% of its amplitude and the time when the output of the
driver reaches 10% of its steady-state amplitude.
7. Turn-ON time is defined as the delay between the time the signal at /EN falls to 50% of its amplitude and the time when the output of the
driver reaches 90% of its steady-state amplitude.
8. The peaking current duration is the time between the start of the peaking current, which is the same as the start of the modulation current
transition, and the time when the peaking current reaches its maximum, i.e., the top of the peak.
Test Circuit
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SY88992L
Typical Operating Characteristics
TA = +25°C and VCC = 3.3V, unless otherwise noted.
IMOD = 0mA
RIPD_SET (kΩ)
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SY88992L
Typical Waveforms
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SY88992L
Peaking Variation with IP/IMOD Ratio and Peaking Duration
Increasing Peaking Percentage
As it can be seen on the set of electrical waveforms below, the amplitude of the peak increases with the peakingto-modulation current ratio and the width of the peak increases with peaking duration.
Increasing Peaking Duration
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SY88992L
Input and Output Stages
Figure 1b. Simplified Output Stage
Figure 1a. Simplified Input Stage
Interfacing the Input to Different Logic Drivers
Figure 2b. AC-Coupling to CML Driver
Figure 2a. AC-Coupling to LVPECL Driver
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SY88992L
and almost all the modulation current goes into the
VCSEL. However, using the inductor alone will cause
signal distortion. To avoid this, a combination of
resistors and inductors can be used, as shown on
figure 3. In this case, the headroom of the driver is
VCC–R1 x αIMOD, where αIMOD is the portion of the
modulation current that goes through the pull-up
network. For instance, if a modulation current out of
the driver of 25mA is considered, with a pull-up
resistor of 75Ω, and the VCSEL with the damping
resistor total resistance is 50Ω, then the modulation
current will split; 10mA to the pull-up resistor and
15mA to the laser. The headroom for the driver will be
VCC–75 x 10 = VCC–750mV which is way higher than
the minimum voltage required for the output stage of
the driver to operate properly.
Driver’s Special Features
The SY88992L features a peaking current of
programmable amplitude and duration on both the
rising and the falling edges. The amplitude of the
peaking current is adjustable in steps of 5% of the
modulation current from 0% to 35%. As shown in the
table on page 3, the ratio between the peaking current
and the modulation current (IP/IMOD) can be
programmed by connecting pin 6 (IP_SET1) and/or pin
7 (IP_SET2) and/or pin 8 (IP_SET3) to ground. When
all these three pins are left open, there is no peaking
(ratio 0%). When they’re all connected to ground the
ratio is maximum (35%).
For each family of VCSELs used with the driver, the
user must try many combinations in order to get the
best response for the VCSEL. The peaking current
duration can be tuned by installing a resistor between
pin 14 and ground; 0Ω provides maximum duration
and 3kΩ or higher provides the minimum duration. The
combined features will improve the VCSEL response
for a better optical signal quality. The electrical eye
diagrams on page 8 show how the signal changes as
the peaking-to-modulation current varies.
The coupling capacitor creates a low-frequency cutoff
in the circuit. Therefore, a proper coupling capacitor
value must be chosen to accommodate different data
rates in the application. If the value of the capacitor is
too high, it may cause problems in high data rate
applications. If its value is too small, it won’t be able to
hold a constant charge between the first bit and the
last bit in a long string of identical bits in low data rate
application. Both cases lead to higher patterndependent jitter in the transmitter signal. 0.1µF is
found to be good for applications from 155Mbps to
4.25Gbps.
Application Hints
The typical application section on the front page shows
how to connect the driver to the VCSEL single-ended.
To improve transition time and VCSEL response, the
VCSEL can be driven differentially, as shown in Figure
3. Driving the VCSEL differentially will also minimize
the cross talk with the rest of the circuitry on the board,
especially with the receiver.
The driver is always AC-coupled to the VCSEL and the
headroom of the driver is determined by the pull-up
network at the output. In Figure 3, the modulation
current out of the driver is split between the pull-up
network and the VCSEL. If, for example, the total pullup resistor is twice the sum of the damping resistor
and VCSEL equivalent series resistance, only two
thirds (2/3) of the modulation current will be used by
the VCSEL. Therefore, to maximize the modulation
current going through the VCSEL, the total pull-up
resistors should be kept as high as possible. One
solution consists of using an inductor alone as pull-up,
creating a high impedance path for the modulation
current and zero ohm (0Ω) path for the DC current.
This offers a headroom equal to VCC for the driver
January 2006
Figure 3. Driving a Common Anode VCSEL Differentially
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SY88992L
Package Information
16-Pin (3mm x 3mm) QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel
for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended
for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2006 Micrel, Incorporated.
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