TC14433/A
3-1/2 Digit, Analog-to-Digital Converter
Features:
Description
•
•
•
•
•
•
•
•
•
•
The TC14433 is a low-power, high-performance,
monolithic CMOS 3-1/2 digit A/D converter. The
TC14433 combines both analog and digital circuits on
a single IC, thus minimizing the number of external
components.
Accuracy: ±0.05% of Reading ±1 Count
Two Voltage Ranges: 1.999V and 199.9 mV
Up to 25 Conversions Per Second
ZIN > 1000M Ohms
Single Positive Voltage Reference
Auto-Polarity and Auto-Zero
Overrange and Underrange Signals Available
Operates in Auto-Ranging Circuits
Uses On-Chip System Clock or External Clock
Wide Supply Range: ±4.5V to ±8V
This dual slope A/D converter provides automatic
polarity and zero correction with the addition of two
external resistors and two capacitors. The full scale
voltage range of this ratiometric IC extends from
199.9 millivolts to 1.999 volts. The TC14433 can
operate over a wide range of power supply voltages,
including batteries and standard 5-volt supplies.
Applications:
•
•
•
•
•
•
The TC14433A features improved performance over
the industry standard TC14433. Rollover, which is the
measurement of identical positive and negative
signals, is specified to have the same reading within
one count for the TC14433A. Power consumption of
the TC14433A is typically 4 mW, approximately onehalf that of the industry standard TC14433.
Portable Instruments
Digital Voltmeters
Digital Panel Meters
Digital Scales
Digital Thermometers
Remote A/D Sensing Systems
The TC14433/A is available in 24-Pin PDIP, 24-Pin
SOIC (TC14433 device only), and 28-Pin PLCC
packages.
Package Type
28-Pin PLCC
VAG
NC
VDD
3
2
1
28 27 26
Q2
VREF
4
Q3
VX
24-Pin PDIP (Wide)
24-Pin SOIC (Wide)
VAG
1
24 VDD
VREF
2
23 Q3
VX
3
22 Q2
R1
4
21 Q1
R1/C1
5
20 Q0
C1
6
19 DS1
CO1 9
21 DS2
7
18 DS2
CO2 10
20 DS3
8
17 DS3
DU 11
9
16 DS4
VEE 12
© 2008 Microchip Technology Inc.
13 VSS
22 NC
19 DS4
12 13 14 15 16 17 18
Note 1:
2:
OR
14 EOC
TC14433/A
NC 8
EOC
CLK0 11
23 DS1
NC
15 OR
C1 7
VSS
CLK1 10
24 Q0
VEE
DU
R1/C1 6
CLK0
CO2
25 Q1
CLK1
CO1
TC14433/A
R1 5
NC = No internal connection (In 28-Pin PLCC).
24-Pin SOIC (Wide) package, only for TC14433
device.
DS21394D-page 1
TC14433/A
Typical Application
MCP1525
+5V
VIN
20 kΩ
VOUT
1 µF
VSS
1 µF
-5V
+5V
300
kΩ
RC
VX
0.1 µF
11 10 2 12 24
23
22
21
4
20
5 TC14433
6
13
1
0.1 µF**
0.1 µF**
7
8
-5V
-5V
14013B
*R1 = 470 kΩ for 2V Range
*R1 = 27 kΩ for 200 mV Range
**Mylar Capacitor
DS4
DS3
DS2
DS1
Segment
Resistors
150Ω (7)
9
10
11
12
13
4543B 14
15
8 6 7
9
14
15 19 18 17 16
7
6
5
4
3
2
1
10
11
12
13
14
15
16
1413
-5V
-5V
-5V
6
5 S 1
Q
3 D
2
C RQ
4
8
9 D S Q 13
11 C Q 12
R
710 14
-5V
+5V
16
4
2
3
5
3
1
R1*
DS21394D-page 2
+5V
0.1 µF
+5V
Minus Sign
f g e d c b a
200Ω
MPS-A12 Plus Sign
-5V
110Ω
51 kΩ
Common
Anode Led
+5V
Display
50 µF
0.1 µF
MPS-A12
(4)
-5V
© 2008 Microchip Technology Inc.
TC14433/A
1.0
ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. These are stress ratings only and functional
operation of the device at these or any other conditions
above those indicated in the operation sections of the
specifications is not implied. Exposure to Absolute
Maximum Rating conditions for extended periods may
affect device reliability.
Absolute Maximum Ratings†
Supply Voltage (VDD – VEE) ................... -0.5V to +18V
Voltage on Any Pin:
Reference to VEE .....................-0.5V to (VDD + 0.5)
DC Current, Any Pin: ....................................... ±10 mA
Power Dissipation (TA ≤ 70°C):
Plastic PLCC ................................................. 1.0W
Plastic PDIP.............................................. 940 mW
SOIC ......................................................... 940 mW
Operating Temperature Range ............ -40°C to +85°C
Storage Temperature Range .............. -65°C to +160°C
TC14433/A ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise specified, VDD = +5V, VEE = -5V, C1 = 0.1 µF, (Mylar), C0 = 0.1 µF,
RC = 300 kΩ, R1 = 470 kΩ @ VREF = 2V, R1 = 27 kΩ @ VREF = 200 mV, TA = +25°C.
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Units
SYE
-1
—
+1
—
—
—
Counts
Test Conditions
Analog Input
Rollover Error (Positive) and
Negative Full Scale
Symmetry
Linearity Output Reading
(Note 1)
NL
Stability Output Reading
(Note 2)
SOR
Zero Output Reading
Bias Current: Analog Input
Reference Input
Analog Ground
Common mode Rejection
Note 1:
2:
3:
-0.05
+0.05
+0.05
—
—
—
%rdg
VREF = 2V
-1 count
—
+1 count
—
—
—
%rdg
VREF = 200 mV
—
—
2
—
—
—
LSD
VX = 1.99V,
VREF = 2V
—
—
3
—
—
—
LSD
VX = 199 mV,
VREF = 200 mV
VX = 0V, VREF = 2V
ZOR
—
0
0
—
—
—
LSD
IIN
—
±20
±100
—
—
—
pA
—
±20
±100
—
—
—
pA
—
±20
±100
—
—
—
pA
—
65
—
—
—
—
dB
CMRR
200 mV Full Scale
VIN -VIN = +VIN
VX = 1.4V, VREF = 2V,
FOC = 32 kHz
Accuracy – The accuracy of the meter at full scale is the accuracy of the setting of the reference voltage. Zero is
recalculated during each conversion cycle. The meaningful specification is linearity. In other words, the deviation from
correct reading for all inputs other than positive full scale and zero is defined as the linearity specification.
The LSD stability for 200 mV scale is defined as the range that the LSD will occupy 95% of the time.
Pin numbers refer to 24-pin PDIP.
© 2008 Microchip Technology Inc.
DS21394D-page 3
TC14433/A
TC14433/A ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise specified, VDD = +5V, VEE = -5V, C1 = 0.1 µF, (Mylar), C0 = 0.1 µF,
RC = 300 kΩ, R1 = 470 kΩ @ VREF = 2V, R1 = 27 kΩ @ VREF = 200 mV, TA = +25°C.
Parameter
Symbol
Min
Typ
Max
Min
Typ
Max
Units
Test Conditions
Output Voltage
(Pins 14 to 23) (Note 3)
VOL
—
0
0.05
—
—
0.05
V
VSS = 0V, “0” Level
—
-5
-4.95
—
—
-4.95
V
VSS = -5V, “0” Level
Output Voltage
(Pins 14 to 23) (Note 3)
VOH
4.95
5
—
4.95
—
—
V
VSS = 0V, “1” Level
4.95
5
—
4.95
—
—
V
VSS = -5V, “1” Level
Output Current
(Pins 14 to 23)
IOH
-0.2
-0.36
—
-0.14
—
—
mA
VSS = 0V, VOH = 4.6V
Source
- 0.5
-0.9
—
-0.35
—
—
mA
VSS = -5V, VOH = 5V
Source
0.51
0.88
—
0.36
—
—
mA
VSS = 0V, VOL = 0.4V
Sink
1.3
2.25
—
0.9
—
—
mA
VSS = -5V,
VOL = -4.5V Sink
RC = 300 kΩ
Digital
Output Current
(Pins 14 to 23)
IOL
Clock Frequency
fCLK
—
66
—
—
—
—
kHz
Input Current -DU
IDU
—
±0.00
001
±0.3
—
—
±1
µA
Power
Quiescent Current:
TC14433A:
IQ
Quiescent Current:
TC14433
Supply Rejection
Note 1:
2:
3:
PSRR
—
—
—
—
—
—
—
VDD to VEE, ISS = 0
—
0.4
2
—
—
3.7
mA
VDD = 5, VEE = -5
—
1.4
4
—
—
7.4
mA
VDD = 8, VEE = -8
—
—
—
—
—
—
—
VDD to VEE, ISS = 0
—
0.9
2
—
—
3.7
mA
VDD = 5, VEE = -5
—
1.8
4
—
—
7.4
mA
VDD = 8, VEE = -8
—
0.5
—
—
—
—
mV/V
VDD to VEE, ISS = 0,
VREF = 2V,
VDD = 5, VEE = -5
Accuracy – The accuracy of the meter at full scale is the accuracy of the setting of the reference voltage. Zero is
recalculated during each conversion cycle. The meaningful specification is linearity. In other words, the deviation from
correct reading for all inputs other than positive full scale and zero is defined as the linearity specification.
The LSD stability for 200 mV scale is defined as the range that the LSD will occupy 95% of the time.
Pin numbers refer to 24-pin PDIP.
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +5V and VEE = -5V.
Parameters
Sym
Min
Typ
Max
Units
Operating Temperature Range
TA
-40
—
+85
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 24LD PDIP
θJA
—
60.5
—
°C/W
Thermal Resistance, 24LD CERDIP
θJA
—
N/A
—
°C/W
Thermal Resistance,24LD SOIC Wide
θJA
—
70
—
°C/W
Thermal Resistance, 28LD PLCC
θJA
—
61.2
—
°C/W
Conditions
Temperature Ranges
Note
Thermal Package Resistances
Note:
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
DS21394D-page 4
© 2008 Microchip Technology Inc.
TC14433/A
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise specified, VDD = +5V, VEE = -5V, C1 = 0.1 µF, (Mylar), C0 = 0.1 µF, RC = 300 kΩ, R1 = 470 kΩ @ VREF = 2V,
R1 = 27 kΩ @ VREF = 200 mV, TA = +25°C.
Typical Quiescent Power Supply Current vs.Temp.
4
IQ - QUIESCENT CURRENT (mA)
ROLLOVER ERROR (IN LSD)
AT FULL SCALE
(PLUSE COUNT LESS MINUS COUNT)
Typical Rollover Error vs. Power Supply Skew
4
3
2
1
0
-1
-2
Note: Rollover Error is the Difference in Output
Reading for the same Analog Input Switched
from Positive to Negative.
-3
-4
-3
-2
0
-1
1
2
3
4
3
VEE = -8V
VDD = +8V
2
1
VEE = -5V
VDD = +5V
-40
0
-20
(VDD I-IVEE I) - SUPPLY VOLTAGE SKEW (V)
FIGURE 2-1:
Supply Skew
Rollover Error vs. Power
40
60
80
100
Typical P-Channel Sink Current at VDD – VSS = 5 Volts
5
-3
4
ID - SINK CURRENT (mA)
ID - SINK CURRENT (mA)
20
FIGURE 2-4:
Quiescent Power Supply
Current vs. Ambient Temperature.
Typical N-Channel Sink Current at VDD – VSS = 5 Volts
-40°C
3
+25°C
2
+85°C
1
0
0
1
2
3
4
5
-40°C
-2
+25°C
+85°C
-1
0
0
-1
VDS - DRAIN TO SOURCE VOLTAGE (VDC)
FIGURE 2-2:
Sink Current at VDD = 5V.
-2
-3
-4
-5
VDS - DRAIN TO SOURCE VOLTAGE (VDC)
FIGURE 2-5:
Typical Clock Frequency vs. Resistor (RC)
Sink Current at VDD = 5V.
Typical % Change fo Clock Frequency vs. Temp.
4
Note: ±5% Typical Variation over
Supply Voltage Range
of ±4.5V to ±8V
1M
100k
ICLK - CLOCK FREQUENCY
(% CHANGE)
ICLK - CLOCK FREQUENCY (Hz)
0
TA - TEMPERATURE (°C)
±5V Supply
3
2
1
0
±8V Supply
-1
-2
Normalized at 25°C
-3
-4
10k
10kΩ
100kΩ
1MΩ
RC - CLOCK FREQUENCY RESISTOR
-40
-20
0
20
40
60
80
TA - TEMPERATURE (°C)
CONVERSION RATE =
CLOCK FREQUENCY
±1.5%
16,400
CONVERSION RATE =
CLOCK FREQUENCY
±1.5%
16,400
MULTIPLEX RATE =
CLOCK FREQUENCY
80
MULTIPLEX RATE =
CLOCK FREQUENCY
80
FIGURE 2-3:
Resistor (RC)
Clock Frequency vs.
© 2008 Microchip Technology Inc.
FIGURE 2-6:
% Change to Clock
Frequency vs. Ambient Temperature.
DS21394D-page 5
TC14433/A
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
Pin No.
24-Pin PDIP,
SOIC
Pin No.
28-Pin
PLCC
Symbol
Description
1
2
VAG
This is the analog ground. It has a high input impedance. The pin determines
the reference level for the unknown input voltage (VX) and the reference
voltage (VREF).
2
3
VREF
Reference voltage – Full scale output is equal to the voltage applied to VREF.
Therefore, full scale voltage of 1.999V requires 2V reference and 199.9 mV
full scale requires a 200 mV reference. VREF functions as system reset also.
When switched to VEE, the system is reset to the beginning of the
conversion cycle.
3
4
VX
The unknown input voltage (VX) is measured as a ratio of the reference
voltage (VREF) in a ratiometric A/D conversion.
4
5
R1
This pin is for external components used for the integration function in the
dual slope conversion. Typical values are 0.1 µF (Mylar) capacitor for C1.
5
6
R1/C1
6
7
C1
7
9
CO1
These pins are used for connecting the offset correction capacitor. The
recommended value is 0.1 µF.
8
10
CO2
These pins are used for connecting the offset correction capacitor. The
recommended value is 0.1 µF.
9
11
DU
Display update input pin. When DU is connected to the EOC output, every
conversion is displayed. New data will be strobed into the output latches
during the conversion cycle if a positive edge is received on DU, prior to the
ramp down cycle. When this pin is driven from an external source, the
voltage should be referenced to VSS.
10
12
CLK1
Clock input pins. The TC14433 has its own oscillator system clock.
Connecting a single resistor between CLK1 and CLK0 sets the clock
frequency.
11
13
CLK0
A crystal or OC circuit may be inserted in lieu of a resistor for improved
CLK1, the clock input, can be driven from an external clock source, which
need only have standard CMOS output drive. This pin is referenced to VEE
for external clock inputs. A 300 kΩ resistor yields a clock frequency of about
66 kHz. See Section 2.0 “Typical Performance Curves”. (Also see
Figure 5-3 for alternate circuits.)
12
14
VEE
Negative power current. Connection pin for the most negative supply. Please
note the current for the output drive circuit is returned through VSS. Typical
supply current is 0.8 mA.
13
16
VSS
Negative power supply for output circuitry. This pin sets the low voltage level
for the output pins (BCD, Digit Selects, EOC, OR). When connected to
analog ground, the output voltage is from analog ground to VDD. If
connected to VEE, the output swing is from VEE to VDD. The recommended
operating range for VSS is between the VDD -3 volts and VEE.
14
17
EOC
End of conversion output generates a pulse at the end of each conversion
cycle. This generated pulse width is equal to one half the period of the
system clock.
15
18
OR
DS21394D-page 6
R1 = 470 kΩ (resistor) for 2V full scale.
R1 = 27 kΩ (resistor) for 200 mV full scale. Clock frequency of 66 kHz gives
250 ms conversion time.
Overrange pin. Normally this pin is set high. When VX exceeds VREF the OR
is low.
© 2008 Microchip Technology Inc.
TC14433/A
TABLE 3-1:
PIN FUNCTION TABLE (CONTINUED)
Pin No.
24-Pin PDIP,
SOIC
Pin No.
28-Pin
PLCC
Symbol
Description
16
19
DS4
Digit select pin. The digit select output goes high when the respective digit is
selected. The MSD (1/2 digit turns on immediately after an EOC pulse).
17
20
DS3
The remaining digits turn on in sequence from MSD to LSD.
18
21
DS2
To ensure that the BCD data has settled, an inter digit blanking time of two
clock periods is included.
19
23
DS1
Clock frequency divided by 80 equals multiplex rate. For example, a system
clock of 60 kHz gives a multiplex rate of 0.8 kHz.
20
24
Q0
See Figure 5-4 for digit select timing diagram.
21
25
Q1
BCD data output pin. Multiplexed BCD outputs contain three full digits of
information during digit select DS2, DS3, DS4.
22
26
Q2
During DS1, the 1/2 digit, overrange, underrange and polarity information is
available.
23
27
Q3
Refer to the Truth Table 5-1.
24
28
VDD
Positive power supply. This is the most positive power supply pin.
—
1
NC
Not Used.
—
8
NC
Not Used.
—
15
NC
Not Used.
—
22
NC
Not Used.
© 2008 Microchip Technology Inc.
DS21394D-page 7
TC14433/A
4.0
DETAILED DESCRIPTION
The TC14433 CMOS IC becomes a modified dualslope A/D with a minimum of external components.
This IC has the customary CMOS digital logic circuitry,
as well as CMOS analog circuitry. It provides the user
with digital functions such as (counters, latches,
multiplexers), and analog functions such as
(operational amplifiers and comparators) on a single
chip. Refer to the Functional Block diagram, Figure 4-3.
Features of the TC14433/A include auto-zero, high
input impedances and auto-polarity. Low power
consumption and a wide range of power supply
voltages are also advantages of this CMOS device.
The system’s auto-zero function compensates for the
offset voltage of the internal amplifiers and comparators. In this “ratiometric system,” the output reading is
the ratio of the unknown voltage to the reference
voltage, where a ratio of 1 is equal to the maximum
count of 1999. It takes approximately 16,000 clock
periods to complete one conversion cycle. Each
conversion cycle may be divided into 6 segments.
Figure 4-1 shows the conversion cycle in 6 segments
for both positive and negative inputs.
Segment 1 – The offset capacitor (CO), which compensates for the input offset voltages of the buffer and
integrator amplifiers, is charged during this period.
However, the integrator capacitor is shorted. This
segment requires 4000 clock periods.
Segment 2 – During this segment, the integrator output
decreases to the comparator threshold voltage. At this
time, a number of counts equivalent to the input offset
voltage of the comparator is stored in the offset latches
for later use in the auto-zero process. The time for this
segment is variable and less than 800 clock periods.
Segment 3 – This segment of the conversion cycle is
the same as Segment 1.
Segment 4 – Segment 4 is an up going ramp cycle with
the unknown input voltage (VX as the input to the
integrator.
Figure 4-2
shows
the
equivalent
configuration of the analog section of the TC14433.
The actual configuration of the analog section is
dependent upon the polarity of the input voltage during
the previous conversion cycle.
C1
Buffer
–
i
End
Start
Time
Segment
Number
1
2
3
4
DS21394D-page 8
6
+
Integrator
–
+
Comparator
+
–
VX
Typical
Positive
Input Voltage
VX
FIGURE 4-1:
Pin 6.
5
VX
R1
Typical
Negative
Input Voltage
Integrator Waveforms at
FIGURE 4-2:
Equivalent Circuit Diagrams
of the Analog Section During Segment 4 of the
Timing Cycle
Segment 5 – This segment is a down-going ramp
period with the reference voltage as the input to the
integrator. Segment 5 of the conversion cycle has a
time equal to the number of counts stored in the offset
storage latches during Segment 2. As a result, the
system zeros automatically.
Segment 6 – This is an extension of Segment 5. The
time period for this portion is 4000 clock periods. The
results of the A/D conversion cycle are determined in
this portion of the conversion cycle.
© 2008 Microchip Technology Inc.
TC14433/A
20-23
Multiplexer
RC
10
11
CLK 1 CLK 0
Clock
16 -19
Latches
1s'
Q – Q3
BDC Data
DS 1 – DS 4
Digit Strobe
Polarity Detect
10s'
100s'
1,000s'
TC14433/A
15
Overflow
CMOS
Analog Subsystem
Control Logic
Display
Update
FIGURE 4-3:
End of
9 14
Conversion
DU EOC
4
5
R 1 R 1 /C
7
8
6
C 1 CO 1 CO 2
Integrator
2
1
3
OR Overrange
V REF Reference Voltage
V AG Analog Ground
VX
Analog Input
V DD = Pin 24
V SS = Pin 13
V EE = Pin 12
Offset
Functional Block Diagram.
© 2008 Microchip Technology Inc.
DS21394D-page 9
TC14433/A
5.0
TYPICAL APPLICATIONS
The typical application circuit is an example of a 3-1/2
digit voltmeter using the TC14433 with Commonanode displays. This system requires a 2.5V reference.
Full scale may be adjusted to 1.999V or 199.9 mV.
Input overrange is indicated by flashing a display. This
display uses LEDs with common anode digit lines.
Power supply for this system is shown as a dual ±5V
supply; however, the TC14433 will operate over a wide
voltage range
The circuit in Figure 5-1 shows a 3-1/2 digit LCD
voltmeter. The 14024B provides the low frequency
square wave signal drive to the LCD backplane. Dual
power supplies are shown here; however, one supply
may be used when VSS is connected to VEE. In this
case, VAG must be at least 2.8V above VEE.
When only segments b and c of the decoder are connected to the 1/2 digit of the display, 4, 0, 7 and 3
appear as 1.
The overrange indication (Q3 = 0 and Q0 = 1) occurs
when the count is greater than 1999; (e.g., 1.999V for
a reference of 2V) The underrange indication, useful for
auto-ranging circuits, occurs when the count is less
than 180; (e.g., 0.180V for a reference of 2V).
Note:
If the most significant digit is connected to
a display other than a “1” only, such as a
full digit display, segments other than b
and c must be disconnected. The BCD to
7-segment decoder must blank on BCD
inputs 1010 to 1111 (see Table 5-1).
DS21394D-page 10
TABLE 5-1:
TRUTH TABLE
Coded
Q
Condition
3
of MSD
Q
Q
Q
2
1
0
+0
1
1
1
0
-0
1
0
1
0
+0 UR
1
1
1
1
-0 UR
1
0
1
1
+1
0
1
0
0
-1
0
0
0
0
+1 OR
0
1
1
1
-1 OR
0
0
1
1
Note 1:
BDC to 7-Segment
Decoding
Blank
Blank
Blank
Blank
4–1
0–1
7–1
3–1
Hook up
only segments
b and c to MSD
Q3 – 1/2 digit, low for “1”, high for “0”.
Q2 – Polarity: “1” = positive, “0” = negative.
Q0 – Out of range condition exists if Q0 = 1.
When used in conjunction with Q3, the type
of out of range condition is indicated; i.e.,
Q3 = 0 → OR or Q3 = 1 → UR.
Figure 5-2 is an example of a 3-1/2 digit LED voltmeter
with a minimum of external components, (only 11
additional components). In this circuit, the 14511B
provides the segment drive and the 75492 or 1413
provides sink for digit current. Display is blanked during
the overrange condition.
© 2008 Microchip Technology Inc.
TC14433/A
0.1 µF
V+
C01 C02
MCP1525
VX
TC14433
VOUT
1 µF
20
kΩ
VREF
VDD VSS VEE EOE DU
+V
-V
14013B
D
CR
Q
RQ
1/4
14013B
D
CR
C
14024B
R
DS4
DS3
DS2
DS1
Q0
Q1
Q2
Q3
RC
14070B 1/4
+V
300 kΩ
14070B
1/2 Digit
Plus
Sign
Q
RQ
-V
R1 R1/C1 C1
VAG
VIN
VSS
470 kΩ 0.1 µF
-V 1/4 14070B
Minus
Sign
+V
BI D C B A Ph LD
14543B
BI D C B A Ph LD
BI D C B A Ph LD
+V
g f e d c b a
-V
14543B
g f e d c b a
+V
-V
14543B
g f e d c b a
+V
-V
+V
FIGURE 5-1:
3-1/2 Digit Voltmeter with LCD Display.
© 2008 Microchip Technology Inc.
DS21394D-page 11
TC14433/A
470 kΩ 0.1 µF 0.1 µF
+5V
VX
Input
MCP1525
VIN
VOUT
VSS
20kΩ
R1 R1 /C C1 C01 C02
VX
CLK1
VAG
CLK0
DU
OR
Q0
EOE
Q1
TC14433
Q2
VREF
300 kΩ
VSS
1 µF
Resitor Network
or Individual
Resistor*
A
B1
B
C I4511B
D
LT
LE
VSS VDD
+5V
VDD
VEE
R
a
b
c
d
e
f
g
RDP
DS4 DS3 DS2 DS1
RM
Alternate Overrange Circuit
with Separated LED
OR
1/6 75492
OR
1/7
1413
VEE**
(Minus)
RR
+5V
+5V
Minus
Control
Common
Cathode
Led Display
75492
OR
1413*
Digit Drivers
Note 1: For VREF = 2000V; V: 1.999V full scale.
2: For VREF = 200 mV; V: 199.9 mV full scale (change 470 kΩ to R = 27 kΩ and decimal point position.
3: Peak digit current for an eight displayed is 7 times the segment current:
*To increase segment current capability, add two 75491 ICs between 14511B and resistor network.
The use of the 1413 as digit driver increases digit current capability over the 75492.
**V can range between -2.8V and -11V.
FIGURE 5-2:
Display.
3-1/2 Digit LED Voltmeter with Low Component Count Using Common Cathode
(A) Crystal Oscillator Circuit
10
C1
11
C2
10
CLK1
TC14433
18 MΩ
(B) LC Oscillator Circuit
L
FIGURE 5-3:
DS21394D-page 12
TC14433
11
CLK0
47 kΩ
C
10 pF < C1 and C2 < 200 pF
C
CLK1
CLK0
1
f = -----------------2π LC
For L = 5 mH and C = 0.01 µF @ 22.5 kHz
Alternate Oscillator Circuits.
© 2008 Microchip Technology Inc.
TC14433/A
EOC
1/2 Clock Cycle
ª 16,400 Clock Cycles
Between EOC Pulses
18 Clock Cycles
DS1
1/2 Digit
(MSD)
2 Clock Cycles
DS2
DS3
DS4
LCD
FIGURE 5-4:
Digit Select Timing Diagram.
© 2008 Microchip Technology Inc.
DS21394D-page 13
TC14433/A
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
24-Lead PDIP
Example:
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
YYWWNNN
24-Lead SOIC (.300”)
Example:
XXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXX
YYWWNNN
28-Lead PLCC
Legend: XX...X
Y
YY
WW
NNN
e3
*
DS21394D-page 14
TC14433EOG^^
e3
0814256
Example:
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
Note:
TC14433EPG^^
e3
0814256
TC14433
e3
ELI^^
0814256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2008 Microchip Technology Inc.
TC14433/A
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