TC4426/TC4427/TC4428
1.5A Dual High-Speed Power MOSFET Drivers
Features:
General Description:
• High Peak Output Current: 1.5A
• Wide Input Supply Voltage Operating Range:
- 4.5V to 18V
• High Capacitive Load Drive Capability: 1000 pF in
25 ns (typical)
• Short Delay Times: 40 ns (typical)
• Matched Rise and Fall Times
• Low Supply Current:
- With Logic ‘1’ Input – 4 mA
- With Logic ‘0’ Input – 400 µA
• Low Output Impedance: 7
• Latch-Up Protected: Withstands 0.5A Reverse
Current
• Input Withstands Negative Inputs Up to 5V
• Electrostatic Discharge (ESD) Protected: 2.0 kV
• Space-saving 8-Pin MSOP and 8-Pin 6x5 DFN-S
Packages
The TC4426/TC4427/TC4428 are improved versions
of the earlier TC426/TC427/TC428 family of MOSFET
drivers. The TC4426/TC4427/TC4428 devices have
matched rise and fall times when charging and
discharging the gate of a MOSFET.
Applications:
These devices are highly latch-up resistant under any
conditions within their power and voltage ratings. They
are not subject to damage when up to 5V of noise
spiking (of either polarity) occurs on the ground pin.
They can accept, without damage or logic upset, up to
500 mA of reverse current (of either polarity) being
forced back into their outputs. All terminals are fully
protected against Electrostatic Discharge (ESD) up to
2.0 kV.
The TC4426/TC4427/TC4428 MOSFET drivers can
easily charge/discharge 1000 pF gate capacitances in
under 30 ns. These devices provide low enough
impedances in both the On and Off states to ensure the
MOSFET’s intended state is not affected, even by large
transients.
Other compatible drivers are the TC4426A/TC4427A/
TC4428A family of devices. The TC4426A/TC4427A/
TC4428A devices have matched leading and falling
edge input-to-output delay times, in addition to the
matched rise and fall times of the TC4426/TC4427/
TC4428 devices.
• Switch Mode Power Supplies
• Line Drivers
• Pulse Transformer Drive
Package Types
8-Pin MSOP/
PDIP/SOIC TC4426 TC4427 TC4428
NC
IN A
GND
IN B
1
8 NC
2 TC4426 7 OUT A
3 TC4427 6 VDD
4 TC4428 5 OUT B
NC
OUT A
VDD
OUT B
NC
OUT A
VDD
OUT B
8-Pin DFN-S* TC4426 TC4427 TC4428
NC 1
IN A 2
GND 3
IN B 4
EP
9
8
NC
NC
NC
7
OUT A
OUT A
OUT A
6
5
VDD
VDD
VDD
OUT B
OUT B
OUT B
* Includes Exposed Thermal Pad (EP); see Table 3-1.
2006-2014 Microchip Technology Inc.
DS20001422G-page 1
TC4426/TC4427/TC4428
Functional Block Diagram
Inverting
VDD
1.5 mA
300 mV
Output
Non-Inverting
Input
Effective
Input C = 12 pF
(Each Input)
4.7V
TC4426/TC4427/TC4428
GND
Note 1: TC4426 has two inverting drivers, while the TC4427 has two non-inverting
drivers. The TC4428 has one inverting and one non-inverting driver.
2: Ground any unused driver input.
DS20001422G-page 2
2006-2014 Microchip Technology Inc.
TC4426/TC4427/TC4428
1.0
ELECTRICAL
CHARACTERISTICS
† Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
Absolute Maximum Ratings †
Supply Voltage ................................................................+22V
Input Voltage, IN A or IN B .......... (VDD + 0.3V) to (GND – 5V)
Package Power Dissipation (TA +70°C)
DFN-S ..................................................................... Note 3
MSOP .....................................................................340 mW
PDIP .......................................................................730 mW
SOIC.......................................................................470 mW
Storage Temperature Range .........................-65°C to +150°C
Maximum Junction Temperature ................................. +150°C
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA = +25ºC with 4.5V VDD 18V.
Parameters
Sym.
Min.
Typ.
Max.
Units
Logic ‘1’, High Input Voltage
VIH
2.4
—
—
V
Logic ‘0’, Low Input Voltage
VIL
—
—
0.8
V
Input Current
IIN
-1.0
—
+1.0
µA
Conditions
Input
Note 2
0VVINVDD
Output
High Output Voltage
VOH
VDD – 0.025
—
—
V
DC Test
Low Output Voltage
VOL
—
—
0.025
V
DC Test
Output Resistance
RO
—
7
10
IOUT = 10 mA, VDD = 18V
Peak Output Current
IPK
—
1.5
—
A
VDD = 18V
Latch-Up Protection
Withstand Reverse Current
IREV
—
> 0.5
—
A
Duty cycle2%, t 300 µs
VDD = 18V
tR
—
19
30
ns
Figure 4-1
Fall Time
tF
—
19
30
ns
Figure 4-1
Delay Time
tD1
—
20
30
ns
Figure 4-1
Delay Time
tD2
—
40
50
ns
Figure 4-1
IS
—
—
—
—
4.5
0.4
mA
VIN = 3V (Both inputs)
VIN = 0V (Both inputs)
Switching Time (Note 1)
Rise Time
Power Supply
Power Supply Current
Note 1:
2:
3:
Switching times ensured by design.
For V temperature range devices, the VIH (Min) limit is 2.0V.
Package power dissipation is dependent on the copper pad area on the PCB.
2006-2014 Microchip Technology Inc.
DS20001422G-page 3
TC4426/TC4427/TC4428
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
Electrical Specifications: Unless otherwise noted, over operating temperature range with 4.5V VDD 18V.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Input
Logic ‘1’, High Input Voltage
VIH
2.4
—
—
V
Logic ‘0’, Low Input Voltage
VIL
—
—
0.8
V
Input Current
IIN
-10
—
+10
µA
High Output Voltage
VOH
VDD – 0.025
—
—
V
DC Test
Low Output Voltage
VOL
—
—
0.025
V
DC Test
Note 2
0VVINVDD
Output
Output Resistance
RO
—
9
12
IOUT = 10 mA, VDD = 18V
Peak Output Current
IPK
—
1.5
—
A
VDD = 18V
Latch-Up Protection
Withstand Reverse Current
IREV
—
>0.5
—
A
Duty cycle2%, t 300 µs
VDD = 18V
Rise Time
tR
—
—
40
ns
Figure 4-1
Fall Time
tF
—
—
40
ns
Figure 4-1
Delay Time
tD1
—
—
40
ns
Figure 4-1
Delay Time
tD2
—
—
60
ns
Figure 4-1
IS
—
—
—
—
8.0
0.6
mA
VIN = 3V (Both inputs)
VIN = 0V (Both inputs)
Switching Time (Note 1)
Power Supply
Power Supply Current
Note 1:
2:
Switching times ensured by design.
For V temperature range devices, the VIH (Min) limit is 2.0V.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V.
Parameters
Sym.
Min.
Typ.
Max.
Units
Specified Temperature Range (C)
TA
0
—
+70
°C
Specified Temperature Range (E)
TA
-40
—
+85
°C
Specified Temperature Range (V)
TA
-40
—
+125
°C
Conditions
Temperature Ranges
Maximum Junction Temperature
TJ
—
—
+150
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 8L-6x5 DFN-S
JA
—
33.2
—
°C/W
Thermal Resistance, 8L-MSOP
JA
—
206
—
°C/W
Thermal Resistance, 8L-PDIP
JA
—
125
—
°C/W
Thermal Resistance, 8L-SOIC
JA
—
155
—
°C/W
Package Thermal Resistances
DS20001422G-page 4
2006-2014 Microchip Technology Inc.
TC4426/TC4427/TC4428
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25ºC with 4.5V VDD 18V.
100
100
2200 pF
2200 pF
80
1500 pF
1500 pF
tFALL (nsec)
tRISE (nsec)
80
60
1000 pF
40
60
1000 pF
40
470 pF
470 pF
20
20
100 pF
100 pF
0
0
4
6
FIGURE 2-1:
Voltage.
8
10
14
12
VDD (V)
16
Rise Time vs. Supply
100
4
18
8
FIGURE 2-4:
Voltage.
tFALL (nsec)
10V
40
20
16
18
Fall Time vs. Supply
60
10V
15V
40
20
0
100
1000
0
100
10,000
1000
CLOAD (pF)
CLOAD (pF)
FIGURE 2-2:
Load.
Rise Time vs. Capacitive
FIGURE 2-5:
Load.
60
Propagation Delay (nsec)
C LOAD = 1000 pF
Time (nsec)
14
5V
15V
VDD = 17.5V
40
30
tFALL
20
10
–55 –35 –15
FIGURE 2-3:
Temperature.
12
VDD (V)
80
60
50
10
100
5V
80
tRISE (nsec)
6
tRISE
85
CLOAD = 1000 pF
VIN = 5V
tD2
tD1
2006-2014 Microchip Technology Inc.
6
105 125
Rise and Fall Times vs.
Fall Time vs. Capacitive
80
75
70
65
60
55
50
45
40
35
30
25
20
4
5
25 45 65
Temperature (˚C)
10,000
8
10
12
14
16
18
VDD (V)
FIGURE 2-6:
Supply Voltage.
Propagation Delay Time vs.
DS20001422G-page 5
TC4426/TC4427/TC4428
Note: Unless otherwise indicated, TA = +25ºC with 4.5V VDD 18V.
45
CLOAD = 1000 pF
55
VDD = 12V
50
45
tD2
40
35
30
tD1
25
CLOAD = 1000 pF
VIN = 5V
VDD = 18V
tD2
40
Delay Time (nsec)
Propagation Delay (nsec)
60
20
35
30
25
20
tD1
15
15
10
10
0
1
2
3
4
5
6
7
8
9
10
11
12
-55
-35
-15
Input Amplitude (V)
FIGURE 2-7:
Input Amplitude.
5
25
45
65
85
105 125
Temperature (ºC)
Propagation Delay Time vs.
FIGURE 2-10:
Temperature.
Propagation Delay Time vs.
4.0
3.5
Both Inputs = 1
IQUIESCENT (mA)
IQUIESCENT (mA)
V DD = 18V
1
3.0
Both Inputs = 1
2.5
Both Inputs = 0
0.1
4
6
8
FIGURE 2-8:
Voltage.
10
12
VDD
14
16
2.0
–55 –35 –15
18
Supply Current vs. Supply
FIGURE 2-11:
Temperature.
5
65
85
105 125
Supply Current vs.
25
25
20
20
Worst Case @ TJ = +150˚C
RDS(ON) (Ω)
Worst Case @ TJ = +150˚C
RDS(ON) (Ω)
25 45
TA (˚C)
15
Typical @ TA = +25˚C
10
15
Typical @ TA = +25˚C
10
5
5
4
6
8
10
12
14
16
18
4
6
VDD
FIGURE 2-9:
Supply Voltage.
DS20001422G-page 6
Output Resistance (ROH) vs.
8
10
12
14
16
18
VDD
FIGURE 2-12:
Supply Voltage.
Output Resistance (ROL) vs.
2006-2014 Microchip Technology Inc.
TC4426/TC4427/TC4428
Note: Unless otherwise indicated, TA = +25ºC with 4.5V VDD 18V.
60
60
VDD = 18V
2 MHz
VDD = 18V
50
1000 pF
2200 pF
50
ISUPPLY (mA)
ISUPPLY (mA)
900 kHz
40
600 kHz
30
20
200 kHz
10
40
100 pF
30
20
10
20 kHz
0
100
1000
CLOAD (pF)
FIGURE 2-13:
Capacitive Load.
0
10,000
Supply Current vs.
10
FIGURE 2-16:
Frequency.
60
VDD = 12V
50
50
40
40
ISUPPLY (mA)
ISUPPLY (mA)
Supply Current vs.
60
2 MHz
VDD = 12V
30
900 kHz
20
600 kHz
10
1000
CLOAD (pF)
FIGURE 2-14:
Capacitive Load.
2200 pF
1000 pF
30
20
100 pF
10
200 kHz
20 kHz
0
100
0
10
10,000
Supply Current vs.
100
1000
FREQUENCY (kHz)
FIGURE 2-17:
Frequency.
60
Supply Current vs.
60
VDD = 6V
VDD = 6V
50
50
40
30
ISUPPLY (mA)
ISUPPLY (mA)
100
1000
FREQUENCY (kHz)
2 MHz
20
900 kHz
600 kHz
200 kHz
20 kHz
10
0
100
FIGURE 2-15:
Capacitive Load.
1000
CLOAD (pF)
2200 pF
30
1000 pF
20
10
10,000
Supply Current vs.
2006-2014 Microchip Technology Inc.
40
100 pF
0
10
FIGURE 2-18:
Frequency.
100
1000
FREQUENCY (kHz)
Supply Current vs.
DS20001422G-page 7
TC4426/TC4427/TC4428
Note: Unless otherwise indicated, TA = +25ºC with 4.5V VDD 18V.
–8
10
9
8
7
6
A • sec
5
4
3
2
–9
10
Note:
4
6
8
10
12
VDD
14
16
18
The values on this graph represent the loss
seen by both drivers in a package during one
complete cycle. For a single driver, divide the
stated values by 2. For a single transition of a
single driver, divide the stated value by 4.
FIGURE 2-19:
Supply Voltage.
DS20001422G-page 8
Crossover Energy vs.
2006-2014 Microchip Technology Inc.
TC4426/TC4427/TC4428
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE ( 1)
8-Pin PDIP/
MSOP/SOIC
8-Pin
DFN-S
1
1
NC
No connection
2
2
IN A
Input A
3
3
GND
Ground
4
4
IN B
Input B
5
5
OUT B
6
6
VDD
7
7
OUT A
8
8
NC
No connection
PAD
NC
Exposed Metal Pad
—
Note 1:
3.1
Symbol
Description
Output B
Supply input
Output A
Duplicate pins must be connected for proper operation.
Inputs A and B
MOSFET driver inputs A and B are high-impedance,
TTL/CMOS compatible inputs. These inputs also have
300 mV of hysteresis between the high and low
thresholds that prevents output glitching even when the
rise and fall time of the input signal is very slow.
3.2
Supply Input (VDD)
The VDD input is the bias supply for the MOSFET driver
and is rated for 4.5V to 18V with respect to the Ground
pin. The VDD input should be bypassed with local
ceramic capacitors. The value of these capacitors
should be chosen based on the capacitive load that is
being driven. A value of 1.0 µF is suggested.
Ground (GND)
Ground is the device return pin. The Ground pin(s)
should have a low-impedance connection to the bias
supply source return. High peak current flows out the
Ground pin(s) when the capacitive load is being
discharged.
3.3
3.4
3.5
Exposed Metal Pad
The exposed metal pad of the 6x5 DFN-S package is
not internally connected to any potential. Therefore,
this pad can be connected to a ground plane or other
copper plane on a Printed Circuit Board (PCB), to aid
in heat removal from the package.
Output A and B
MOSFET driver outputs A and B are low-impedance,
CMOS push-pull style outputs. The pull-down and pullup devices are of equal strength, making the rise and
fall times equivalent.
2006-2014 Microchip Technology Inc.
DS20001422G-page 9
TC4426/TC4427/TC4428
4.0
APPLICATIONS INFORMATION
+5V
90%
Input
VDD = 18V
0V
4.7 µF
0.1 µF
Input
tD1
7
VDD
tR
90%
90%
Output
5
10%
10%
0V
Inverting Driver
CL = 1000 pF
4
tD2
tF
Output
6
2
10%
+5V
90%
Input
3
Input: 100 kHz,
square wave,
tRISE = tFALL 10 ns
0V
VDD
10%
tD1 90%
tR
Output
0V
10%
90%
tD2
tF
10%
Non-Inverting Driver
FIGURE 4-1:
DS20001422G-page 10
Switching Time Test Circuit.
2006-2014 Microchip Technology Inc.
TC4426/TC4427/TC4428
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
8-Lead DFN-S (6x5x0.9 mm)
Example
TC4426
EMF^^
1315
256
NNN
PIN 1
PIN 1
8-Lead MSOP (3x3 mm)
Example
4426C
315256
Example
8-Lead PDIP (300 mil)
XXXXXXXX
XXXXXNNN
TC4427
CPA^^NNN
YYWW
8-Lead SOIC (150 mil)
1315
Example
TC4428C
OA^^YYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
Note:
*
256
Customer specific information*
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard device marking consists of Microchip part number, year code, week code and traceability code.
2006-2014 Microchip Technology Inc.
DS20001422G-page 11
TC4426/TC4427/TC4428
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