TC642
PWM Fan Speed Controller with FanSense™ Technology
Features
• Temperature Proportional Fan Speed for Acoustic
Control and Longer Fan Life
• Efficient PWM Fan Drive
• 3.0V to 5.5V Supply Range:
- Fan Voltage Independent of TC642
Supply Voltage
- Supports any Fan Voltage
• FanSense™ Fault Detection Circuits Protect
Against Fan Failure and Aid System Testing
• Shutdown Mode for "Green" Systems
• Supports Low Cost NTC/PTC Thermistors
• Space Saving 8-Pin MSOP Package
• Over-temperature Indication
Applications
•
•
•
•
•
•
Power Supplies
Personal Computers
File Servers
Telecom Equipment
UPSs, Power Amps, etc.
General Purpose Fan Speed Control
Available Tools
• Fan Controller Demonstration Board (TC642DEMO)
• Fan Controller Evaluation Kit (TC642EV)
Package Types
SOIC/PDIP/MSOP
VIN
1
CF
2
VMIN
GND
8
VDD
7
VOUT
3
6
FAULT
4
5
SENSE
TC642
General Description
The TC642 is a switch mode fan speed controller for
use with brushless DC fans. Temperature proportional
speed control is accomplished using pulse width modulation (PWM). A thermistor (or other voltage output
temperature sensor) connected to the VIN input furnishes the required control voltage of 1.25V to 2.65V
(typical) for 0% to 100% PWM duty cycle. Minimum fan
speed is set by a simple resistor divider on the VMIN
input. An integrated Start-up Timer ensures reliable
motor start-up at turn-on, coming out of shutdown
mode or following a transient fault. A logic low applied
to VMIN (Pin 3) causes fan shutdown.
The TC642 also features Microchip Technology's proprietary FanSense™ technology for increasing system
reliability. In normal fan operation, a pulse train is present at SENSE (Pin 5). A missing pulse detector monitors this pin during fan operation. A stalled, open or
unconnected fan causes the TC642 to trigger its Startup Timer once. If the fault persists, the FAULT output
goes low and the device is latched in its shutdown
mode. FAULT is also asserted if the PWM reaches
100% duty cycle, indicating a possible thermal runaway
situation, although the fan continues to run. See
Section 5.0, “Typical Applications”, for more
information and system design guidelines.
The TC642 is available in the standard 8-pin plastic
DIP, SOIC and MSOP packages and is available in the
commercial, extended commercial and industrial
temperature ranges.
2001-2012 Microchip Technology Inc.
DS21444D-page 1
TC642
Functional Block Diagram
+
VIN
–
VOTF
VDD
–
+
OTF
–
SHDN
+
Control
Logic
VOUT
CF
3 x TPWM
Timer
Clock
Generator
VMIN
+
Missing
Pulse
Detect
–
TC642
–
FAULT
+
VSHDN
GND
Start-up
Timer
10kΩ
SENSE
70mV (typ.)
DS21444D-page 2
2001-2012 Microchip Technology Inc.
TC642
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
Supply Voltage ......................................................... 6V
Input Voltage, Any Pin.... (GND – 0.3V) to (VDD +0.3V)
*Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at
these or any other conditions above those indicated in the
operation sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Thermal Resistance:
PDIP (RJA)............................................. 125°C/W
SOIC (RJA) ............................................ 155°C/W
MSOP (RJA) .......................................... 200°C/W
Specified Temperature Range............ -40°C to +125°C
Storage Temperature Range.............. -65°C to +150°C
ELECTRICAL SPECIFICATIONS
Electrical Characteristics: TMIN < TA < TMAX, VDD = 3.0V to 5.5V, unless otherwise specified.
Symbol
Parameter
Min
Typ
Max
Units
Test Conditions
VDD
Supply Voltage
3.0
—
5.5
V
IDD
Supply Current, Operating
—
0.5
1.0
mA
Pins 6, 7 Open,
CF = 1 µF, VIN = VC(MAX)
IDD(SHDN)
Supply Current, Shutdown Mode
—
25
—
µA
Pins 6, 7 Open,
CF = 1 µF, VMIN = 0.35V,
Note 1
IIN
VIN, VMIN Input Leakage
- 1.0
—
+1.0
µA
Note 1
—
—
50
µsec
VOUT Output
tR
VOUT Rise Time
IOH = 5 mA, Note 1
tF
VOUT Fall Time
—
—
50
µsec
IOL = 1 mA, Note 1
tSHDN
Pulse Width (On VMIN) to
Clear Fault Mode
30
—
—
µsec
VSHDN, VHYST Specifications,
Note 1
IOL
Sink Current at VOUT Output
1.0
—
—
mA
VOL = 10% of VDD
IOH
Source Current at VOUT Output
5.0
—
—
mA
VOH = 80% of VDD
VC(MAX), VOTF
Input Voltage at VIN or VMIN
for 100% PWM Duty Cycle
2.5
2.65
2.8
V
VC(SPAN)
VC(MAX) - VC(MIN)
1.3
1.4
1.5
V
VSHDN
Voltage Applied to VMIN to
ensure Shutdown Mode
—
—
VDD x 0.13
V
VREL
Voltage Applied to VMIN to
Release Shutdown Mode
VDD x 0.19
—
—
V
PWM Frequency
26
30
34
Hz
CF = 1.0 µF
SENSE Input Threshold
Voltage with Respect to GND
50
70
90
mV
Note 1
VIN, VMIN Inputs
VDD = 5V
Pulse Width Modulator
FPWM
SENSE Input
VTH(SENSE)
FAULT Output
VOL
Output Low Voltage
—
—
0.3
V
tMP
Missing Pulse Detector Timer
—
32/F
—
Sec
tSTARTUP
Start-up Timer
—
32/F
—
Sec
tDIAG
Diagnostic Timer
—
3/F
—
Sec
IOL = 2.5 mA
Note 1: Ensured by Design, not tested.
2001-2012 Microchip Technology Inc.
DS21444D-page 3
TC642
2.0
PIN DESCRIPTIONS
2.4
Ground (GND)
The descriptions of the pins are listed in Table 2-1.
GND denotes the ground terminal.
TABLE 2-1:
2.5
Pin No.
PIN FUNCTION TABLE
Symbol
Description
Analog Input (SENSE)
Pulses are detected at the SENSE pin as fan rotation
chops the current through a sense resistor. The
absence of pulses indicates a fault.
1
VIN
Analog Input
2
CF
Analog Output
3
VMIN
Analog Input
2.6
4
GND
Ground Terminal
5
SENSE
Analog Input
6
FAULT
Digital (Open Collector) Output
7
VOUT
Digital Output
8
VDD
Power Supply Input
The FAULT line goes low to indicate a fault condition.
When FAULT goes low due to a fan fault condition, the
device is latched in shutdown mode until deliberately
cleared or until power is cycled. FAULT may be connected to VMIN if a hard shutdown is desired. FAULT
will also be asserted when the PWM reaches 100%
duty cycle, indicating that maximum cooling capability
has been reached and a possible over-temperature
condition may occur. This is a non-latching state and
the FAULT output will go high when the PWM duty
cycle goes below 100%.
2.1
Analog Input (VIN)
The thermistor network (or other temperature sensor)
connects to the VIN input. A voltage range of 1.25V to
2.65V (typical) on this pin drives an active duty cycle of
0% to 100% on the VOUT pin.
2.2
Analog Output (CF)
CF is the positive terminal for the PWM ramp generator
timing capacitor. The recommended CF is 1 µF for
30 Hz PWM operation.
2.3
Analog Input (VMIN)
An external resistor divider connected to the VMIN input
sets the minimum fan speed by fixing the minimum
PWM duty cycle (1.25V to 2.65V = 0% to 100%, typical). The TC642 enters shutdown mode when VMIN
VSHDN. During shutdown, the FAULT output is inactive
and supply current falls to 25 µA (typical). The TC642
exits shutdown mode when VMIN VREL (see
Section 5.0, “Typical Applications”).
DS21444D-page 4
2.7
Digital Output (FAULT)
Digital Output (VOUT)
VOUT is an active high complimentary output that drives
the base of an external NPN transistor (via an appropriate base resistor) or the gate of an N-channel MOSFET. This output has asymmetrical drive (see
Section 1.0, “Electrical Characteristics”).
2.8
Power Supply Input (VDD)
VDD may be independent of the fan’s power supply
(see Section 1.0, “Electrical Characteristics”).
2001-2012 Microchip Technology Inc.
TC642
3.0
DETAILED DESCRIPTION
3.1
PWM
Note:
The PWM circuit consists of a ramp generator and
threshold detector. The frequency of the PWM is determined by the value of the capacitor connected to the CF
input. A frequency of 30 Hz is recommended
(CF = 1 µF). The PWM is also the time base for the
Start-up Timer (see Section 3.4, “Start-Up Timer”). The
PWM voltage control range is 1.25V to 2.65V (typical)
for 0% to 100% output duty cycle.
3.2
At this point, action must be taken to restart
the fan by momentarily pulling VMIN below
VSHDN, or cycling system power. In either
case, the fan cannot remain disabled due
to a fault condition, as severe system damage could result. If the fan cannot be
restarted, the system should be shut down.
The TC642 may be configured to continuously attempt
fan restarts, if so desired.
Continuous restart mode is enabled by connecting the
FAULT output to VMIN through a 0.01 µF capacitor, as
shown in Figure 3-1. When connected in this manner,
the TC642 automatically attempts to restart the fan
every time a fault condition occurs. When the FAULT
output is driven low, the VMIN input is momentarily
pulled below VSHDN, initiating a reset and clearing the
fault condition. Normal fan start-up is then attempted as
previously described. The FAULT output may be
connected to external logic (or the interrupt input of a
microcontroller) to shut the TC642 down if multiple fault
pulses are detected at approximately one second
intervals. Diode D1, capacitor C1 and resistors R5 and
R6 are provided to ensure fan restarts are the result of
a fan fault and not an over-temperature fault. A CMOS
logic OR gate may be substituted for these
components, if available.
FAULT Output
The TC642 detects faults in two ways.
First, pulses appearing at SENSE due to the PWM
turning on are blanked, with the remaining pulses
filtered by a missing pulse detector. If consecutive
pulses are not detected for 32 PWM cycles (1 Sec if
CF = 1 µF), the Diagnostic Timer is activated, and VOUT
is driven high continuously for three PWM cycles
(100 msec if CF = 1 µF). If a pulse is not detected
within this window, the Start-up Timer is triggered (see
Section 3.4). This should clear a transient fault condition. If the missing pulse detector times out again, the
PWM is stopped and FAULT goes low. When FAULT is
activated due to this condition, the device is latched in
shutdown mode and will remain off indefinitely.
VDD
R5
10kΩ
C1
0.01μF
D1
+12V
R6
1kΩ
+5V
TC642
RESET
8
From
Temp
Sensor
1
VIN
Fan
VDD
6
FAULT
1
0
Q1
Fault
Detected
+5V
TC642
R3
VOUT
3
From
System
Shutdown
Controller
CB
0.01μF
R1
Q2
R4
(Optional)
RBASE
7
VMIN
5
SENSE
2
CSENSE
CF
CF
1μF
GND
RSENSE
4
*The parallel combination of R3 and R4 must be >10 kΩ.
FIGURE 3-1:
Fan Fault Output Circuit.
2001-2012 Microchip Technology Inc.
DS21444D-page 5
TC642
The second condition by which the TC642 detects a
fault is when the PWM control voltage applied to VIN
becomes greater than that needed to drive 100% duty
cycle (see Section 1.0, “Electrical Characteristics”).
This indicates that the fan is at maximum drive and the
potential exists for system overheating. Either heat dissipation in the system has gone beyond the cooling
system’s design limits or some subtle fault exists (such
as fan bearing failure or an airflow obstruction). This
output may be treated as a system overheat warning
and be used to trigger system shutdown. However, in
this case, the fan will continue to run even when FAULT
is asserted. If a shutdown is desired, FAULT may be
connected to VMIN outside the device. This will latch the
TC642 in shutdown mode when any fault occurs.
3.3
VOUT Output
The VOUT pin is designed to drive a low cost transistor
or MOSFET as the low side power switching element
in the system. Various examples of driver circuits will
be shown throughout this data sheet. This output has
asymmetric complementary drive and is optimized for
driving NPN transistors or N-channel MOSFETs. Since
the system relies on PWM rather than linear control,
the power dissipation in the power switch is kept to a
minimum. Generally, very small devices (TO-92 or
SOT packages) will suffice.
3.4
Start-Up Timer
To ensure reliable fan start-up, the Start-up Timer turns
the VOUT output on for 32 cycles of the PWM whenever
the fan is started from the off state. This occurs at
power-up and when coming out of shutdown mode. If
the PWM frequency is 30 Hz (CF = 1 µF), the resulting
start-up time will be approximately one second. If a
fault is detected, the Diagnostic Timer is triggered
once, followed by the Start-up Timer. If the fault persists, the device is shut down (see Section 3.2, “FAULT
Output”).
DS21444D-page 6
3.5
Shutdown Control (Optional)
If VMIN (Pin 3) is pulled below VSHDN, the TC642 will go
into shutdown mode. This can be accomplished by
driving VMIN with an open-drain logic signal or by using
an external transistor, as shown in Figure 3-1. All functions are suspended until the voltage on VMIN becomes
higher than VREL (0.85V @ VDD = 5.0V). Pulling VMIN
below VSHDN will always result in complete device
shutdown and reset. The FAULT output is
unconditionally inactive in shutdown mode.
A small amount of hysteresis, typically one percent of
VDD (50 mV at VDD = 5.0V), is designed into the VSHDN
and VREL thresholds. The levels specified for VSHDN
and VREL in Section 1.0, “Electrical Characteristics”,
include this hysteresis, plus adequate margin to
account for normal variations in the absolute value of
the threshold and hysteresis.
CAUTION: Shutdown mode is unconditional. That is,
the fan will not be activated regardless of the voltage
at VIN. The fan should not be shut down until all heat
producing activity in the system is at a negligible level.
3.6
SENSE Input
(FanSense™ Technology)
The SENSE input (Pin 5) is connected to a low value
current sensing resistor in the ground return leg of the
fan circuit. During normal fan operation, commutation
occurs as each pole of the fan is energized. This
causes brief interruptions in the fan current, seen as
pulses across the sense resistor. If the device is not in
shutdown mode, and pulses are not appearing at the
SENSE input, a fault exists.
The short, rapid change in fan current (high dI/dt)
causes a corresponding dV/dt across the sense
resistor, RSENSE. The waveform on RSENSE is differentiated and converted to a logic-level pulse-train by
CSENSE and the internal signal processing circuitry.
The presence and frequency of this pulse-train is a
direct indication of fan operation (see Section 5.0, “Typical Applications”, for more details).
2001-2012 Microchip Technology Inc.
TC642
4.0
SYSTEM BEHAVIOR
4.3
The flowcharts describing the TC642’s behavioral
algorithm are shown in Figure 4-1. They can be
summarized as follows:
4.1
Power-Up
(1) Assuming the device is not being held in shutdown
mode (VMIN > VREL)…
(2) Turn VOUT output on for 32 cycles of the PWM
clock. This ensures that the fan will start from a
dead stop.
Fan Fault
Fan fault is an infinite loop wherein the TC642 is
latched in shutdown mode. This mode can only be
released by a reset (i.e., VMIN being brought below
VSHDN, then above VREL, or by power-cycling).
(1) While in this state, FAULT is latched on (low) and
the VOUT output is disabled.
(2) A reset sequence applied to the VMIN pin will exit
the loop to Power-Up.
(3) End.
(3) During this Start-up Timer, if a fan pulse is
detected, branch to Normal Operation; if none are
received…
(4) Activate the 32-cycle Start-up Timer one more time
and look for a fan pulse; if a fan pulse is detected,
proceed to Normal Operation; if none are
received…
(5) Proceed to Fan Fault.
(6) End.
4.2
Normal Operation
Normal Operation is an endless loop which may only
be exited by entering shutdown mode or Fan Fault. The
loop can be thought of as executing at the frequency of
the oscillator and PWM.
(1) Reset the missing pulse detector.
(2) Is TC642 in shutdown? If so…
a. VOUT duty cycle goes to zero.
b. FAULT is disabled.
c. Exit the loop and wait for VMIN > VREL to
resume operation (indistinguishable
power-up).
from
(3) If an over-temperature fault occurs (VIN > VOTF),
activate FAULT; release FAULT when VIN < VOTF.
(4) Drive VOUT to a duty cycle proportional to the
greater of VIN and VMIN on a cycle by cycle basis.
(5) If a fan pulse is detected, branch back to the start
of the loop (1).
(6) If the missing pulse detector times out …
(7) Activate the 3-cycle Diagnostic Timer and look for
pulses; if a fan pulse is detected, branch back to
the start of the loop (1); if none are received…
(8) Activate the 32-cycle Start-up Timer and look for
pulses; if a fan pulse is detected, branch back to
the start of the loop (1); if none are received…
(9) Quit Normal Operation and go to Fan Fault.
(10) End.
2001-2012 Microchip Technology Inc.
DS21444D-page 7
TC642
Normal
Operaton
Power-Up
Clear
Missing Pulse
Detector
Power-on
Reset
FAULT = 1
Yes
Shutdown
VOUT = 0
VMIN < VSHDN
Yes
No
Shutdown
VOUT = 0
VMIN < VSHDN?
No
VMIN > VREL?
No
VMIN > VREL
No
Yes
Yes
Fire Start-up
Timer
(1 SEC)
Fan Fault
Detected?
Power-up
Yes
Fire Start-up
Timer
YES
(1 SEC)
VIN > VOTF?
Yes
FAULT = 0
No
Yes
No
Normal
Operation
Fan Pulse
Detected?
VOUT
Proportional to Greater
of VIN or VMIN
No
Fan Fault
Yes
Fan Pulse
Detected?
Fan Fault
No
No
M.P.D.
Expired?
Yes
Fire Diagnostic
Timer
(100msec)
FAULT = 0,
VOUT = 0
No
No
VMIN < VSHDN?
Yes
No
Fan Pulse
Detected?
Cycling
Power?
Yes
Yes
Yes
VMIN > VREL?
Fire Start-up
Timer
(1 SEC)
No
Fan Pulse
Detected?
No
Fan Fault
Yes
Power-up
FIGURE 4-1:
DS21444D-page 8
TC642 Behavioral Algorithm Flowchart.
2001-2012 Microchip Technology Inc.
TC642
5.0
TYPICAL APPLICATIONS
The TC642 demonstration and prototyping board
(TC642DEMO), and the TC642 Evaluation Kit
(TC642EV), provide working examples of TC642 circuits and prototyping aids. The TC642DEMO is a
printed circuit board optimized for small size and ease
of inclusion into system prototypes. The TC642EV is a
larger board intended for benchtop development and
analysis. At the very least, anyone contemplating a
design using the TC642 should consult the documentation for both TC642EV (DS21403) and TC642DEMO
(DS21401).
Designing with the TC642 involves the following:
(1) The temp sensor network must be configured to
deliver 1.25V to 2.65V on VIN for 0% to 100% of the
temperature range to be regulated.
(2) The minimum fan speed (VMIN) must be set.
(3) The output drive transistor and associated circuitry
must be selected.
(4) The SENSE network, RSENSE and CSENSE, must
be designed for maximum efficiency, while
delivering adequate signal amplitude.
(5) If shutdown capability is desired, the drive requirements of the external signal or circuit must be
considered.
+5V*
+12V
CB
1 µF
NTC
R1
8
1
VIN
Fan
VDD
CB
0.01 µF
R2
FAULT
6
Thermal
Shutdown
Q1
RBASE
TC642
R3
3 V
MIN
CB
0.01 µF
2
Shutdown
R4
(Optional)
SENSE
5
CSENSE
CF
CF
1 µF
VOUT 7
GND
4
RSENSE
Note: *See cautions regarding latch-up considerations in Section 5.0, "Typical Applications".
FIGURE 5-1:
5.1
Typical Application Circuit.
Temperature Sensor Design
The temperature signal connected to VIN must output a
voltage in the range of 1.25V to 2.65V (typical) for 0%
to 100% of the temperature range of interest. The
circuit in Figure 5-2 illustrates a convenient way to
provide this signal.
Figure 5-2 shows a simple temperature dependent
voltage divider circuit. RT1 is a conventional NTC
thermistor while R1 and R2 are standard resistors. The
supply voltage, VDD, is divided between R2 and the parallel combination of RT1 and R1 (for convenience, the
parallel combination of RT1 and R1 will be referred to as
RTEMP). The resistance of the thermistor at various
temperatures is obtained from the manufacturer’s
specifications. Thermistors are often referred to in
terms of their resistance at 25°C.
2001-2012 Microchip Technology Inc.
DS21444D-page 9
TC642
5.2
VDD
A voltage divider on VMIN sets the minimum PWM duty
cycle and, thus, the minimum fan speed. As with the
VIN input, 1.25V to 2.65V typically corresponds to 0%
to 100% duty cycle. Assuming that fan speed is linearly
related to duty cycle, the minimum speed voltage is
given by the equation:
IDIV
R1 = 100 kΩ
RT1
NTC Thermistor
100 kΩ @ 25˚C
Minimum Fan Speed
VIN
EQUATION
VMIN =
R2 = 23.2 kΩ
FIGURE 5-2:
Circuit.
Temperature Sensing
Minimum Speed
x (1.4) + 1.25V
Full Speed
For example, if 2500 RPM equates to 100% fan speed,
and a minimum speed of 1000 RPM is desired, then
the VMIN voltage is:
EQUATION
Generally, the thermistor shown in Figure 5-2 is a nonlinear device with a negative temperature coefficient
(also called an NTC thermistor). In Figure 5-2, R1 is
used to linearize the thermistor temperature response,
while R2 is used to produce a positive temperature
coefficient at the VIN node. As an added benefit, this
configuration produces an output voltage delta of 1.4V,
which is well within the range of the VC(SPAN)
specification of the TC642. A 100 kNTC thermistor is
selected for this application in order to keep IDIV at a
minimum.
For the voltage range at VIN to be equal to 1.25V to
2.65V, the temperature range of this configuration is
0°C to 50°C. If a different temperature range is required
from this circuit, R1 should be chosen to equal the
resistance value of the thermistor at the center of this
new temperature range. With this change, R2 is
adjusted according to the formulas below. It is
suggested that a maximum temperature range of 50°C
be used with this circuit due to thermistor linearity
limitations.
VMIN =
1000
2500
x (1.4) + 1.25V = 1.81V
The VMIN voltage may be set using a simple resistor
divider, as shown in Figure 5-3. Per Section 1.0,
“Electrical Characteristics”, the leakage current at the
VMIN pin is no more than 1 µA. It would be very
conservative to design for a divider current, IDIV, of
100 µA. If VDD = 5.0V then;
EQUATION
5.0V
IDIV = 100µA =
R1 + R2 =
R1+ R2
, therefore
5.0V
= 50,000 = 50k
100µA
VDD
The following two equations permit solving for the two
unknown variables, R1 and R2. More information
regarding thermistors can be found in AN679, “Temperature Sensing Technologies”, and AN685, “Thermistors
in Single Supply Temperature Sensing Circuits”, which
can be downloaded from Microchip’s web site at:
www.microchip.com.
R1
IDIV
IIN
VMIN
EQUATION
VDD x R2
RTEMP (T1) + R2
VDD x R2
RTEMP (T2) + R2
= V(T2)
Where T1 and T2 are the chosen temperatures and
RTEMP is the parallel combination of the thermistor
and R1.
DS21444D-page 10
R2
= V(T1)
GND
FIGURE 5-3:
VIN Circuit.
2001-2012 Microchip Technology Inc.
TC642
We can further specify R1 and R2 by the condition that
the divider voltage is equal to our desired VMIN. This
yields the following equation:
EQUATION
VMIN =
VDD x R2
R1 + R2
Solving for the relationship between R1 and R2 results
in the following equation:
EQUATION
R1 = R2 x
VDD - VMIN
VMIN
In this example, R1 = (1.762) R2. Substituting this relationship back into the previous equation yields the
resistor values:
5.4
FanSense Network
(RSENSE and CSENSE)
The FanSense network, comprised of RSENSE and
CSENSE, allows the TC642 to detect commutation of
the fan motor (FanSense technology). This network
can be thought of as a differentiator and threshold
detector. The function of RSENSE is to convert the fan
current into a voltage. CSENSE serves to AC-couple this
voltage signal and provide a ground-referenced input to
the SENSE pin. Designing a proper SENSE network is
simply a matter of scaling RSENSE to provide the necessary amount of gain (i.e., the current-to-voltage conversion ratio). A 0.1 µF ceramic capacitor is
recommended for CSENSE. Smaller values require
larger sense resistors, and higher value capacitors are
bulkier and more expensive. Using a 0.1 µF capacitor
results in reasonable values for RSENSE. Figure 5-4
illustrates a typical SENSE network. Figure 5-5 shows
the waveforms observed using a typical SENSE network.
R2 = 18.1 k, and R1 = 31.9 k
VDD
In this case, the standard values of 31.6 k and
18.2 k are very close to the calculated values and
would be more than adequate.
5.3
Operations at Low Duty Cycle
Fan
One boundary condition which may impact the selection of the minimum fan speed is the irregular activation
of the Diagnostic Timer due to the TC642 “missing” fan
commutation pulses at low speeds. This is a natural
consequence of low PWM duty cycles (typically 25% or
less). Recall that the SENSE function detects commutation of the fan as disturbances in the current through
RSENSE. These can only occur when the fan is energized (i.e., VOUT is “on”). At very low duty cycles, the
VOUT output is “off” most of the time. The fan may be
rotating normally, but the commutation events are
occurring during the PWM’s off-time.
The phase relationship between the fan’s commutation
and the PWM edges tends to “walk around” as the
system operates. At certain points, the TC642 may fail
to capture a pulse within the 32-cycle missing pulse
detector window. When this happens, the 3-cycle
Diagnostic Timer will be activated, the VOUT output will
be active continuously for three cycles and, if the fan is
operating normally, a pulse will be detected. If all is
well, the system will return to normal operation. There
is no harm in this behavior, but it may be audible to the
user as the fan accelerates briefly when the Diagnostic
Timer fires. For this reason, it is recommended that
VMIN be set no lower than 1.8V.
RBASE
VOUT
Q1
SENSE
CSENSE
(0.1 μF Typ.)
RSENSE
GND
FIGURE 5-4:
SENSE Network.
Tek Run: 10.0kS/s Sample
[
T
]
Waveform @ Sense Resistor
GND
1
Waveform @ Sense Pin
90mV
50mV
GND
T
2
Ch1 100mV
FIGURE 5-5:
2001-2012 Microchip Technology Inc.
Ch2
100mV
M5.00ms
Ch1
142mV
SENSE Waveforms.
DS21444D-page 11
TC642
Table 5-1 lists recommended values for RSENSE based
on the nominal operating current of the fan. Note that
the current draw specified by the fan manufacturer may
be a worst-case rating for near-stall conditions and may
not be the fan’s nominal operating current. The values
in Table 5-1 refer to actual average operating current. If
the fan current falls between two of the values listed,
use the higher resistor value. The end result of employing Table 5-1 is that the signal developed across the
sense resistor is approximately 450 mV in amplitude.
RSENSE VS. FAN CURRENT
TABLE 5-1:
Nominal Fan Current (mA)
RSENSE ()
50
9.1
100
4.7
150
3.0
200
2.4
250
2.0
300
1.8
350
1.5
400
1.3
450
1.2
500
1.0
5.5
(MOSFET)) must be large enough to withstand the
highest voltage applied to the fan (Note: This will occur
when the fan is off); (2) 5 mA of base drive current must
be enough to saturate the transistor when conducting
the full fan current (transistor must have sufficient
gain); (3) the VOUT voltage must be high enough to sufficiently drive the gate of the MOSFET to minimize the
RDS(on) of the device; (4) rated fan current draw must
be within the transistor's/MOSFET's current handling
capability; and (5) power dissipation must be kept
within the limits of the chosen device.
A base-current limiting resistor is required with bipolar
transistors (Figure 5-6).
VDD
Fan
RBASE
VOH = 80% VDD
RBASE
Output Drive Transistor Selection
The TC642 is designed to drive an external transistor
or MOSFET for modulating power to the fan. This is
shown as Q1 in Figures 3-1, 5-1, 5-4, 5-6, 5-7, 5-8
and 5-9. The VOUT pin has a minimum source current
of 5 mA and a minimum sink current of 1 mA. Bipolar
transistors or MOSFETs may be used as the power
switching element, as shown in Figure 5-7. When high
current gain is needed to drive larger fans, two transistors may be used in a Darlington configuration. Three
possible circuit topologies are shown in Figure 5-7: (a)
shows a single NPN transistor used as the switching
element; (b) illustrates the Darlington pair; and (c)
shows an N-channel MOSFET.
One major advantage of the TC642’s PWM control
scheme versus linear speed control is that the power
dissipation in the pass element is kept very low. Generally, low cost devices in very small packages, such as
TO-92 or SOT, can be used effectively. For fans with
nominal operating currents of no more than 200 mA, a
single transistor usually suffices. Above 200 mA, the
Darlington or MOSFET solution is recommended. For
the fan sensing function to work correctly, it is imperative that the pass transistor be fully saturated when
“on”.
Table 5-2 gives examples of some commonly available
transistors and MOSFETs. This table should be used
as a guide only since there are many transistors and
MOSFETs which will work just as well as those listed.
The critical issues when choosing a device to use as
Q1 are: (1) the breakdown voltage (V(BR)CEO or VDS
DS21444D-page 12
Q1
–
+V
+V
BE(SAT)
–
+
VR
SENSE
RSENSE
–
GND
FIGURE 5-6:
RBASE.
Circuit For Determining
The correct value for this resistor can be determined as
follows:
VRSENSE + VBE(SAT) + VRBASE
VOH
=
VRSENSE
= IFAN x RSENSE
VRBASE
= RBASE x IBASE
IBASE
= IFAN / hFE
VOH is specified as 80% of VDD in Section 1.0, “Electrical Characteristics”; VBE(SAT) is given in the chosen
transistor’s data sheet. It is now possible to solve for
RBASE.
EQUATION
RBASE =
VOH - VBE(SAT) - VRSENSE
IBASE
2001-2012 Microchip Technology Inc.
TC642
Some applications require the fan to be powered from
the negative 12V supply to keep motor noise out of the
positive voltage power supplies. As is shown in
Figure 5-8, zener diode D1 offsets the -12V power supply voltage, holding transistor Q1 off when VOUT is low.
VOUT
When VOUT is high, the voltage at the anode of D1
increases by VOUT, causing Q1 to turn on. Operation is
otherwise consistent with the case of fan operation
from +12V.
VDD
VDD
VDD
Fan
Fan
Fan
RBASE
Q1
VOUT
RBASE
Q1
VOUT
Q1
Q2
RSENSE
RSENSE
RSENSE
GND
GND
b) Darlington Transistor Pair
a) Single Bipolar Transistor
FIGURE 5-7:
GND
c) N-Channel MOSFET
Output Drive Transistor Circuit Topologies.
+5V
VDD
R2*
2.2 kΩ
VOUT
TC642
Fan
D1
12.0V
Zener
Q1*
GND
R4*
10 kΩ
R3*
2.2Ω
-12V
*Note: Value depends on the specific application and is shown for example only.
FIGURE 5-8:
Powering the Fan From a -12V Supply.
2001-2012 Microchip Technology Inc.
DS21444D-page 13
TC642
TABLE 5-2:
Device
MMBT2222A
MPS2222A
MPS6602
TRANSISTORS AND MOSFETS FOR Q1 (VDD = 5V)
Package
Max. VBE(sat)/VGS
(V)
Min. HFE
VCEO/VDS
(V)
Fan Current
(mA)
Suggested
RBASE ()
SOT-23
1.2
50
40
150
800
TO-92
1.2
50
40
150
800
TO-92
1.2
50
40
500
301
SI2302
SOT-23
2.5
NA
20
500
Note 1
MGSF1N02E
SOT-23
2.5
NA
20
500
Note 1
SI4410
SO-8
4.5
NA
30
1000
Note 1
SI2308
SOT-23
4.5
NA
60
500
Note 1
Note 1: A series gate resistor may be used in order to control the MOSFET turn-on and turn-off times.
5.6
Latch-up Considerations
As with any CMOS IC, the potential exists for latch-up
if signals are applied to the device which are outside
the power supply range. This is of particular concern
during power-up if the external circuitry (such as the
sensor network, VMIN divider or shutdown circuit) is
powered by a supply different from that of the TC642.
Care should be taken to ensure that the TC642’s VDD
supply powers up first. If possible, the networks
attached to VIN and VMIN should connect to the VDD
supply at the same physical location as the IC itself.
Even if the IC and any external networks are powered
by the same supply, physical separation of the
connecting points can result in enough parasitic
capacitance and/or inductance in the power supply
connections to delay one power supply “routing” versus
another.
DS21444D-page 14
2001-2012 Microchip Technology Inc.
TC642
5.7
Power Supply Routing and
Bypassing
Design Example
Step 1. Calculate R1 and R2 based on using an NTC
having a resistance of 10 k at TMIN (25°C)
and 4.65 k at TMAX (45°C) (see Figure 5-9).
Noise present on the VIN and VMIN inputs may cause
erroneous operation of the FAULT output. As a result,
these inputs should be bypassed with a 0.01 F
capacitor mounted as close to the package as is possible. This is particularly true of VIN, which is usually
driven from a high impedance source (such as a thermistor). In addition, the VDD input should be bypassed
with a 1 µF capacitor. Grounds should be kept as short
as possible. To keep fan noise off the TC642 ground
pin, individual ground returns for the TC642 and the low
side of the fan current sense resistor should be used.
R1 = 20.5 k
R2 = 3.83 k
Step 2. Set minimum fan speed VMIN = 1.8V.
Limit the divider current to 100 µA from which
R5 = 33 k and R6 = 18 k
Step 3. Design the output circuit.
Maximum fan motor current = 250 mA.
Q1 beta is chosen at 50 from which
R7 = 800 .
+5V
+5V
R1
20.5 kΩ
R2
3.83 kΩ
CB +
NTC
10 kΩ 1 μF
@ 25˚C
1
VIN
CB
0.01 μF
+12V
8
VDD
Fan
4
GND
FAULT
6
Fan/
Thermal Fault
R7
800Ω
+5V
TC642
R5
33 kΩ
Fan
Shutdown
Q2
R8
10 kΩ
R6
18 kΩ
VOUT
3
VMIN
CB
0.01 µF
2
CF
Q1
SENSE
7
5
CSENSE
0.1 μF
RSENSE
2.2Ω
C1
1μF
(Optional)
FIGURE 5-9:
Design Example.
2001-2012 Microchip Technology Inc.
DS21444D-page 15
TC642
5.8
TC642 as a Microcontroller
Peripheral
from the processor's outputs into a 1.6V DC control signal. A monolithic DAC or digital pot may be used
instead of the circuit shown in Figure 5-10.
In a system containing a microcontroller or other host
intelligence, the TC642 can be effectively managed as
a CPU peripheral. Routine fan control functions can be
performed by the TC642 without processor intervention.
The microcontroller receives temperature data from one
or more points throughout the system. It calculates a fan
operating speed based on an algorithm specifically
designed for the application at hand. The processor
controls fan speed using complementary port bits I/O1
through I/O3. Resistors R1 through R6 (5% tolerance)
form a crude 3-bit DAC that translates the 3-bit code
With VMIN set to 1.8V, the TC642 has a minimum
operating speed of approximately 40% of full rated
speed when the processor's output code is 000[B].
Output codes 001[B] to 111[B] operate the fan from
roughly 40% to 100% of full speed. An open-drain
output from the processor (I/O0) can be used to reset
the TC642 following detection of a fault condition. The
FAULT output can be connected to the processor's
interrupt input, or to an I/O pin, for polled operation.
+12V
+5V
Open-drain
(RESET) (Optional)
Outputs I/O0
I/O1
Analog or Digital
Temperature
Data from one or
more Sensors
CMOS
Outputs
1
R2
240 kΩ
I/O2
CB
.01 μF
R3
360 kΩ
I/O3
CMOS
Microcontroller
+5V
R1
(MSB) 110 kΩ
(LSB)
R5
1.5 kΩ
+5V
R6
1 kΩ
R7
33 kΩ
+5V
R8
18 kΩ
VDD
2
CF
+
R4
18 kΩ
VIN
1 μF
3
CB
.01 μF
4
VOUT
CB +
1 μF
R9
800Ω
7
TC642
VMIN
FAULT
GND
SENSE
Fan
8
6
5
2N2222A
+5V
R10
10 kΩ
0.1 μF
R11
2.2Ω
GND
FIGURE 5-10:
DS21444D-page 16
INT
TC642 as a Microcontroller Peripheral.
2001-2012 Microchip Technology Inc.
TC642
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
8-Lead PDIP (300 mil)
XXXXXXXX
NNN
YYWW
TC642CPA
025
0215
8-Lead SOIC (150 mil)
XXXXXXXX
YYWW
NNN
8-Lead MSOP
XXXXXX
YWWNNN
Legend: XX...X
YY
WW
NNN
Note:
*
Example:
Example:
TC642COA
0215
025
Example:
TC642E
215025
Customer specific information*
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
Standard marking consists of Microchip part number, year code, week code, traceability code (facility
code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please check
with your Microchip Sales Office.
2001-2012 Microchip Technology Inc.
DS21444D-page 17
TC642
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E1
D
2
n
1
E
A2
A
L
c
A1
B1
p
eB
B
Units
Dimension Limits
n
p
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
L
c
§
B1
B
eB
MIN
.140
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
5
INCHES*
NOM
MAX
8
.100
.155
.130
.170
.145
.313
.250
.373
.130
.012
.058
.018
.370
10
10
.325
.260
.385
.135
.015
.070
.022
.430
15
15
MILLIMETERS
NOM
8
2.54
3.56
3.94
2.92
3.30
0.38
7.62
7.94
6.10
6.35
9.14
9.46
3.18
3.30
0.20
0.29
1.14
1.46
0.36
0.46
7.87
9.40
5
10
5
10
MIN
MAX
4.32
3.68
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21444D-page 18
2001-2012 Microchip Technology Inc.
TC642
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E
E1
p
D
2
B
n
1
h
45×
c
A2
A
f
L
Units
Dimension Limits
n
p
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff §
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
A
A2
A1
E
E1
D
h
L
f
c
B
MIN
.053
.052
.004
.228
.146
.189
.010
.019
0
.008
.013
0
0
A1
INCHES*
NOM
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
.009
.017
12
12
MAX
.069
.061
.010
.244
.157
.197
.020
.030
8
.010
.020
15
15
MILLIMETERS
NOM
8
1.27
1.35
1.55
1.32
1.42
0.10
0.18
5.79
6.02
3.71
3.91
4.80
4.90
0.25
0.38
0.48
0.62
0
4
0.20
0.23
0.33
0.42
0
12
0
12
MIN
MAX
1.75
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
0.25
0.51
15
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
2001-2012 Microchip Technology Inc.
DS21444D-page 19
TC642
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E
p
E1
D
2
B
n
1
A2
A
c
A1
(F)
L
INCHES
Units
Number of Pins
Pitch
Dimension Limits
n
p
Overall Height
MILLIMETERS*
NOM
MIN
MAX
NOM
MIN
.026
0.65
1.18
.044
A
0.86
0.97
4.67
4.90
.5.08
.122
2.90
3.00
3.10
.122
2.90
3.00
3.10
.022
.028
0.40
0.55
0.70
.037
.039
0.90
0.95
1.00
6
0
.006
.008
0.10
0.15
0.20
.012
.016
0.25
0.30
0.40
.038
0.76
.006
0.05
.193
.200
.114
.118
.114
.118
L
.016
.035
Foot Angle
F
Lead Thickness
c
.004
Lead Width
B
.010
Mold Draft Angle Top
Mold Draft Angle Bottom
Molded Package Thickness
A2
.030
Standoff
A1
.002
E
.184
Molded Package Width
E1
Overall Length
D
Foot Length
Footprint (Reference)
§
Overall Width
MAX
8
8
.034
0
0.15
6
7
7
7
7
*Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed. 010" (0.254mm) per side.
Drawing No. C04-111
DS21444D-page 20
2001-2012 Microchip Technology Inc.
TC642
6.2
Taping Form
Component Taping Orientation for 8-Pin SOIC (Narrow) Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for 713 Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
8-Pin SOIC (N)
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
12 mm
8 mm
2500
13 in
Component Taping Orientation for 8-Pin MSOP Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for 713 Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
8-Pin MSOP
2001-2012 Microchip Technology Inc.
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
12 mm
8 mm
2500
13 in
DS21444D-page 21
TC642
7.0
REVISION HISTORY
Revision D (December 2012)
Added a note to each package outline drawing.
DS21444D-page 22
2001-2012 Microchip Technology Inc.
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
Technical support is available through the web site
at: http://microchip.com/support
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
2001-2012 Microchip Technology Inc.
DS21444D-page 23
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip
product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our
documentation can better serve you, please FAX your comments to the Technical Publications Manager at
(480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
TO:
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RE:
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Total Pages Sent ________
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Telephone: (_______) _________ - _________
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Application (optional):
Would you like a reply?
Y
N
Device:
Literature Number: DS21444D
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21444D-page 24
2001-2012 Microchip Technology Inc.
TC642
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XX
Temperature
Range
Device:
TC642:
Temperature Range:
C
V
E
Package:
Package
Examples:
a)
TC642COA: PWM Fan Speed Controller w/
Fault Detection, SOIC package.
b)
TC642COA713: PWM Fan Speed Controller
w/ Fault Detection, SOIC package, Tape and
Reel.
c)
TC642CPA: PWM Fan Speed Controller w/
d)
TC642EUA: PWM Fan Speed Controller w/
PWM Fan Speed Controller w/ Fault Detection
= 0C to +70C
= 0C to +85C
= -40C to +85C
Fault Detection, PDIP package.
Fault Detection, MSOP package.
PA = Plastic DIP (300 mil Body), 8-lead *
OA = Plastic SOIC, (150 mil Body), 8-lead
UA = Plastic Micro Small Outline (MSOP), 8-lead **
* PDIP is only offered in the C and V temp ranges
** MSOP is only available in the V and E temp ranges
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1.
2.
Your local Microchip sales office
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2001-2012 Microchip Technology Inc.
DS21444D-page25
TC642
NOTES:
DS21444D-page 26
2001-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2001-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620768266
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
2001-2012 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS21444D-page 27
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
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Tel: 480-792-7200
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Technical Support:
http://www.microchip.com/
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Web Address:
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Tel: 91-11-4160-8631
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Tel: 43-7242-2244-39
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Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
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Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
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China - Chongqing
Tel: 86-23-8980-9588
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Netherlands - Drunen
Tel: 31-416-690399
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Tel: 82-53-744-4301
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Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2943-5100
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Tel: 60-3-6201-9857
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Tel: 86-25-8473-2460
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Tel: 60-4-227-8870
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Tel: 86-532-8502-7355
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Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-213-7828
Fax: 886-7-330-9305
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
DS21444D-page 28
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
11/29/12
2001-2012 Microchip Technology Inc.
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