TC7129
4-1/2 Digit Analog-to-Digital Converters with
On-Chip LCD Drivers
Features:
General Description:
•
•
•
•
•
The TC7129 is a 4-1/2 digit Analog-to-Digital Converter
(ADC) that directly drives a multiplexed Liquid Crystal
Display (LCD). Fabricated in high-performance, lowpower CMOS, the TC7129 ADC is designed specifically for high-resolution, battery-powered digital multimeter applications. The traditional dual-slope method
of A/D conversion has been enhanced with a successive integration technique to produce readings accurate to better than 0.005% of full-scale and resolution
down to 10 V per count.
•
•
•
•
Count Resolution: ±19,999
Resolution on 200 mV Scale: 10 V
True Differential Input and Reference
Low Power Consumption: 500 A at 9V
Direct LCD Driver for 4-1/2 Digits, Decimal Points,
Low Battery Indicator, and Continuity Indicator
Overrange and Underrange Outputs
Range Select Input: 10:1
High Common Mode Rejection Ratio: 110 dB
External Phase Compensation Not Required
The TC7129 includes features important to multimeter
applications. It detects and indicates low battery condition. A continuity output drives an annunciator on the
display and can be used with an external driver to sound
an audible alarm. Overrange and underrange outputs,
along with a range-change input, provide the ability to
create auto-ranging instruments. For snapshot readings, the TC7129 includes a latch-and-hold input to
freeze the present reading. This combination of features
makes the TC7129 the ideal choice for full-featured
multimeter and digital measurement applications.
Applications:
• Full-Featured Multimeters
• Digital Measurement Devices
Device Selection Table
Package
Code
Pin
Layout
Package
Temperature
Range
TC7129CPL
Normal
40-Pin PDIP
0C to +70C
TC7129CKW
Formed
44-Pin PQFP
0C to +70C
TC7129CLW
–
44-Pin PLCC
0C to +70C
Typical Application
Low Battery
Continuity
V+
5 pF
20 19 18 17 16 15 14 13 12 11 10
9
7
8
6
5
4
3
2
1
TC7129
120 kHz
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
330 kΩ
*
0.1 µF
1 µF
+
10 pF
0.1
µF
20
kΩ
150 kΩ
0.1 µF
V+
10 kΩ
+
100 kΩ
9V
+
–
VIN
*Note: RC network between pins 26 and 28 is not required.
2002-2012 Microchip Technology Inc.
DS21459E-page 1
TC7129
Package Types
40-Pin PDIP
OSC1
1
40 OSC2
OSC3
2
39
ANNUNICATOR
3
38 DP2
B1, C1, CONT
4
37 RANGE
A1, G1, D1
5
36 DGND
F1, E1, DP1
6
35 REF LO
B2, C2, LO BATT
7
34 REF HI
A2, G2, D2
8
33 IN HI
F2, E2, DP2
9
32
IN LO
31
BUFF
A3, G3, D3 11
30 CREF-
F3, E3, DP3
12
29 CREF+
B4, C4, BC5
13
28 COMMON
24 V+
BP1
18
23 V-
VDISP
19
22 LATCH/HOLD
DP4/OR
20
21 DP3/UR
OSC2
17
NC
25 INT IN
BP2
OSC1
16
OSC3
26 INT OUT
BP3
ANNUNCIATOR
27 CONTINUITY
15
B1, C1, CONT
14
A1, G1, D1
A4, G4, D4
F4, E4, DP4
6
5
4
3
2
1
44 43 42 41 40
44 43 42 41 40 39 38 37 36 35 34
F1, E1, DP1 1
DGND
RANGE
39 REF LO
F1, E1, DP1 7
33 REF LO
32 REF HI
B2, C2, BATT 2
44-Pin PLCC
DP2
DGND
RANGE
DP1
DP2
OSC2
NC
OSC1
44-Pin QFP
OSC3
ANNUNCIATOR
B1, C1, CONT
A1, G1, D1
Display
Output
Lines
TC7129CPL
DP1
B3, C3, MINUS 10
DP1
B2, C2, BATT
8
38 REF HI
A2, G2, D2
9
37 IN HI
A2, G2, D2 3
31 IN HI
F2, E2, DP2 4
30 IN LO
F2, E2, DP2 10
36 IN LO
B3, C3, MINUS 5
29 BUFF
B3, C3, MINUS 11
35 BUFF
NC 6
28 NC
TC7129CKW
NC 12
34 NC
TC7129CLW
A3, G3, D3 7
27 CREF-
A3, G3, D3 13
33 CREF-
F3, E3, DP3 8
26 CREF+
F3, E3, DP3 14
32 CREF+
B4, C4, BC5 9
25 COMMON
B4, C4, BC5 15
31 COMMON
DS21459E-page 2
29 INT OUT
V+
INT IN
V-
LATCH/HOLD
DP3/UR
NC
DP4/OR
18 19 20 21 22 23 24 25 26 27 28
VDISP
INT IN
V-
V+
LATCH/HOLD
DP3/UR
NC
DP4/OR
VDISP
BP1
BP2
BP3
12 13 14 15 16 17 18 19 20 21 22
30 CONTINUITY
F4, E4, DP4 17
BP1
23 INT OUT
F4, E4, DP4 11
A4, G4, D4 16
BP3
24 CONTINUITY
BP2
A4, G4, D4 10
2002-2012 Microchip Technology Inc.
TC7129
1.0
ELECTRICAL
CHARACTERISTICS
*Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device. These
are stress ratings only and functional operation of the device
at these or any other conditions above those indicated in the
operation sections of the specifications is not implied.
Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.
Absolute Maximum Ratings*
Supply Voltage (V+ to V-)....................................... 15V
Reference Voltage (REF HI or REF LO) ........ V+ to V–
Input Voltage (IN HI or IN LO) (Note 1).......... V+ to V–
VDISP .......................................... V+ to (DGND – 0.3V)
Digital Input (Pins 1, 2, 19, 20,
21, 22, 27, 37, 39, 40) .......................... DGND to V+
Analog Input (Pins 25, 29, 30) ....................... V+ to V–
Package Power Dissipation (TA 70°C)
Plastic DIP ..................................................... 1.23W
PLCC ............................................................. 1.23W
Plastic QFP .................................................... 1.00W
Operating Temperature Range ............... 0°C to +70°C
Storage Temperature Range.............. -65°C to +150°C
TC7129 ELECTRICAL SPECIFICATIONS
Electrical Characteristics: V+ to V– = 9V, VREF = 1V, TA = +25°C, fCLK = 120 kHz, unless otherwise indicated.
Pin numbers refer to 40-pin DIP.
Symbol
Parameter
Min
Typ
Max
Zero Input Reading
–0000
0000
+0000
Zero Reading Drift
—
±0.5
—
9996
—
10000
0.9999
1.0000
1.0001
1
2
Unit
Test Conditions
Input
Ratiometric Reading
Range Change Accuracy
Counts VIN = 0V, 200 mV scale
V/°C
VIN = 0V, 0°C < TA < +70°C
Counts VIN = VREF = 1000 mV,
Range = 2V
Ratio
VIN = 1V on High Range,
VIN = 0.1V on Low Range
RE
Rollover Error
—
NL
Linearity Error
—
1
—
CMRR
Common Mode Rejection Ratio
—
110
—
dB
VCM = 1V, VIN = 0V,
200 mV scale
CMVR
Common Mode Voltage Range
—
(V-) +
1.5
—
V
VIN = 0V
—
(V+) – 1
—
V
200 mV scale
eN
Noise (Peak-to-Peak Value not
Exceeded 95% of Time)
—
14
—
VP-P
VIN = 0V
200 mV scale
IIN
Input Leakage Current
—
1
10
pA
Scale Factor Temperature
Coefficient
—
2
7
Note 1:
Counts VIN– = VIN+ = 199 mV
Counts 200mV Scale
VIN = 0V, pins 32, 33
ppm/°C VIN = 199 mV,
0°C < TA < +70°C
External VREF = 0 ppm/°C
Input voltages may exceed supply voltages, provided input current is limited to ±400 A. Currents above
this value may result in invalid display readings, but will not destroy the device if limited to ±1 mA.
Dissipation ratings assume device is mounted with all leads soldered to printed circuit board.
2002-2012 Microchip Technology Inc.
DS21459E-page 3
TC7129
TC7129 ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: V+ to V– = 9V, VREF = 1V, TA = +25°C, fCLK = 120 kHz, unless otherwise indicated.
Pin numbers refer to 40-pin DIP.
Symbol
Parameter
Min
Typ
Max
Unit
2.8
3.2
3.5
V
Test Conditions
Power
VCOM
DGND
Common Voltage
V+ to pin 28
Common Sink Current
—
0.6
—
mA
Common = +0.1V
Common Source Current
—
10
—
A
Common = -0.1V
Digital Ground Voltage
4.5
5.3
5.8
V
V+ to pin 36, V+ to V– = 9V
Sink Current
—
1.2
—
mA
Supply Voltage Range
6
9
12
V
IS
Supply Current Excluding
Common Current
—
0.8
1.3
mA
fCLK
Clock Frequency
—
120
360
kHz
DGND = +0.5V
V+ to V–
V+ to V– = 9V
VDISP Resistance
—
50
—
k
Low Battery Flag Activation
Voltage
6.3
7.2
7.7
V
VDISP to V+
Continuity Comparator Threshold
Voltages
100
200
—
mV
VOUT pin 27 = High
V+ to V–
Digital
Note 1:
—
200
400
mV
VOUT pin 27 = Low
Pull-down Current
—
2
10
A
Pins 37, 38, 39
“Weak Output” Current
Sink/Source
—
3/3
—
A
Pins 20, 21 sink/source
—
3/9
—
A
Pin 27 sink/source
Pin 22 Source Current
—
40
—
A
Pin 22 Sink Current
—
3
—
A
Input voltages may exceed supply voltages, provided input current is limited to ±400 A. Currents above
this value may result in invalid display readings, but will not destroy the device if limited to ±1 mA.
Dissipation ratings assume device is mounted with all leads soldered to printed circuit board.
DS21459E-page 4
2002-2012 Microchip Technology Inc.
TC7129
2.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin No.
Pin No.
Pin No.
40-Pin PDIP 44-Pin PQFP 44-Pin PLCC
2
Symbol
OSC1
Function
1
40
Input to first clock inverter.
2
41
3
OSC3
3
42
4
ANNUNCIATOR
4
43
5
B1, C1, CONT
Output to display segments.
5
44
6
A1, G1, D1
Output to display segments.
6
1
7
F1, E1, DP1
Output to display segments.
7
2
8
B2 , C 2 ,
LO BATT
Output to display segments.
Output of second clock inverter.
Backplane square wave output for driving annunciators.
8
3
9
A2, G2, D2
Output to display segments.
9
4
10
F2, E2, DP2
Output to display segments.
10
5
11
B3, C3, MINUS
Output to display segments.
11
7
13
A3, G3, D3
Output to display segments.
12
8
14
F3, E3, DP3
Output to display segments.
13
9
15
B4, C4, BC5
Output to display segments.
14
10
16
A4, D4, G4
Output to display segments.
15
11
17
F4, E4, DP4
Output to display segments.
16
12
18
BP3
Backplane #3 output to display.
17
13
19
BP2
Backplane #2 output to display.
18
14
20
BP1
Backplane #1 output to display.
19
15
21
VDISP
Negative rail for display drivers.
20
16
22
DP4/OR
Input: When high, turns on most significant decimal point.
Output: Pulled high when result count exceeds ±19,999.
21
18
24
DP3/UR
Input: Second-most significant decimal point on when high.
Output: Pulled high when result count is less than ±1000.
22
19
25
LATCH/HOLD
Input: When floating, ADC operates in Free Run mode. When
pulled high, the last displayed reading is held. When pulled low,
the result counter contents are shown incrementing during the
de-integrate phase of cycle.
Output: Negative going edge occurs when the data latches are
updated. Can be used for converter status signal.
23
20
26
V–
Negative power supply terminal.
24
21
27
V+
Positive power supply terminal and positive rail for display
drivers.
25
22
28
INT IN
26
23
29
INT OUT
27
24
30
CONTINUITY
28
25
31
COMMON
29
26
32
CREF+
Positive side of external reference capacitor.
30
27
33
CREF–
Negative side of external reference capacitor.
31
29
35
BUFFER
Input to integrator amplifier.
Output of integrator amplifier.
Input: When low, continuity flag on the display is off. When high,
continuity flag is on.
Output: High when voltage between inputs is less than +200 mV.
Low when voltage between inputs is more than +200 mV.
Sets common mode voltage of 3.2V below V+ for DE, 10X, etc.
Can be used as pre-regulator for external reference.
Output of buffer amplifier.
32
30
36
IN LO
Negative input voltage terminal.
33
31
37
IN HI
Positive input voltage terminal.
34
32
38
REF HI
Positive reference voltage.
35
33
39
REF LO
Negative reference voltage
2002-2012 Microchip Technology Inc.
DS21459E-page 5
TC7129
TABLE 2-1:
PIN FUNCTION TABLE (CONTINUED)
Pin No.
Pin No.
Pin No.
40-Pin PDIP 44-Pin PQFP 44-Pin PLCC
Symbol
Function
36
34
40
DGND
Internal ground reference for digital section. See Section 4.2.1
“±5V Power Supply”.
37
35
41
RANGE
3 A pull-down for 200 mV scale. Pulled high externally for 2V
scale.
38
36
42
DP2
Internal 3 A pull-down. When high, decimal point 2 will be on.
39
37
43
DP1
40
38
44
OSC2
—
6,17, 28, 39
12, 23, 34, 1
NC
DS21459E-page 6
Internal 3 A pull-down. When high, decimal point 1 will be on.
Output of first clock inverter. Input of second clock inverter.
No connection.
2002-2012 Microchip Technology Inc.
TC7129
3.0
DETAILED DESCRIPTION
(All pin designations refer to 40-pin PDIP.)
The TC7129 is designed to be the heart of a highresolution analog measurement instrument. The only
additional components required are a few passive
elements: a voltage reference, a LCD and a power
source. Most component values are not critical;
substitutes can be chosen based on the information
given below.
The basic circuit for a digital multimeter application is
shown in Figure 3-1. See Section 4.0 “Typical Applications”, for variations. Typical values for each
component are shown. The sections below give
component selection criteria.
3.1
Oscillator (XOSC, CO1, CO2, RO)
The primary criterion for selecting the crystal oscillator
is to choose a frequency that achieves maximum rejection of line frequency noise. To do this, the integration
phase should last an integral number of line cycles.
The integration phase of the TC7129 is 10,000 clock
cycles on the 200 mV range and 1000 clock cycles on
the 2V range. One clock cycle is equal to two oscillator
cycles. For 60 Hz rejection, the oscillator frequency
should be chosen so that the period of one line cycle
equals the integration time for the 2V range.
The resistor and capacitor values are not critical; those
shown work for most applications. In some situations,
the capacitor values may have to be adjusted to
compensate for parasitic capacitance in the circuit. The
capacitors can be low-cost ceramic devices.
Some applications can use a simple RC network
instead of a crystal oscillator. The RC oscillator has
more potential for jitter, especially in the least
significant digit. See Section 4.5 “RC Oscillator”.
3.2
Integrating Resistor (RINT)
The integrating resistor sets the charging current for
the integrating capacitor. Choose a value that provides
a current between 5 A and 20 A at 2V, the maximum
full-scale input. The typical value chosen gives a
charging current of 13.3 A:
EQUATION 3-1:
ICHARGE =
2V
13.3 µA
150 k
Too high a value for RINT increases the sensitivity to
noise pickup and increases errors due to leakage
current. Too low a value degrades the linearity of the
integration, leading to inaccurate readings.
EQUATION 3-1:
1/60 second = 16.7 msec =
1000 clock cycles *2 OSC cycles/clock cycle
OSC Frequency
This equation gives an oscillator frequency of 120 kHz.
A similar calculation gives an optimum frequency of
100 kHz for 50 Hz rejection.
2002-2012 Microchip Technology Inc.
DS21459E-page 7
TC7129
Low Battery
Continuity
V+
12
11
9
10
7
8
6
5
4
OSC2
32
DP1
31
DP2
30
RANGE
29
DGND
28
REF LO
27
1
IN HI
IN LO
26
2
REF HI
BUFF
25
CREF–
24
INT IN
V+
23
TC7129
3
OSC1
13
OSC3
14
ANNUNC
15
CREF+
VDISP
22
16
Display Drive Outputs
V–
LATCH/
HOLD
DP3 /UR
21
17
COMMON
DP4 /OR
18
INT OUT
19
CONTINUITY
20
33
34
35
36
37
38
39
40
5 pF
CO1
120
kHz
Crystal
330 kΩ
RO
10 pF
CINT
0.1 µF
CREF+
1 µF
150 kΩ
RINT
+
9V
RREF
20
kΩ
0.1
µF
DREF
CRF
0.1 µF
CO2
V+
CIF
10 kΩ
RBIAS
RIF
100 kΩ
–
+
VIN
Figure 3-1:
3.3
Standard Circuit.
Integrating Capacitor (CINT)
The charge stored in the integrating capacitor during
the integrate phase is directly proportional to the input
voltage. The primary selection criterion for CINT is to
choose a value that gives the highest voltage swing
while remaining within the high-linearity portion of the
integrator output range. An integrator swing of 2V is the
recommended value. The capacitor value can be
calculated using the following equation:
EQUATION 3-1:
xI
t
CINT = INT INT
VSWING
Where tINT is the integration time.
Using the values derived above (assuming 60 Hz
operation), the equation becomes:
EQUATION 3-2:
CINT = 16.7 msec x 13.3 A = 0.1 A
2V
DS21459E-page 8
The capacitor should have low dielectric absorption to
ensure good integration linearity. Polypropylene and
Teflon® capacitors are usually suitable. A good
measurement of the dielectric absorption is to connect
the reference capacitor across the inputs by
connecting:
Pin-to-Pin:
20 33 (CREF+ to IN HI)
30 32 (CREF– to IN LO)
A reading between 10,000 and 9998 is acceptable;
anything lower indicates unacceptably high dielectric
absorption.
3.4
Reference Capacitor (CREF)
The reference capacitor stores the reference voltage
during several phases of the measurement cycle. Low
leakage is the primary selection criterion for this component. The value must be high enough to offset the
effect of stray capacitance at the capacitor terminals. A
value of at least 1 F is recommended.
2002-2012 Microchip Technology Inc.
TC7129
3.5
Voltage Reference
(DREF, RREF, RBIAS, CRF)
+5V
TC7129
The reference potentiometer (RREF) provides an
adjustment for adjusting the reference voltage; any
value above 20 k is adequate. The bias resistor
(RBIAS) limits the current through DREF to less than
150 A. The reference filter capacitor (CRF) forms an
RC filter with RBIAS to help eliminate noise.
3.6
24
V+
35
REF LO
36 DGND
28
COMMON
0.1 µF
33
IN HI
Input Filter (RIF, CIF)
For added stability, an RC input noise filter is usually
included in the circuit. The input filter resistor value
should not exceed 100 k. A typical RC time constant
value is 16.7 msec to help reject line frequency noise.
The input filter capacitor should have low leakage for a
high-impedance input.
3.7
4.0
TYPICAL APPLICATIONS
4.1
TC7129 as a Replacement Part
The TC7129 is a direct pin-for-pin replacement part for
the ICL7129. Note, however, that the ICL7129 requires
a capacitor and resistor between pins 26 and 28 for
phase compensation. Since the TC7129 uses internal
phase compensation, these parts are not required and,
in fact, must be removed from the circuit for stable
operation.
4.2
±5V Power Supply
Measurements are made with respect to power supply
ground. DGND (pin 36) is set internally to about 5V less
than V+ (pin 24); it is not intended to be a power supply
input and must not be tied directly to power supply
ground. It can be used as a reference for external logic,
as explained in Section 4.3 “Connecting to External
Logic”, (see Figure 4-1).
2002-2012 Microchip Technology Inc.
+
VIN
32
–
-5V
Figure 4-1:
Powering the TC7129 From
a ±5V Power Supply.
4.2.2
Low Voltage Battery Source
A battery with voltage between 3.8V and 6V can be
used to power the TC7129 when used with a voltage
doubler circuit, as shown in Figure 4-2. The voltage
doubler uses the TC7660 DC-to-DC voltage converter
and two external capacitors.
24
V+
REF HI
36
3.8V
to
6V
REF LO
COMMON
TC7129
IN HI
8
IN LO
V–
2
+
TC7660
34
DGND
+
Powering the TC7129
While the most common power source for the TC7129
is a 9V battery, there are other possibilities. Some of
the more common ones are explained below.
4.2.1
IN LO
V–
23
0.1 µF
Battery
The typical circuit uses a 9V battery as a power source.
However, any value between 6V and 12V can be used.
For operation from batteries with voltages lower than
6V and for operation from power supplies, see
Section 4.2 “Powering the TC7129”.
34
REF HI
0.1 µF
10 µF
35
28
33
32
+
VIN
–
23
4
5
3
10 µF
+
Figure 4-2:
Powering the TC7129 From
a Low-Voltage Battery.
DS21459E-page 9
TC7129
4.2.3
+5V Power Supply
V
Measurements are made with respect to power supply
ground. COMMON (pin 28) is connected to REF LO
(pin 35). A voltage doubler is needed, since the supply
voltage is less than the 6V minimum needed by the
TC7129. DGND (pin 36) must be isolated from power
supply ground (see Figure 4-3).
+
24
External
Logic
TC7129
+5V
36
ILOGIC
24
V+
DGND
23
34
0.1 µF
TC7129
V35
36
DGND
28
0.1 µF
33
8
V+
32
2
V–
+
TC7660
+
Figure 4-4:
Directly to DGND.
External Logic Referenced
VIN
V+
–
23
10 µF
24
4
5
GND
3
External
Logic
10 µF
TC7129
+
–
Figure 4-3:
Powering the TC7129 From
a +5V Power Supply.
+
ILOGIC
4.3
Connecting to External Logic
External logic can be directly referenced to DGND
(pin 36), provided that the supply current of the external
logic does not exceed the sink current of DGND
(Figure 4-4). A safe value for DGND sink current is
1.2 mA. If the sink current is expected to exceed this
value, a buffer is recommended (see Figure 4-5).
36
DGND
23
V–
Figure 4-5:
External Logic Referenced
to DGND with Buffer.
4.4
Temperature Compensation
For most applications, VDISP (pin 19) can be connected
directly to DGND (pin 36). For applications with a wide
temperature range, some LCDs require that the drive
levels vary with temperature to maintain good viewing
angle and display contrast. Figure 4-6 shows two
circuits that can be adjusted to give temperature compensation of about 10 mV/°C between V+ (pin 24) and
VDISP. The diode between DGND and VDISP should
have a low turn-on voltage because VDISP cannot
exceed 0.3V below DGND.
DS21459E-page 10
2002-2012 Microchip Technology Inc.
TC7129
V+
1N4148
39 kΩ
V+
39 kΩ
24
200 kΩ
TC7129
–
19
+
5 kΩ
36
20 kΩ
24
2N2222
19
VDISP
36
DGND
75 kΩ
DGND
23
V–
V–
4.5
VDISP
18 kΩ
23
Figure 4-6:
TC7129
Temperature Compensating Circuits.
RC Oscillator
4.6
Measuring Techniques
For applications in which 3-1/2 digit (100 V) resolution
is sufficient, an RC oscillator is adequate. A recommended value for the capacitor is 51 pF. Other values
can be used as long as they are sufficiently larger than
the circuit parasitic capacitance. The resistor value is
calculated as:
Two important techniques are used in the TC7129:
successive integration and digital auto-zeroing.
Successive integration is a refinement to the traditional
dual-slope conversion technique.
EQUATION 4-1:
A dual-slope conversion has two basic phases: integrate and de-integrate. During the integrate phase, the
input signal is integrated for a fixed period of time; the
integrated voltage level is thus proportional to the input
voltage. During the de-integrate phase, the integrated
voltage is ramped down at a fixed slope, and a counter
counts the clock cycles until the integrator voltage
crosses zero. The count is a measurement of the time
to ramp the integrated voltage to zero and is, therefore,
proportional to the input voltage being measured. This
count can then be scaled and displayed as a measurement of the input voltage. Figure 4-8 shows the phases
of the dual-slope conversion.
R=
0.45
Freq * C
For 120 kHz frequency and C = 51 pF, the calculated
value of R is 75 k. The RC oscillator and the crystal
oscillator circuits are shown in Figure 4-7.
TC7129
1
5 pF
40
120 kHz
4.7
Dual-Slope Conversion
2
270 kΩ
10 pF
V+
Integrate
De-integrate
V+
Zero
Crossing
TC7129
Time
1
40
75 kΩ
51 pF
Figure 4-7:
Oscillator Circuits.
2002-2012 Microchip Technology Inc.
2
Figure 4-8:
Dual-Slope Conversion.
The dual-slope method has a fundamental limitation.
The count can only stop on a clock cycle, so that measurement accuracy is limited to the clock frequency. In
addition, a delay in the zero-crossing comparator can
add to the inaccuracy. Figure 4-9 shows these errors in
an actual measurement.
DS21459E-page 11
TC7129
Integrate
De-integrate
Overshoot due to zero-crossing between
clock pulses
Time
Integrator Residue Voltage
Overshoot caused by comparator
delay of 1 clock pulse
Clock Pulses
Figure 4-9:
Zero Integrate
and Latch
Accuracy Errors in Dual-Slope Conversion.
INT1
Integrate
DE1
De-integrate
REST X10
DE2
REST
X10
DE3
Zero Integrate
TC7129
Integrator
Residual Voltage
Note: Shaded area greatly expanded in time and amplitude.
Figure 4-10:
DS21459E-page 12
Integration Waveform.
2002-2012 Microchip Technology Inc.
TC7129
4.8
Successive Integration
The successive integration technique picks up where
dual-slope conversion ends. The overshoot voltage
shown in Figure 4-9 (called the “integrator residue
voltage”) is measured to obtain a correction to the initial
count. Figure 4-10 shows the cycles in a successive
integration measurement.
The waveform shown is for a negative input signal. The
sequence of events during the measurement cycle is
shown in Table 4-1.
TABLE 4-1:
MEASUREMENT CYCLE
SEQUENCE
Phase
Description
INT1
Input signal is integrated for fixed time (1000 clock
cycles on 2V scale, 10,000 on 200 mV).
DE1
Integrator voltage is ramped to zero. Counter
counts up until zero-crossing to produce reading
accurate to 3-1/2 digits. Residue represents an
overshoot of the actual input voltage.
4.9
Digital Auto-Zeroing
To eliminate the effect of amplifier offset errors, the
TC7129 uses a digital auto-zeroing technique. After the
input voltage is measured as described above, the
measurement is repeated with the inputs shorted
internally. The reading with inputs shorted is a
measurement of the internal errors and is subtracted
from the previous reading to obtain a corrected
measurement. Digital auto-zeroing eliminates the need
for an external auto-zeroing capacitor used in other
ADCs.
4.10
Inside the TC7129
Figure 4-11 shows a simplified block diagram of the
TC7129.
REST Rest; circuit settles.
X10
Residue voltage is amplified 10 times and
inverted.
DE2
Integrator voltage is ramped to zero. Counter
counts down until zero-crossing to correct reading
to 4-1/2 digits. Residue represents an undershoot
of the actual input voltage.
REST Rest; circuit settles.
X10
Residue voltage is amplified 10 times and
inverted.
DE3
Integrator voltage is ramped to zero. Counter
counts up until zero-crossing to correct reading to
5-1/2 digits. Residue is discarded.
2002-2012 Microchip Technology Inc.
DS21459E-page 13
TC7129
Low Battery
Continuity
Backplane
Drives
Segment Drives
TC7129
Annunciator
Drive
OSC1
VDISP
Latch, Decode Display Multiplexer
OSC2
Up/Down Results Counter
OSC3
Sequence Counter/Decoder
Control Logic
DP1
DP2
UR/DP3
RANGE
L/H
CONT
OR/DP4
V+
V–
Analog Section
REF HI
REF LO
DGND
INT OUT
INT IN
COMMON
Figure 4-11:
BUFF
IN IN
HI LO
TC7129 Functional Block Diagram.
CREF
REF HI
CINT
RINT
REF LO
DE
DE
Integrator
–
INT1
–
+
IN HI
DE-
Buffer
DE+
10
pF
+
+
100 pF
DE–
DE+
Common
INT
INT1, INT2
X10
Comparator 1
To Digital
Section
–
Comparator 2
ZI, X10
REST
IN LO
–
–
Continuity
Figure 4-12:
DS21459E-page 14
+
V
200 mV
+
500 kΩ
Continuity
Comparator
TC7129
To Display Driver
Integrator Block Diagram.
2002-2012 Microchip Technology Inc.
TC7129
4.11
Integrator Section
The integrator section includes the integrator, comparator, input buffer amplifier and analog switches (see
Table 4-2) used to change the circuit configuration
during the separate measurement phases described
earlier. (See Figure 4-12).
TABLE 4-2:
Description
Open during all de-integrate phases.
DE–
Closed during all de-integrate phases when
input voltage is negative.
DE+
Closed during all de-integrate phases when
input voltage is positive.
INT1
Closed during the first integrate phase
(measurement of the input voltage).
INT2
Closed during the second integrate phase
(measurement of the amplifier offset).
INT
Open during both integrate phases.
ZI
TC7129
IN LO
–
200 mV
V
+
Figure 4-13:
Closed during the rest phase.
Closed during the X10 phase.
X10
Open during the X10 phase.
The buffer amplifier has a common mode input voltage
range from 1.5V above V– to 1V below V+. The integrator amplifier can swing to within 0.3V of the rails.
However, for best linearity, the swing is usually limited
to within 1V. Both amplifiers can supply up to 80 A of
output current, but should be limited to 20 A for good
linearity.
Continuity Indicator
A comparator with a 200 mV threshold is connected
between IN HI (pin 33) and IN LO (pin 32). Whenever
the voltage between inputs is less than 200 mV, the
CONTINUITY output (pin 27) will be pulled high,
activating the continuity annunciator on the display.
The continuity pin can also be used as an input to drive
the continuity annunciator directly from an external
source (see Figure 4-13).
500 kΩ
To Display Driver
(Not Latched)
CONT
Continuity Indicator Circuit.
TC7129
Closed during the zero integrate phase.
X10
4.12
Buffer
COM
Meaning.
DE
REST
+
IN HI
SWITCH LEGENDS
Label
Label
–
DP4/OR, Pin 20
DP3/UR, Pin 21
LATCH/HOLD Pin 22
CONTINUITY, Pin 27
Figure 4-14:
4.13
500 kΩ
Input/Output Pin Schematic.
Common and Digital Ground
The common and digital ground (DGND) outputs are
generated from internal Zener diodes. The voltage
between V+ and DGND is the internal supply voltage
for the digital section of the TC7129. Common can
source approximately 12 A; DGND has essentially no
source capability (see Figure 4-15).
A schematic of the input/output nature of this pin is also
shown in Figure 4-14.
2002-2012 Microchip Technology Inc.
DS21459E-page 15
TC7129
4.17
24
12 µA
V+
3.2V
28
COM
–
5V
N
+
Logic
Section
36
P
TC7129
DGND
N
V–
Figure 4-15:
Digital Ground (DGND) and
Common Outputs.
4.14
Low Battery
The low battery annunciator turns on when supply voltage between V– and V+ drops below 6.8V. The internal
zener diode has a threshold of 6.3V. When the supply
voltage drops below 6.8V, the transistor tied to V– turns
off pulling the “Low Battery” point high.
4.15
Sequence and Results Counter
A sequence counter and associated control logic provide signals that operate the analog switches in the
integrator section. The comparator output from the integrator gates the results counter. The results counter is
a six-section up/down decade counter that holds the
intermediate results from each successive integration.
4.16
The L/H output goes low during the last 100 cycles of
each conversion. This pulse latches the conversion
data into the display driver section of the TC7129. This
pin can also be used as an input. When driven high, the
display will not be updated; the previous reading is
displayed. When driven low, the display reading is not
latched; the sequence counter reading will be
displayed. Since the counter is counting much faster
than the backplanes are being updated, the reading
shown in this mode is somewhat erratic.
4.18
23
Overrange and Underrange
Outputs
LATCH/Hold
Display Driver
The TC7129 drives a triplexed LCD with three backplanes. The LCD can include decimal points, polarity
sign and annunciators for continuity and low battery.
Figure 4-16 shows the assignment of the display
segments to the backplanes and segment drive lines.
The backplane drive frequency is obtained by dividing
the oscillator frequency by 1200. This results in a backplane drive frequency of 100 Hz for 60 Hz operation
(120 kHz crystal) and 83.3 Hz for 50 Hz operation
(100 kHz crystal).
Backplane waveforms are shown in Figure 4-17.
These appear on outputs BP1, BP2, BP3 (pins 16, 17
and 18). They remain the same, regardless of the
segments being driven.
Other display output lines (pins 4 through 15) have
waveforms that vary depending on the displayed
values. Figure 4-18 shows a set of waveforms for the
A, G, D outputs (pins 5, 8, 11 and 14) for several
combinations of “ON” segments.
The ANNUNCIATOR DRIVE output (pin 3) is a square
wave, running at the backplane frequency (100 Hz or
83.3 Hz) with a peak-to-peak voltage equal to DGND
voltage. Connecting an annunciator to pin 3 turns it on;
connecting it to its backplane turns it off.
When the results counter holds a value greater than
±19,999, the DP4/OR output (Pin 20) is driven high.
When the results counter value is less than ±1000, the
DP3/UR output (Pin 21) is driven high. Both signals are
valid on the falling edge of LATCH/HOLD (L/H) and do
not change until the end of the next conversion cycle.
The signals are updated at the end of each conversion,
unless the L/H input (Pin 22) is held high. Pins 20 and
21 can also be used as inputs for external control of
decimal points 3 and 4. Figure 4-14 shows a schematic
of the input/output nature of these pins.
DS21459E-page 16
2002-2012 Microchip Technology Inc.
TC7129
Low Battery
Continuity
BP1
BP2
Backplane
Connections
BP3
Low Battery
Continuity
F4, E4, DP4
B1, C1, Continuity
A4, G4, D4
A1, G1, D1
F1, E1, DP1
B4, C4, BC4
F3, E3, DP3
B2, C2, Low Battery
A3, G3, D3
A2, G2, D2
B3, C3, MINUS
Figure 4-16:
F2, E2, DP2
Display Segment Assignments.
BP1
b Segment
Line
All Off
BP2
a Segment
On
d, g Off
BP3
a, g On
d Off
Figure 4-17:
VDD
VH
VL
VDISP
VDD
VH
VL
VDISP
VDD
VH
VL
VDISP
VDD
VH
Backplane Waveforms.
All On
VL
VDISP
Figure 4-18:
Waveforms.
2002-2012 Microchip Technology Inc.
Typical Display Output
DS21459E-page 17
TC7129
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
Package marking data not available a this time.
5.2
Taping Forms
Us er Direction of F eed
P in 1
W, Width
of C arrier
T ape
P in 1
P , P itch
S tandard R eel C omponent Orientation
R evers e R eel C omponent Orientation
Component Taping Orientation for 44-Pin PQFP Devices
User Direction of Feed
Pin 1
W
P
Standard Reel Component Orientation
for 713 Suffix Device
Carrier Tape, Number of Components Per Reel and Reel Size
Package
44-Pin PQFP
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
24 mm
16 mm
500
13 in
Note: Drawing does not represent total number of pins.
DS21459E-page 18
2002-2012 Microchip Technology Inc.
TC7129
40-Lead Plastic Dual In-line (P) – 600 mil Body (PDIP)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E1
D
2
1
n
E
A2
A
L
c
B1
A1
eB
p
B
Units
Dimension Limits
n
p
INCHES*
NOM
40
.100
.175
.150
MAX
MILLIMETERS
NOM
40
2.54
4.06
4.45
3.56
3.81
0.38
15.11
15.24
13.46
13.84
51.94
52.26
3.05
3.30
0.20
0.29
0.76
1.27
0.36
0.46
15.75
16.51
5
10
5
10
MAX
Number of Pins
Pitch
Top to Seating Plane
A
.160
.190
4.83
Molded Package Thickness
.140
.160
4.06
A2
Base to Seating Plane
A1
.015
Shoulder to Shoulder Width
E
.595
.600
.625
15.88
Molded Package Width
E1
.530
.545
.560
14.22
Overall Length
D
2.045
2.058
2.065
52.45
Tip to Seating Plane
L
.120
.130
.135
3.43
c
Lead Thickness
.008
.012
.015
0.38
Upper Lead Width
B1
.030
.050
.070
1.78
Lower Lead Width
B
.014
.018
.022
0.56
Overall Row Spacing
§
eB
.620
.650
.680
17.27
Mold Draft Angle Top
5
10
15
15
Mold Draft Angle Bottom
5
10
15
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.
JEDEC Equivalent: MO-011
Drawing No. C04-016
2002-2012 Microchip Technology Inc.
MIN
MIN
DS21459E-page 19
TC7129
44-Lead Plastic Leaded Chip Carrier (LW) – Square (PLCC)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E
E1
#leads=n1
D1 D
n 1 2
CH1 x 45
CH2 x 45
A3
A2
35
A
B1
B
c
E2
Units
Dimension Limits
n
p
A1
p
D2
INCHES*
NOM
44
.050
11
.165
.173
.145
.153
.020
.028
.024
.029
.040
.045
.000
.005
.685
.690
.685
.690
.650
.653
.650
.653
.590
.620
.590
.620
.008
.011
.026
.029
.013
.020
0
5
0
5
MAX
MILLIMETERS
NOM
44
1.27
11
4.19
4.39
3.68
3.87
0.51
0.71
0.61
0.74
1.02
1.14
0.00
0.13
17.40
17.53
17.40
17.53
16.51
16.59
16.51
16.59
14.99
15.75
14.99
15.75
0.20
0.27
0.66
0.74
0.33
0.51
0
5
0
5
MAX
Number of Pins
Pitch
Pins per Side
n1
Overall Height
A
.180
4.57
Molded Package Thickness
A2
.160
4.06
Standoff
§
A1
.035
0.89
Side 1 Chamfer Height
A3
.034
0.86
Corner Chamfer 1
CH1
.050
1.27
.010
0.25
Corner Chamfer (others)
CH2
Overall Width
E
.695
17.65
Overall Length
D
.695
17.65
Molded Package Width
E1
.656
16.66
Molded Package Length
D1
.656
16.66
Footprint Width
.630
16.00
E2
Footprint Length
D2
.630
16.00
c
Lead Thickness
.013
0.33
Upper Lead Width
B1
.032
0.81
B
.021
0.53
Lower Lead Width
Mold Draft Angle Top
10
10
Mold Draft Angle Bottom
10
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.
JEDEC Equivalent: MO-047
Drawing No. C04-048
DS21459E-page 20
MIN
MIN
2002-2012 Microchip Technology Inc.
TC7129
44-Lead Plastic Quad Flatpack (KW) 10x10x2.0 mm Body, 1.95/0.25 mm Lead Form (PQFP)
Note:
For the most current package drawings, please see the Microchip Packaging Specification located
at http://www.microchip.com/packaging
E
E1
p
D1
D
2
1
B
n
CHAMFER VARIES
c
A2
L
Units
Dimension Limits
A
F
A1
INCHES
MIN
MILLIMETERS*
NOM
MAX
MIN
NOM
MAX
Pitch
n
p
Overall Height
A
-
-
.096
-
-
2.45
A2
.077
.079
.083
1.95
2.00
2.10
Number of Pins
Molded Package Thickness
Standoff
§
44
44
.031 BSC
0.80 BSC
A1
.010
-
-
0.25
-
-
Foot Length
L
.029
.035
.041
0.73
0.88
1.03
Footprint
Foot Angle
F
Overall Width
E
.077 REF.
0°
1.95 REF.
3.5°
7°
0°
.547 BSC
3.5°
Overall Length
D
.547 BSC
13.90 BSC
Molded Package Width
E1
.394 BSC
10.00 BSC
Molded Package Length
D1
c
Lead Thickness
Lead Width
Mold Draft Angle Top
B
Mold Draft Angle Bottom
7°
13.90 BSC
.394 BSC
10.00 BSC
.004
-
.009
0.11
-
0.23
.012
-
.018
0.30
-
0.45
5°
-
16°
5°
-
16°
5°
-
16°
5°
-
16°
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
See ASME Y14.5M
REF: Reference Dimension, usually without tolerance, for information purposes only.
See ASME Y14.5M
JEDEC Equivalent: MO-112 AA-1
Revised 07-21-05
Drawing No. C04-119
2002-2012 Microchip Technology Inc.
DS21459E-page 21
TC7129
6.0
REVISION HISTORY
Revision E (December 2012)
Added a note to each package outline drawing.
DS21459E-page 22
2002-2012 Microchip Technology Inc.
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X
XX
XX
Device
Temp.
Pkg
Taping
Direction
Device:
DSTEMP: 4-1/2 Digit Analog-to-Digital Converter
Temperature:
C
I
= 0°C to +70°C
= -25°C to +85°C
Package:
PL
KW
LW
JL
=
=
=
=
Taping Direction:
713 = Standard Taping
Examples:
a)
b)
TC7129CPL:
DSTEMPCKW713:
c)
DSTEMPCLW:
40-Pin PDIP
44-Pin PQFP
Tape and Reel
44-Pin PLCC
40-Pin PDIP
40-Pin PQFP
44-Pin PLCC
40-Pin CDIP
2002-2012 Microchip Technology Inc.
DS21459E-page 23
NOTES:
DS21459E-page 24
2002-2012 Microchip Technology Inc.
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
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Users of Microchip products can receive assistance
through several channels:
• Product Support – Data sheets and errata,
application notes and sample programs, design
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• General Technical Support – Frequently Asked
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• Business of Microchip – Product selector and
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Microchip sales offices, distributors and factory
representatives
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
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Technical support is available through the web site
at: http://microchip.com/support
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
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specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com. Under “Support”, click on
“Customer Change Notification” and follow the
registration instructions.
2002-2012 Microchip Technology Inc.
DS21459E-page 25
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip
product. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our
documentation can better serve you, please FAX your comments to the Technical Publications Manager at
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Device:
Literature Number: DS21459E
Questions:
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3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
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6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21459E-page 26
2002-2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
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conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. & KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2002-2012, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620768389
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
2002-2012 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS21459E-page 27
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Osaka
Tel: 81-6-6152-7160
Fax: 81-6-6152-9310
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8569-7000
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hangzhou
Tel: 86-571-2819-3187
Fax: 86-571-2819-3189
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Hong Kong SAR
Tel: 852-2943-5100
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-5778-366
Fax: 886-3-5770-955
China - Shenzhen
Tel: 86-755-8864-2200
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-213-7828
Fax: 886-7-330-9305
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2508-8600
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
DS21459E-page 28
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Japan - Tokyo
Tel: 81-3-6880- 3770
Fax: 81-3-6880-3771
11/29/12
2002-2012 Microchip Technology Inc.
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