TN0110
N-Channel Enhancement-Mode Vertical DMOS FET
Features
General Description
•
•
•
•
•
•
•
The TN0110 low-threshold Enhancement-mode
(normally-off) transistor uses a vertical DMOS structure
and a well-proven silicon-gate manufacturing process.
This combination produces a device with the power
handling capabilities of bipolar transistors and the high
input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally induced secondary breakdown.
2V Maximum Low Threshold
High Input Impedance
50 pF Typical Low Input Capacitance
Fast Switching Speeds
Low On-Resistance
Free from Secondary Breakdown
Low Input and Output Leakage
Applications
•
•
•
•
•
•
•
Microchip’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications
where very low threshold voltage, high breakdown
voltage, high input impedance, low input capacitance,
and fast switching speeds are desired.
Logic-Level Interfaces (Ideal for TTL and CMOS)
Solid-State Relays
Battery-Operated Systems
Photovoltaic Drives
Analog Switches
General Purpose Line Drivers
Telecommunication Switches
Package Type
3-lead TO-92
(Top view)
DRAIN
SOURCE
GATE
See Table 3-1 for pin information.
2020 Microchip Technology Inc.
DS20006417A-page 1
TN0110
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Drain-to-Source Voltage ...................................................................................................................................... BVDSS
Drain-to-Gate Voltage ......................................................................................................................................... BVDGS
Gate-to-Source Voltage ......................................................................................................................................... ±20V
Operating Ambient Temperature, TA ................................................................................................... –55°C to +150°C
Storage Temperature, TS ..................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless
otherwise stated. (Pulse test: 300 µs pulse, 2% duty cycle)
Parameter
Sym.
Min. Typ. Max.
Drain-to-Source Breakdown Voltage
BVDSS
100
—
—
V
VGS = 0V, ID = 1 mA
Gate Threshold Voltage
VGS(th)
0.6
—
2
V
VGS = VDS, ID = 0.5 mA
Change in VGS(th) with Temperature
Gate Body Leakage Current
Zero-Gate Voltage Drain Current
On-State Drain Current
Static Drain-to-Source On-State Resistance
Change in RDS(ON) with Temperature
Note 1:
Unit
Conditions
V = VDS, ID = 1 mA
mV/°C GS
(Note 1)
ΔVGS(th)
—
–3.2
–5
IGSS
—
—
100
nA
VGS = ± 20V, VDS = 0V
—
—
10
µA
VGS = 0V,
VDS = Maximum rating
—
—
500
µA
VDS = 0.8 Maximum rating,
VGS = 0V, TA = 125°C
(Note 1)
0.75
1.4
—
A
VGS = 5V, VDS = 25V
IDSS
ID(ON)
RDS(ON)
ΔRDS(ON)
2
3.4
—
A
VGS = 10V, VDS = 25V
—
2
4.5
Ω
VGS = 4.5V, ID = 250 mA
—
1.6
3
Ω
VGS = 10V, ID = 500 mA
%/°C
VGS = 10V, ID = 500 mA
(Note 1)
—
0.6
1.1
Specification is obtained by characterization and is not 100% tested.
DS20006417A-page 2
2020 Microchip Technology Inc.
TN0110
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. Specification is obtained by characterization and is
not 100% tested.
Parameter
Sym.
Min.
Typ.
Max.
Unit
Conditions
Forward Transconductance
GFS
225
400
—
Input Capacitance
CISS
—
50
60
pF
Common-Source Output Capacitance
COSS
—
25
35
pF
Reverse Transfer Capacitance
CRSS
—
4
8
pF
Turn-On Delay Time
td(ON)
—
2
5
ns
tr
—
3
5
ns
td(OFF)
—
6
7
ns
tf
—
3
6
ns
VSD
—
1
1.5
V
VGS = 0V, ISD = 500 mA (Note 1)
trr
—
400
—
ns
VGS = 0V, ISD = 500 mA
Rise Time
Turn-Off Delay Time
Fall Time
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
Note 1:
mmho VDS = 25V, ID = 500 mA
VGS = 0V,
VDS = 25V,
f = 1 MHz
VDD = 25V,
ID = 1A,
RGEN = 25Ω
All DC parameters are 100% tested at 25°C unless otherwise stated.
(Pulse test: 300 µs pulse, 2% duty cycle)
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ.
Max.
Unit
Operating Ambient Temperature
TA
–55
—
+150
°C
Storage Temperature
TS
–55
—
+150
°C
JA
—
132
—
°C/W
Conditions
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
3-lead TO-92
THERMAL CHARACTERISTICS
Package
3-lead TO-92
Note 1:
ID (Note 1)
(Continuous)
(mA)
ID
(Pulsed)
(A)
350
2
Power Dissipation
IDR (Note 1)
at TA = 25°C
(mA)
(W)
1
350
IDRM
(A)
2
ID (continuous) is limited by maximum rated TJ.
2020 Microchip Technology Inc.
DS20006417A-page 3
TN0110
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g. outside specified power supply range) and therefore outside the warranted range.
5.0
5.0
4.0
4.0
ID (amperes)
ID (amperes)
VGS = 10V
3.0
8V
2.0
VGS = 10V
3.0
8V
2.0
6V
1.0
6V
1.0
4V
4V
2V
2V
0
0
10
20
30
40
0
0
50
2.0
4.0
FIGURE 2-1:
6.0
8.0
10
VDS (volts)
VDS (volts)
Output Characteristics.
FIGURE 2-4:
0.5
Saturation Characteristics.
2.0
O
TA = -55 C
0.4
0.3
PD (watts)
GFS (siemens)
TA = 25OC
TA = 150OC
0.2
TO-92
1.0
0.1
0
VDS = 25V
0
0.6
1.2
1.8
2.4
0
3.0
0
25
50
ID (amperes)
FIGURE 2-2:
Current.
75
100
125
150
TC (OC)
Transconductance vs. Drain
FIGURE 2-5:
Temperature.
Power Dissipation vs. Case
10
1.0
Thermal Resistance (normalized)
TC = 25OC
ID (amperes)
TO-92 (pulsed)
1.0
TO-92 (DC)
0.1
0.01
1.0
10
100
1000
VDS (volts)
FIGURE 2-3:
Operating Area.
DS20006417A-page 4
Maximum Rated Safe
0.8
0.6
0.4
TO-92
TC = 25OC
PD = 1W
0.2
0
0.001
0.01
0.1
1.0
10
tp (seconds)
FIGURE 2-6:
Characteristics.
Thermal Response
2020 Microchip Technology Inc.
1.3
5.0
1.2
4.0
RDS(ON) (ohms)
BVDSS (normalized)
TN0110
1.1
1.0
0.9
VGS = 10V
VGS = 5.0V
3.0
2.0
1.0
0.8
-50
0
50
100
0
150
0
1.0
2.0
O
Tj ( C)
FIGURE 2-7:
Temperature.
3.0
4.0
5.0
ID (amperes)
FIGURE 2-10:
Current.
BVDSS Variation with
On-Resistance vs. Drain
1.4
3.0
1.4
VDS = 25V
VGS(th) (normalized)
ID (amperes)
25OC
1.8
150OC
1.2
0.6
0
0
2.0
4.0
6.0
8.0
V(th) @ 0.5mA
1.2
10
1.0
1.0
RDS(ON) @ 10V, 0.5A
0.8
0.8
0.6
0.6
0.4
-50
0
50
0.4
150
100
Tj (OC)
VGS (volts)
FIGURE 2-8:
1.2
RDS(ON) (normalized)
TA = -55OC
2.4
Transfer Characteristics.
FIGURE 2-11:
with Temperature.
VGS(th) and RDS Variation
10
100
f = 1.0MHz
VDS = 10V
8.0
VGS (volts)
C (picofarads)
75
CISS
50
VDS = 40V
55pF
6.0
4.0
COSS
25
2.0
CRSS
0
0
10
20
30
40
0
0
2020 Microchip Technology Inc.
2.0
3.0
4.0
5.0
QG (nanocoulombs)
VDS (volts)
FIGURE 2-9:
Capacitance vs.
Drain-to-Source Voltage.
50pF
1.0
FIGURE 2-12:
Characteristics.
Gate Drive Dynamic
DS20006417A-page 5
TN0110
3.0
PIN DESCRIPTION
Table 3-1 shows the description of pins in TN0110.
Refer to Package Type for the location of pins.
TABLE 3-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
Source
2
Gate
Gate
3
Drain
Drain
DS20006417A-page 6
Source
2020 Microchip Technology Inc.
TN0110
4.0
FUNCTIONAL DESCRIPTION
Figure 4-1 illustrates the switching waveforms and test
circuit for TN0110.
10V
VDD
90%
Pulse
Generator
INPUT
0V
10%
t(ON)
td(ON)
VDD
td(OFF)
tr
0V
tf
FIGURE 4-1:
INPUT
10%
90%
OUTPUT
RGEN
10%
OUTPUT
TABLE 4-1:
t(OFF)
RL
D.U.T.
90%
Switching Waveforms and Test Circuit.
PRODUCT SUMMARY
BVDSS/BVDGS
(V)
RDS(ON)
(Maximum)
(Ω)
ID(ON)
(Minimum)
(A)
VGS(th)
(Maximum)
(V)
100
3
2
2
2020 Microchip Technology Inc.
DS20006417A-page 7
TN0110
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20006417A-page 8
3-lead TO-92
Example
XXXXXX
XX e3
YWWNNN
TN0110
N3 e3
015516
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2020 Microchip Technology Inc.
TN0110
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2020 Microchip Technology Inc.
DS20006417A-page 9
TN0110
NOTES:
DS20006417A-page 10
2020 Microchip Technology Inc.
TN0110
APPENDIX A:
REVISION HISTORY
Revision A (September 2020)
• Converted Supertex Docs# DSFP-TN0110 to
Microchip DS20006417A
• Changed the package marking format
• Updated the packing medium of the TN0110 N3
P002 media type from 2000/Reel to 2000/Reel
(Reverse T/R) to align it with the actual BQM
• Made minor text changes throughout the
document
2020 Microchip Technology Inc.
DS20006417A-page 11
TN0110
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
XX
PART NO.
-
Package
Options
Device
X
-
Environmental
X
Media Type
Device:
TN0110
=
N-Channel Enhancement-Mode Vertical
DMOS FET
Package:
N3
=
3-lead TO-92
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Types:
(blank)
=
1000/Bag for an N3 Package
P003
=
2000/Reel for an N3 Package
P002
=
2000/Reel (Reverse T/R) for an N3 Package
DS20006417A-page 12
Examples:
a) TN0110N3-G:
N-Channel Enhancement-Mode, Vertical
DMOS FET, 3-lead
TO-92,1000/Bag
b) TN0110N3-G-P003:
N-Channel Enhancement-Mode, Vertical
DMOS FET, 3-lead TO-92,
2000/Reel
c) TN0110N3-G-P002:
N-Channel Enhancement-Mode, Vertical
DMOS FET, 3-lead TO-92,
2000/Reel (Reverse T/R)
2020 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specifications contained in their particular Microchip Data Sheet.
•
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•
There are dishonest and possibly illegal methods being used in attempts to breach the code protection features of the Microchip
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•
Microchip is willing to work with any customer who is concerned about the integrity of its code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not
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2020 Microchip Technology Inc.
ISBN:978-1-5224-6792-2
DS20006417A-page 13
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02/28/20