TN0620
N-Channel Enhancement-Mode Vertical DMOS FET
Features
General Description
•
•
•
•
•
•
•
The TN0620 low-threshold, Enhancement-mode
(normally-off) transistor uses a vertical DMOS structure
and a well-proven silicon-gate manufacturing process.
This combination produces a device with the power
handling capabilities of bipolar transistors and the high
input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally induced secondary breakdown.
1.6V Maximum Low Threshold
High Input Impedance
110 pF Typical Low Input Capacitance
Fast Switching Speeds
Low On-Resistance
Free from Secondary Breakdown
Low Input and Output Leakage
Applications
•
•
•
•
•
•
•
Microchip’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications
where very low threshold voltage, high breakdown
voltage, high input impedance, low input capacitance,
and fast switching speeds are desired.
Logic-Level Interfaces (Ideal for TTL and CMOS)
Solid-State Relays
Battery-Operated Systems
Photovoltaic Drives
Analog Switches
General Purpose Line Drivers
Telecommunication Switches
Package Type
3-lead TO-92
(Top view)
DRAIN
SOURCE
GATE
See Table 3-1 for pin information.
2020 Microchip Technology Inc.
DS20005936A-page 1
TN0620
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Drain-to-Source Voltage ...................................................................................................................................... BVDSS
Drain-to-Gate Voltage ......................................................................................................................................... BVDGS
Gate-to-Source Voltage ......................................................................................................................................... ±20V
Operating Ambient Temperature, TA ................................................................................................... –55°C to +150°C
Storage Temperature, TS ..................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless
otherwise stated. (Pulse test: 300 µs pulse, 2% duty cycle)
Parameter
Sym.
Min. Typ. Max.
Drain-to-Source Breakdown Voltage
BVDSS
200
—
—
V
VGS = 0V, ID = 2 mA
Gate Threshold Voltage
VGS(th)
0.6
—
1.6
V
VGS = VDS, ID = 1 mA
Change in VGS(th) with Temperature
Gate Body Leakage Current
Zero-Gate Voltage Drain Current
On-State Drain Current
Static Drain-to-Source On-State Resistance
Change in RDS(ON) with Temperature
Note 1:
Unit
Conditions
V = VDS, ID = 1 mA
mV/°C GS
(Note 1)
ΔVGS(th)
—
—
–5
IGSS
—
—
100
nA
VGS = ± 20V, VDS = 0V
—
—
10
µA
VGS = 0V,
VDS = Maximum rating
—
—
1
mA
VDS = 0.8 Maximum rating,
VGS = 0V, TA = 125°C
(Note 1)
0.5
—
—
A
VGS = 5V, VDS = 25V
IDSS
ID(ON)
RDS(ON)
ΔRDS(ON)
1
—
—
A
VGS = 10V, VDS = 25V
—
6
8
Ω
VGS = 5V, ID = 250 mA
—
4
6
Ω
VGS = 10V, ID = 500 mA
—
—
1.4
%/°C
VGS = 10V, ID = 500 mA
(Note 1)
Specification is obtained by characterization and is not 100% tested.
DS20005936A-page 2
2020 Microchip Technology Inc.
TN0620
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All AC parameters are sample tested. Specification
is obtained by characterization and is not 100% tested.
Parameter
Sym.
Min.
Typ.
Forward Transconductance
GFS
300
400
—
Input Capacitance
CISS
—
110
150
pF
Common-Source Output Capacitance
COSS
—
40
85
pF
Reverse Transfer Capacitance
CRSS
—
10
35
pF
Turn-On Delay Time
td(ON)
—
—
10
ns
tr
—
—
8
ns
td(OFF)
—
—
20
ns
tf
—
—
20
ns
VSD
—
—
1.8
V
VGS = 0V, ISD = 1A (Note 1)
trr
—
300
—
ns
VGS = 0V, ISD = 1A
Rise Time
Turn-Off Delay Time
Fall Time
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
Note 1:
Max.
Unit
Conditions
mmho VDS = 25V, ID = 500 mA
VGS = 0V,
VDS = 25V,
f = 1 MHz
VDD = 25V,
ID = 1A,
RGEN = 25Ω
All DC parameters are 100% tested at 25°C unless otherwise stated.
(Pulse test: 300 µs pulse, 2% duty cycle)
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ.
Max.
Unit
Operating Ambient Temperature
TA
–55
—
+150
°C
Storage Temperature
TS
–55
—
+150
°C
JA
—
132
—
°C/W
Conditions
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
3-lead TO-92
THERMAL CHARACTERISTICS
Package
3-lead TO-92
Note 1:
ID (Note 1)
(Continuous)
(mA)
ID
(Pulsed)
(A)
250
2
Power Dissipation
IDR (Note 1)
at TA = 25°C
(mA)
(W)
1
250
IDRM
(A)
2
ID (continuous) is limited by maximum rated TJ.
2020 Microchip Technology Inc.
DS20005936A-page 3
TN0620
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g. outside specified power supply range) and therefore outside the warranted range.
4.0
4.0
3.2
3.2
8V
6V
1.6
ID (amperes)
ID (amperes)
VGS = 10V
2.4
VGS = 10V
8V
6V
2.4
1.6
4V
0.8
0
3V
2V
0
10
20
30
40
50
4V
0.8
0
3V
2V
0
2.0
4.0
VDS (volts)
FIGURE 2-1:
6.0
8.0
10
VDS (volts)
Output Characteristics.
FIGURE 2-4:
1.0
Saturation Characteristics.
2.0
VDS = 25V
TA = -55OC
0.6
PD (watts)
GFS (siemens)
0.8
25O
150O
0.4
TO-92
1.0
0.2
0
0
.05
1.0
1.5
2.0
0
2.5
0
25
50
ID (amperes)
FIGURE 2-2:
Current.
Transconductance vs. Drain
FIGURE 2-5:
Temperature.
10
100
1.0
TO-92 (DC)
0.1
150
Power Dissipation vs. Case
0.8
0.6
0.4
0.2
TO-92
PD = 1.0W
TC = 25OC
TC = 25OC
0.01
125
1.0
Thermal Resistance (normalized)
ID (amperes)
75
TC (OC)
1.0
10
100
1000
0
0.001
VDS (volts)
FIGURE 2-3:
Operating Area.
DS20005936A-page 4
Maximum Rated Safe
0.01
0.1
1.0
10
tP (seconds)
FIGURE 2-6:
Characteristics.
Thermal Response
2020 Microchip Technology Inc.
TN0620
15
1.1
VGS = 5.0V
VGS = 10V
RDS(ON) (ohms)
BVDSS (normalized)
12
1.0
9.0
6.0
3.0
0.9
-50
0
50
100
0
150
0
0.8
1.6
O
Tj ( C)
FIGURE 2-7:
Temperature.
2.4
3.2
4.0
ID (amperes)
FIGURE 2-10:
Current.
BVDSS Variation with
On-Resistance vs. Drain
4.0
2.0
VDS = 25V
1.4
3.2
VGS(th) (normalized)
ID (amperes)
2.4
25OC
1.6
1.2
1.2
RDS @ 10V, 0.5A
1.0
0.8
0.8
150OC
0.8
RDS(ON) (normalized)
1.6
V(th) @ 1.0mA
TA = -55OC
0.4
0.6
0
0
2.0
4.0
6.0
8.0
-50
10
0
VGS (volts)
FIGURE 2-8:
50
0
150
100
Tj (OC)
Transfer Characteristics.
FIGURE 2-11:
Temperature.
200
V(th) and RDS Variation with
10
f = 1.0MHz
VDS = 10V
8.0
VGS (volts)
C (picofarads)
150
CISS
100
50
COSS
6.0
VDS = 40V
178 pF
4.0
2.0
100 pF
CRSS
0
0
10
20
30
40
0
0
FIGURE 2-9:
Capacitance vs.
Drain-to-Source Voltage.
2020 Microchip Technology Inc.
0.5
1.0
1.5
2.0
2.5
QG (nanocoulombs)
VDS (volts)
FIGURE 2-12:
Characteristics.
Gate Drive Dynamic
DS20005936A-page 5
TN0620
3.0
PIN DESCRIPTION
Table 3-1 shows the description of pins in TN0620.
Refer to Package Type for the location of pins.
TABLE 3-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
Source
2
Gate
Gate
3
Drain
Drain
DS20005936A-page 6
Source
2020 Microchip Technology Inc.
TN0620
4.0
FUNCTIONAL DESCRIPTION
Figure 4-1 illustrates the switching waveforms and test
circuit for TN0620.
10V
VDD
90%
Pulse
Generator
INPUT
0V
10%
t(ON)
td(ON)
VDD
td(OFF)
tr
0V
tf
FIGURE 4-1:
INPUT
10%
90%
OUTPUT
RGEN
10%
OUTPUT
TABLE 4-1:
t(OFF)
RL
D.U.T.
90%
Switching Waveforms and Test Circuit.
PRODUCT SUMMARY
BVDSS/BVDGS
(V)
RDS(ON)
(Maximum)
(Ω)
ID(ON)
(Minimum)
(A)
VGS(th)
(Maximum)
(V)
200
6
1
1.6
2020 Microchip Technology Inc.
DS20005936A-page 7
TN0620
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
3-lead TO-92
XXXXXX
XX e3
YWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005936A-page 8
Example
TN0620
N3 e3
020159
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2020 Microchip Technology Inc.
TN0620
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2020 Microchip Technology Inc.
DS20005936A-page 9
TN0620
NOTES:
DS20005936A-page 10
2020 Microchip Technology Inc.
TN0620
APPENDIX A:
REVISION HISTORY
Revision A (July 2020)
• Converted Supertex Doc# DSFP-TN0620 to
Microchip DS20005936A
• Changed the package marking format
• Updated the packing medium of TN0620 TO-92
N3 P002 media type from 2000/Reel to 2000/Reel
(Reverse T/R) to align it with the actual BQM
• Updated the packing medium of TN0620 TO-92
N3 P014 media type from 2000/Reel to 2000/Reel
(Ammo Pack) to align it with the actual BQM
• Removed the TN0620 T0-92 N3 P003, P005, and
P013 media types
• Made minor text changes throughout the
document
2020 Microchip Technology Inc.
DS20005936A-page 11
TN0620
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
XX
PART NO.
-
Package
Options
Device
X
-
Environmental
X
Media Type
Device:
TN0620
=
N-Channel Enhancement-Mode Vertical
DMOS FET
Package:
N3
=
3-lead TO-92
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Types:
(blank)
=
1000/Bag for an N3 Package
P002
=
2000/Reel (Reverse T/R) for an N3 Package
P014
=
2000/Reel (Ammo Pack) for an N3 Package
DS20005936A-page 12
Examples:
a) TN0620N3-G:
N-Channel EnhancementMode, Vertical DMOS FET,
3-lead TO-92,1000/Bag
b) TN0620N3-G-P002:
N-Channel EnhancementMode, Vertical DMOS FET,
3-lead TO-92, 2000/Reel
(Reverse T/R)
c) TN0620N3-G-P014:
N-Channel EnhancementMode, Vertical DMOS FET,
3-lead TO-92, 2000/Reel
(Ammo Pack)
2020 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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Information contained in this publication regarding device
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The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
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© 2020, Microchip Technology Incorporated, All Rights Reserved.
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please visit www.microchip.com/quality.
2020 Microchip Technology Inc.
ISBN: 978-1-5224-6381-8
DS20005936A-page 13
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02/28/20
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