TP2540
P-Channel Enhancement-Mode Vertical DMOS FET
Features
General Description
•
•
•
•
•
•
•
The TP2540 low-threshold, Enhancement-mode
(normally-off) transistor uses a vertical DMOS structure
and a well-proven silicon-gate manufacturing process.
This combination produces a device with the power
handling capabilities of bipolar transistors and the high
input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally induced secondary breakdown.
–2.4V Maximum Low Threshold
High Input Impedance
60 pF Low Input Capacitance
Fast Switching Speeds
Low On-Resistance
Free from Secondary Breakdown
Low Input and Output Leakage
Applications
•
•
•
•
•
•
•
Logic-Level Interfaces (Ideal for TTL and CMOS)
Solid-State Relays
Battery-Operated Systems
Photovoltaic Drives
Analog Switches
General Purpose Line Drivers
Telecommunication Switches
Microchip’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications
where very low threshold voltage, high breakdown
voltage, high input impedance, low input capacitance,
and fast switching speeds are desired.
Package Type
3-lead SOT-89
(Top view)
3-lead TO-92
(Top view)
DRAIN
DRAIN
SOURCE
DRAIN
GATE
SOURCE
GATE
See Table 3-1 and Table 3-2 for pin information.
2020 Microchip Technology Inc.
DS20006371A-page 1
TP2540
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Drain-to-Source Voltage ....................................................................................................................................... BVDSS
Drain-to-Gate Voltage .......................................................................................................................................... BVDGS
Gate-to-Source Voltage.......................................................................................................................................... ±20V
Operating Ambient Temperature, TA .................................................................................................... –55°C to +150°C
Storage Temperature, TS...................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless
otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle.
Parameter
Sym.
Min.
Drain-to-Source Breakdown Voltage
BVDSS
–400
—
—
V
VGS = 0V, ID = –2 mA
Gate Threshold Voltage
VGS(th)
–1
—
–2.4
V
VGS = VDS, ID = –1 mA
Change in VGS(th) with Temperature
Gate Body Leakage Current
Zero-Gate Voltage Drain Current
On-State Drain Current
Static Drain-to-Source On-State Resistance
Change in RDS(ON) with Temperature
Note 1:
Typ. Max.
Unit
Conditions
V = VDS, ID = –1 mA
mV/°C GS
(Note 1)
ΔVGS(th)
—
—
4.8
IGSS
—
—
–100
nA
VGS = ± 20V, VDS = 0V
—
—
–10
μA
VGS = 0V,
VDS = Maximum rating
—
—
–1
mA
VDS = 0.8 Maximum rating,
VGS = 0V, TA = 125°C
(Note 1)
–0.2
–0.3
—
A
VGS = –4.5V, VDS = –25V
–0.4
–1.1
—
A
VGS = –10V, VDS = –25V
—
20
30
Ω
VGS = –4.5V, ID = –100 mA
—
19
25
Ω
VGS = –10V, ID = –100 mA
%/°C
VGS = –10V, ID = –100 mA
(Note 1)
IDSS
ID(ON)
RDS(ON)
ΔRDS(ON)
—
—
0.75
Specification is obtained by characterization and is not 100% tested.
DS20006371A-page 2
2020 Microchip Technology Inc.
TP2540
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. Specification is obtained by characterization and
is not 100% tested.
Parameter
Sym.
Min.
Typ.
Forward Transconductance
GFS
100
175
—
Input Capacitance
CISS
—
60
125
pF
Common-Source Output Capacitance
COSS
—
20
70
pF
Reverse Transfer Capacitance
CRSS
—
10
25
pF
Turn-On Delay Time
td(ON)
—
—
10
ns
tr
—
—
10
ns
td(OFF)
—
—
20
ns
tf
—
—
13
ns
VSD
—
—
–1.8
V
VGS = 0V, ISD = –100 mA (Note 1)
trr
—
300
—
ns
VGS = 0V, ISD = –100 mA
Rise Time
Turn-Off Delay Time
Fall Time
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
Note 1:
Max.
Unit
Conditions
mmho VDS = –25V, ID = –100 mA
VGS = 0V,
VDS = –25V,
f = 1 MHz
VDD = –25V,
ID = –0.4A,
RGEN = 25Ω
Unless otherwise stated, all DC parameters are 100% tested at 25°C. Pulse test: 300 µs pulse, 2% duty
cycle.
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ. Max.
Unit
Operating Ambient Temperature
TA
–55
—
+150
°C
Storage Temperature
TS
–55
—
+150
°C
3-lead TO-92
JA
—
132
—
°C/W
3-lead SOT-89
JA
—
133
—
°C/W
Conditions
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
THERMAL CHARACTERISTICS
ID (Note 1)
(Continuous)
(mA)
ID
(Pulsed)
(mA)
Power Dissipation
at TA = 25°C
(W)
IDR (Note 1)
(mA)
IDRM
(mA)
3-lead TO-92
–86
–600
0.74
–86
–600
3-lead SOT-89
–125
–1200
1.6 (Note 2)
–125
–1200
Package
Note 1:
2:
ID (continuous) is limited by maximum rated TJ.
Mounted on an FR5 board, 25 mm x 25 mm x 1.57 mm
2020 Microchip Technology Inc.
DS20006371A-page 3
TP2540
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g. outside specified power supply range) and therefore outside the warranted range.
-2.0
-1.0
-1.6
-0.8
VGS = -10V
ID (amperes)
ID (amperes)
VGS = -10V
-1.2
-8V
-0.8
-8V
-0.6
-6V
-0.4
-6V
-0.4
-0.2
-4V
-4V
0
0
-10
-20
-30
-40
0
-50
0
-2.0
-4.0
FIGURE 2-1:
Output
-6.0
-8.0
-10
VDS (volts)
VDS (volts)
Characteristics.
FIGURE 2-4:
Saturation Characteristics.
2.0
0.5
VDS = -25V
TO-243AA
0.3
PD (watts)
GFS (siemens)
0.4
TA = -55OC
0.2
1.0
25OC
TO-92
125OC
0.1
0
0
-0.4
-0.8
-1.2
-1.6
0
-2.0
0
25
50
ID (amperes)
FIGURE 2-2:
Current.
Transconductance vs. Drain
Thermal Resistance (normalized)
TO-243AA (pulsed)
ID (amperes)
125
150
1.0
TA = 25OC
TO-92 (pulsed)
TO-243AA (DC)
-0.1
100
FIGURE 2-5:
Power Dissipation vs.
Ambient Temperature.
-10
-1.0
75
TA (OC)
TO-92 (DC)
-0.01
-1.0
FIGURE 2-3:
Operating Area.
DS20006371A-page 4
-10
VDS (volts)
-100
-1000
Maximum Rated Safe
0.8
TO-243AA
TA = 25OC
PD = 1.6W
0.6
0.4
0.2
0
0.001
TO-92
TC = 25OC
PD = 1.0W
0.01
0.1
1.0
10
tp(seconds)
FIGURE 2-6:
Characteristics.
Thermal Response
2020 Microchip Technology Inc.
TP2540
1.1
100
VGS = -4.5V
RDS(ON) (ohms)
BVDSS (normalized)
80
1.0
VGS = -10V
60
40
20
0.9
-50
0
50
100
0
150
0
-0.4
FIGURE 2-7:
Temperature.
-2.0
-0.8
-1.2
-1.6
-2.0
ID (amperes)
Tj (OC)
FIGURE 2-10:
Current.
BVDSS Variation with
On-Resistance vs. Drain
2.5
VDS = -25OC
1.2
TA = -55OC
-1.2
25OC
-0.8
RDS(ON) @ -10V, -0.1A
1.5
1.0
1.0
0.9
V(th)@ -1mA
-0.4
125OC
0.5
0.8
0
150
0
0
-2.0
-4.0
-6.0
-8.0
-10
-50
0
50
100
Tj (OC)
VGS (volts)
FIGURE 2-8:
2.0
1.1
RDS(ON) (normalized)
VGS(th) (normalized)
ID (amperes)
-1.6
Transfer Characteristics.
FIGURE 2-11:
with Temperature.
200
VGS(th) and RDS Variation
-10
f = 1MHz
VDS = -10V
-8.0
VGS (volts)
C (picofarads)
150
100
-6.0
VDS = -40V
-4.0
CISS
190 pF
50
-2.0
0
0
60pF
COSS
CRSS
-10
-20
-30
-40
0
0
FIGURE 2-9:
Capacitance vs.
Drain-to-Source Voltage.
2020 Microchip Technology Inc.
0.4
0.8
1.2
1.6
2.0
QG (nanocoulombs)
VDS (volts)
FIGURE 2-12:
Characteristics.
Gate Drive Dynamic
DS20006371A-page 5
TP2540
3.0
PIN DESCRIPTION
The details on the pins of TP2540 TO-92 and SOT-89
packages are listed in Table 3-1 and Table 3-2,
respectively. Refer to Package Type for the location of
pins.
TABLE 3-1:
TO-92 PIN FUNCTION TABLE
Pin Number
Pin Name
1
Source
Description
Source
2
Gate
Gate
3
Drain
Drain
TABLE 3-2:
SOT-89 PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
Gate
Gate
2,4
Drain
Drain
3
Source
DS20006371A-page 6
Source
2020 Microchip Technology Inc.
TP2540
4.0
FUNCTIONAL DESCRIPTION
Figure 4-1 illustrates the switching waveforms and test
circuit for the TP2540.
0V
Pulse
Generator
10%
INPUT
RGEN
90%
t(OFF)
-10V
t(ON)
D.U.T.
td(ON)
tr
td(OFF)
tf
INPUT
OUTPUT
0V
90%
OUTPUT
RL
90%
10%
10%
VDD
VDD
FIGURE 4-1:
TABLE 4-1:
Switching Waveforms and Test Circuit.
PRODUCT SUMMARY
BVDSS/BVDGS
(V)
RDS(ON)
(Maximum)
(Ω)
VGS(TH)
(Maximum)
(V)
ID(ON)
(Minimum)
(A)
–400
25
–0.4
–2.4
2020 Microchip Technology Inc.
DS20006371A-page 7
TP2540
5.0
PACKAGE MARKING INFORMATION
5.1
Package Marking Information
3-lead TO-92
XXXXXX
XX e3
YWWNNN
3-lead SOT-89
XXXXYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20006371A-page 8
Example
TP2540
N3 e3
021031
Example
TP5D022
570
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2020 Microchip Technology Inc.
TP2540
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2020 Microchip Technology Inc.
DS20006371A-page 9
TP2540
3-Lead TO-243AA (SOT-89) Package Outline (N8)
D
D1
C
E H
L
1
2
E1
3
b
b1
e
A
e1
Side View
Top View
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Symbol
A
MIN
Dimensions
(mm)
1.40
b
0.44
b1
0.36
C
0.35
D
4.40
D1
1.62
E
2.29
E1
2.00
e
e1
1.50
BSC
3.00
BSC
†
NOM
-
-
-
-
-
-
-
-
MAX
1.60
0.56
0.48
0.44
4.60
1.83
2.60
2.29
H
L
3.94
0.73†
-
-
4.25
1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
† This dimension differs from the JEDEC drawing
Drawings not to scale.
DS20006371A-page 10
2020 Microchip Technology Inc.
TP2540
APPENDIX A:
REVISION HISTORY
Revision A (June 2020)
• Converted Supertex Doc# DSFP-TP2540 to
Microchip DS20006371A
• Added a pin function tables
• Changed the package marking format
• Removed the 3-Lead TO-92 N3 P003, P005,
P013, and P014 media types
• Made minor text changes throughout the
document
2020 Microchip Technology Inc.
DS20006371A-page 11
TP2540
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
XX
PART NO.
Package
Options
Device
Device:
Packages:
-
TP2540
=
X
-
Environmental
X
Media Type
P-Channel Enhancement-Mode Vertical
DMOS FET
N3
=
3-lead TO-92
N8
=
3-lead SOT-89
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Types:
(blank)
=
1000/Bag for an N3 Package
(blank)
=
2000/Reel for an N8 Package
P002
=
2000/Reel (Reverse T/R) for an N8 Package
DS20006371A-page 12
Examples:
a) TP2540N3-G:
P-Channel EnhancementMode, Vertical DMOS FET,
3-lead TO-92, 1000/Bag
b) TP2540N8-G:
P-Channel EnhancementMode, Vertical DMOS FET,
3-lead SOT-89, 2000/Reel
c) TP2540N8-G-P002:
P-Channel EnhancementMode, Vertical DMOS FET,
3-lead SOT-89, 2000/Reel
(Reverse T/R)
2020 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
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AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
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2020 Microchip Technology Inc.
ISBN:978-1-5224-6258-3
DS20006371A-page 13
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DS20006371A-page 14
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02/28/20