TP2640N3-G

TP2640 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description • • • • • • • The TP2640 is a low-threshold, Enhancement-mode (normally-off) transistor that uses an advanced vertical DMOS structure and a well-proven silicon gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally induced secondary breakdown. –2V Maximum Low Threshold High Input Impedance Low Input Capacitance Fast Switching Speeds Low On-Resistance Free from Secondary Breakdown Low Input and Output Leakage Applications • • • • • • • Logic-Level Interfaces (Ideal for TTL and CMOS) Solid State Relays Battery-Operated Systems Photovoltaic Drives Analog Switches General Purpose Line Drivers Telecommunication Switches Microchip’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Package Type 3-lead TO-92 (Top view) 8-lead SOIC (Top view) DRAIN SOURCE GATE DRAIN DRAIN DRAIN DRAIN GATE SOURCE N/C N/C See Table 3-1 and Table 3-2 for pin information.  2020 Microchip Technology Inc. DS20006372A-page 1 TP2640 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings† Drain-to-Source Voltage ....................................................................................................................................... BVDSS Drain-to-Gate Voltage .......................................................................................................................................... BVDGS Gate-to-Source Voltage.......................................................................................................................................... ±20V Operating Ambient Temperature, TA .................................................................................................... –55°C to +150°C Storage Temperature, TS...................................................................................................................... –55°C to +150°C † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle. Parameter Sym. Min. Typ. Max. Unit Drain-to-Source Breakdown Voltage BVDSS –400 — — V VGS = 0V, ID = –2 mA Gate Threshold Voltage VGS(th) –0.8 — –2 V VGS = VDS, ID = –1 mA Change in VGS(th) with Temperature Gate Body Leakage Current Zero-Gate Voltage Drain Current On-State Drain Current V = VDS, ID = –1 mA mV/°C GS (Note 1) ΔVGS(th) — — 5 IGSS — — –100 nA VGS = ±20V, VDS = 0V –1 µA VGS = 0V, VDS = –100V –10 mA VGS = 0V, VDS = Maximum rating –1 mA VDS = 0.8 Maximum rating, VGS = 0V, TA = 125°C (Note 1) IDSS ID(ON) Static Drain-to-Source On-State Resistance RDS(ON) Change in RDS(ON) with Temperature ΔRDS(ON) Note 1: Conditions — –0.7 — — — — — A VGS = –10V, VDS = –25V 12 15 Ω VGS = –2.5V, ID = –20 mA 11 15 Ω VGS = –4.5V, ID = –150 mA 11 15 Ω VGS = –10V, ID = –300 mA — 0.75 %/°C VGS = –10V, ID = –300 mA (Note 1) Specification is obtained by characterization and is not 100% tested. DS20006372A-page 2  2020 Microchip Technology Inc. TP2640 AC ELECTRICAL CHARACTERISTICS Electrical Specifications: TA = 25°C unless otherwise specified. Specification is obtained by characterization and is not 100% tested. Parameter Sym. Min. Typ. Forward Transconductance GFS 200 — — Input Capacitance CISS — — 300 pF Common-Source Output Capacitance COSS — — 50 pF Reverse Transfer Capacitance CRSS — — 12 pF Turn-On Delay Time td(ON) — — 10 ns tr — — 15 ns td(OFF) — — 60 ns tf — — 40 ns VSD — — 1.8 V VGS = 0V, IDS = –200 mA (Note 1) trr — 300 — ns VGS = 0V, IDS = –200 mA Rise Time Turn-Off Delay Time Fall Time DIODE PARAMETER Diode Forward Voltage Drop Reverse Recovery Time Note 1: Max. Unit Conditions mmho VDS = –25V, ID = –300 mA VGS = 0V, VDS = –25V, f = 1 MHz VDD = –25V, ID = –300 mA, RGEN = 25Ω Unless otherwise stated, all DC parameters are 100% tested at 25°C. Pulse test: 300 µs pulse, 2% duty cycle TEMPERATURE SPECIFICATIONS Parameter Sym. Min. Typ. Max. Unit Operating Ambient Temperature TA –55 — +150 °C Storage Temperature TS –55 — +150 °C 3-lead TO-92 JA — 132 — °C/W 8-lead SOIC JA — 101 — °C/W Conditions TEMPERATURE RANGE PACKAGE THERMAL RESISTANCE THERMAL CHARACTERISTICS ID (Note 1) (Continuous) (mA) ID (Pulsed) (mA) 3-lead TO-92 –180 8-lead SOIC –86 Package Note 1: 2: Power Dissipation at TA = 25°C (W) IDR (Note 1) (mA) IDRM (mA) –800 1 –180 –800 –600 0.74 (Note 2) –86 –600 ID (continuous) is limited by maximum TJ. Mounted on an FR board, 25 mm x 25 mm x 1.57 mm  2020 Microchip Technology Inc. DS20006372A-page 3 TP2640 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g. outside specified power supply range) and therefore outside the warranted range. 30 1.1 RDS(ON) (ohms) BVDSS (normalized) 1.0 VGS = -4.5V VGS = -2.5V 24 VGS = -10V 18 12 6.0 0.9 -50 0 50 100 0 150 0 -0.4 -0.8 O FIGURE 2-1: Temperature. -2.0 BVDSS Variation with VDS = -25OC -1.2 -1.6 -2.0 ID (amperes) Tj ( C) FIGURE 2-4: Current. On-Resistance vs. Drain 2.5 25OC 1.2 RDS(ON) @ -10V, -0.3A -1.6 ID (amperes) TA = -55 C -1.2 125OC -0.8 1.1 1.5 1.0 1.0 0.9 -0.4 RDS(ON) (normalized) VGS(th) (normalized) 2.0 O 0.5 V(th)@ -1mA 0.8 0 0 -2.0 -4.0 -6.0 -8.0 -10 -50 0 50 VGS (volts) FIGURE 2-2: 0 150 100 Tj (OC) Transfer Characteristics. FIGURE 2-5: with Temperature. 400 VGS(th) and RDS Variation -10 f = 1MHz -8.0 CISS VGS (volts) C (picofarads) 300 200 678 pF -6.0 100 VDS = -40V -2.0 COSS 263pF VDS = -10V -4.0 CRSS 0 0 -10 -20 -30 -40 0 0 VDS (volts) FIGURE 2-3: Capacitance vs. Drain-to-Source Voltage. DS20006372A-page 4 1.0 2.0 3.0 4.0 5.0 QG (nanocoulombs) FIGURE 2-6: Characteristics. Gate Drive Dynamic  2020 Microchip Technology Inc. TP2640 -2.0 -1.0 VGS = -10V -0.8 -6V VGS = -10V ID (amperes) ID (amperes) -1.6 -1.2 -0.8 -0.6 -0.4 -3V -4V -0.4 -6V -4V -0.2 -3V 0 0 0 -10 -20 -30 -40 -50 0 -2.0 -4.0 FIGURE 2-7: 1.0 -6.0 -8.0 -10 VDS (volts) VDS (volts) Output Characteristics. FIGURE 2-10: Saturation Characteristics. 2.0 VDS = -25V PD (watts) GFS (siemens) 0.8 0.6 0.4 0 25OC 125OC 0.2 0 -0.4 -0.8 TO-92 1.0 TA = -55OC -1.2 -1.6 0 -2.0 0 25 50 FIGURE 2-8: Current. 75 100 125 150 TA (OC) ID (amperes) Transconductance vs. Drain FIGURE 2-11: Temperature. -10 Power Dissipation vs. 1.0 ID (amperes) -1.0 -0.1 Thermal Resistance (normalized) TA = 25OC TO-92 (pulsed) TO-92 (DC) -0.01 -1.0 -10 -100 -1000 0.8 0.6 0.4 0.2 0 0.001 VDS (volts) FIGURE 2-9: Operating Area. Maximum Rated Safe  2020 Microchip Technology Inc. TO-92 TC = 25OC PD = 1.0W 0.01 0.1 1.0 10 tp(seconds) FIGURE 2-12: Characteristics. Thermal Response DS20006372A-page 5 TP2640 3.0 PIN DESCRIPTION The details on the pins of TP2640 TO-92 and SOT-89 packages are listed in Table 3-1 and Table 3-2, respectively. Refer to Package Type for the location of pins. TABLE 3-1: 3-LEAD TO-92 PIN FUNCTION TABLE Pin Number Pin Name 1 Source Description Source 2 Gate Gate 3 Drain Drain TABLE 3-2: 8-LEAD SOIC PIN FUNCTION TABLE Pin Number Pin Name 1 N/C 2 N/C 3 Source Description No Connection No Connection Source 4 Gate Gate 5 Drain Drain 6 Drain Drain 7 Drain Drain 8 Drain Drain DS20006372A-page 6  2020 Microchip Technology Inc. TP2640 4.0 FUNCTIONAL DESCRIPTION Figure 4-1 illustrates the switching waveforms and test circuit for TP2640. 0V Pulse Generator 10% INPUT t(ON) td(ON) RGEN 90% t(OFF) -10V tr td(OFF) D.U.T. tf INPUT OUTPUT 0V 90% OUTPUT RL 90% 10% 10% VDD VDD FIGURE 4-1: TABLE 4-1: Switching Waveforms and Test Circuit. PRODUCT SUMMARY BVDSS/BVDGS (V) RDS(ON) (Maximum) (Ω) ID(ON) (Minimum) (A) VGS(th) (Maximum) (V) –400 15 –2 –0.7  2020 Microchip Technology Inc. DS20006372A-page 7 TP2640 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 3-lead TO-92 Example XXXXXX XX e3 YWWNNN TP2640 N3 e3 011365 8-lead SOIC Example XXXXXXXX e3 YYWW NNN TP2640LG e3 2030 344 Legend: XX...X Y YY WW NNN e3 * Note: DS20006372A-page 8 Product Code or Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo.  2020 Microchip Technology Inc. TP2640 Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.  2020 Microchip Technology Inc. DS20006372A-page 9 TP2640 Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging. DS20006372A-page 10  2020 Microchip Technology Inc. TP2640 APPENDIX A: REVISION HISTORY Revision A (July 2020) • Converted Supertex Doc# DSFP-TP2640 to Microchip DS20006372A • Changed the package marking format • Updated the quantity of the 8-lead SOIC LG package from 2500/Reel to 3300/Reel to align it with the actual BQM • Removed the P002, P003, P005, P013, P014 media types for the 3-lead TO-92 N3 package • Made minor text changes throughout the document  2020 Microchip Technology Inc. DS20006372A-page 11 TP2640 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. XX PART NO. - Package Options Device X - Environmental X Media Type Device: TP2640 = P-Channel Enhancement-Mode Vertical DMOS FET Packages: N3 = 3-lead TO-92 LG = 8-lead SOIC Environmental: G = Lead (Pb)-free/RoHS-compliant Package Media Types: (blank) = 1000/Bag for an N3 Package (blank) = 3300/Reel for an LG Package DS20006372A-page 12 Examples: a) TP2640N3-G: P-Channel EnhancementMode Vertical DMOS FET, 3-lead TO-92, 1000/Bag b) TP2640LG-G: P-Channel EnhancementMode Vertical DMOS FET, 8-lead SOIC, 3000/Reel  2020 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. 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Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2020, Microchip Technology Incorporated, All Rights Reserved. For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.  2020 Microchip Technology Inc. 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