TP5335
P-Channel Enhancement-Mode Vertical DMOS FET
Features
General Description
•
•
•
•
•
•
•
The TP5335 is a low-threshold, Enhancement-mode
(normally-off) transistor that utilizes an advanced
vertical DMOS structure and a well-proven silicon gate
manufacturing process. This combination produces a
device with the power handling capabilities of bipolar
transistors and the high input impedance and positive
temperature coefficient inherent in MOS devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally induced
secondary breakdown.
High Input Impedance and High Gain
Low Power Drive Requirement
Ease of Paralleling
Low CISS and Fast Switching Speeds
Excellent Thermal Stability
Integral Source-Drain Diode
Free from Secondary Breakdown
Applications
•
•
•
•
•
Microchip’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications
where high breakdown voltage, high input impedance,
low input capacitance, and fast switching speeds are
desired.
Logic-Level Interfaces (Ideal for TTL and CMOS)
Solid-State Relays
Analog Switches
Power Management
Telecommunication Switches
Package Type
3-lead SOT-23
(Top view)
DRAIN
SOURCE
GATE
See Table 2-1 for pin information.
2018-2022 Microchip Technology Inc. and its subsidiaries
DS20005704D-page 1
TP5335
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings(†)
Drain-to-Source Voltage ....................................................................................................................................... BVDSS
Drain-to-Gate Voltage .......................................................................................................................................... BVDGS
Gate-to-Source Voltage.......................................................................................................................................... ±20V
Junction Temperature, TJ .................................................................................................................... –55°C to +150°C
Storage Temperature, TS...................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to
maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS – COMMERCIAL
Electrical Specifications: TA = TJ = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C
unless otherwise stated. (Pulse test: 300 µs pulse, 2% duty cycle.)
Parameter
Sym.
Min.
Typ.
Max.
Unit
Drain-to-Source Breakdown
Voltage
BVDSS
–350
—
—
V
VGS = 0V, ID = –100 µA
Gate Threshold Voltage
VGS(th)
–1
—
–2.4
V
VDS = VGS, ID = –1 mA
ΔVGS(th)
—
—
4.5
IGSS
—
—
–100
nA
VGS = ±20V, VDS = 0V
—
—
–10
µA
VDS = Maximum rating,
VGS = 0V
—
—
–1
mA
VDS = Maximum rating,
VGS = 0V, TA = 125°C (Note 1)
–200
—
—
mA
VGS = –4.5V, VDS = –25V
–400
—
—
mA
VGS = –10V, VDS = –25V
—
—
75
Ω
VGS = –4.5V, ID = –150 mA
—
—
30
Ω
VGS = –10V, ID = –200 mA
—
—
1.7
%/°C
VGS = –10V, ID = –200 mA
(Note 1)
Change in VGS(th)
with Temperature
Gate Body Leakage
Zero-Gate Voltage Drain Current
On-State Drain Current
Static Drain-to-Source On-State
Resistance
RDS(ON)
Change in RDS(ON) with
Temperature
ΔRDS(ON)
Note 1:
mV/°C VDS = VGS, ID = –1 mA (Note 1)
IDSS
ID(ON)
Conditions
Specification is obtained by characterization and is not 100% tested.
DC ELECTRICAL CHARACTERISTICS – AUTOMOTIVE
Electrical Specifications: Boldface specification limits apply over the full operating temperature range of
TA = TJ = –55°C, 25°C, and 150°C unless otherwise specified. Non-boldfaced specification limits apply only to
TA = TJ = 25°C unless otherwise specified. All DC parameters are 100% tested at all three temperatures unless
otherwise specified. (Pulse test: 300 µs pulse, 2% duty cycle.)
Sym.
Min.
Typ.
Max.
Unit
Drain-to-Source Breakdown
Voltage
Parameter
BVDSS
–350
—
—
V
VGS = 0V, ID = –100 µA
Gate Threshold Voltage
VGS(th)
–1
—
–2.4
V
VDS = VGS, ID = –1 mA
ΔVGS(th)
—
3.3
—
—
—
–100
nA
VGS = ±20V, VDS = 0V
—
—
–220
nA
VGS = ±20V, VDS = 0V
Change in VGS(th)
with Temperature
Gate Body Leakage
Note 1:
IGSS
Conditions
mV/°C VDS = VGS, ID = –1 mA (Note 1)
Specification is obtained by characterization and is not 100% tested.
DS20005704D-page 2
2018-2022 Microchip Technology Inc. and its subsidiaries
TP5335
DC ELECTRICAL CHARACTERISTICS – AUTOMOTIVE (CONTINUED)
Electrical Specifications: Boldface specification limits apply over the full operating temperature range of
TA = TJ = –55°C, 25°C, and 150°C unless otherwise specified. Non-boldfaced specification limits apply only to
TA = TJ = 25°C unless otherwise specified. All DC parameters are 100% tested at all three temperatures unless
otherwise specified. (Pulse test: 300 µs pulse, 2% duty cycle.)
Parameter
Zero-Gate Voltage Drain Current
On-State Drain Current
Static Drain-to-Source On-State
Resistance
Change in RDS(ON) with
Temperature
Note 1:
Sym.
Min.
Typ.
Max.
Unit
—
—
–10
µA
VDS = Maximum rating,
VGS = 0V
—
—
–1
mA
VDS = Maximum rating,
VGS = 0V
IDSS
ID(ON)
RDS(ON)
ΔRDS(ON)
Conditions
–200
—
—
mA
VGS = –4.5V, VDS = –25V
–400
—
—
mA
VGS = –10V, VDS = –25V
–375
—
—
mA
VGS = –10V, VDS = –25V
—
—
75
Ω
VGS = –4.5V, ID = –150 mA
—
—
30
Ω
VGS = –10V, ID = –200 mA
—
—
70
Ω
VGS = –10V, ID = –200 mA
%/°C
VGS = –10V, ID = –200 mA
(Note 1)
—
1
—
Specification is obtained by characterization and is not 100% tested.
AC ELECTRICAL CHARACTERISTICS – COMMERCIAL
Electrical Specifications: TA = TJ = 25°C unless otherwise specified. Specification is obtained by characterization
and is not 100% tested.
Parameter
Sym.
Min.
Typ.
Forward Transconductance
GFS
125
—
—
Input Capacitance
CISS
—
—
110
Common Source Output
Capacitance
COSS
—
—
60
pF
Reverse Transfer Capacitance
CRSS
—
—
22
pF
Turn-On Delay Time
td(ON)
—
—
20
ns
tr
—
—
15
ns
td(OFF)
—
—
25
ns
tf
—
—
25
ns
VSD
—
—
–1.8
V
VGS = 0V, ISD = –200 mA
(Note 1)
trr
—
800
—
ns
VGS = 0V, ISD = –200 mA
Rise Time
Turn-Off Delay Time
Fall Time
Max.
Unit
Conditions
mmho VDS = –25V, ID = –200 mA
pF
VGS = 0V, VDS = –25V,
f = 1 MHz
VDD = –25V, ID = –150 mA,
RGEN = 25Ω
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
Note 1:
All DC parameters are 100% tested at 25°C unless otherwise stated.(Pulse test: 300 µs pulse, 2% duty
cycle.)
2018-2022 Microchip Technology Inc. and its subsidiaries
DS20005704D-page 3
TP5335
AC ELECTRICAL CHARACTERISTICS – AUTOMOTIVE
Electrical Specifications: TA = TJ = 25°C unless otherwise specified. Specification is obtained by characterization
and is not 100% tested.
Parameter
Sym.
Min.
Typ.
Max.
Forward Transconductance
GFS
—
285
—
Input Capacitance
CISS
—
80
—
Common Source Output
Capacitance
COSS
—
12
—
pF
Reverse Transfer Capacitance
CRSS
—
2
—
pF
Turn-On Delay Time
td(ON)
—
7.6
—
ns
tr
—
3
—
ns
td(OFF)
—
19
—
ns
tf
—
10
—
ns
VSD
—
—
–1.8
V
VGS = 0V, ISD = –200 mA
(Note 1)
trr
—
450
—
ns
VGS = 0V, ISD = –200 mA
Rise Time
Turn-Off Delay Time
Fall Time
Unit
Conditions
mmho VDS = –25V, ID = –200 mA
pF
VGS = 0V, VDS = –25V,
f = 1 MHz
VDD = –25V, ID = –150 mA,
RGEN = 25Ω
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
Note 1:
100% Production Tested at TA = TJ = (–55°C, 25°C, and 150°C).
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ.
Max.
Unit
Operating Junction Temperature
TJ
–55
—
+150
°C
Storage Temperature
TS
–55
—
+150
°C
JA
—
203
—
°C/W
Conditions
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
3-lead SOT-23
THERMAL CHARACTERISTICS
Package
3-lead SOT-23
Note 1:
ID (Note 1)
(Continuous)
(mA)
ID
(Pulsed)
(mA)
Power Dissipation at
TA = 25°C
(W)
IDR (Note 1)
(mA)
IDRM
(mA)
–85
–400
0.36
–85
–400
ID (continuous) is limited by maximum TJ.
DS20005704D-page 4
2018-2022 Microchip Technology Inc. and its subsidiaries
TP5335
2.0
PIN DESCRIPTION
Table 2-1 shows the description of pins in TP5335
SOT-23. Refer to Package Type for the location of
pins.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
1
Gate
2
Source
3
Drain
Description
Gate
Source
Drain
2018-2022 Microchip Technology Inc. and its subsidiaries
DS20005704D-page 5
TP5335
3.0
FUNCTIONAL DESCRIPTION
Figure 3-1 illustrates the switching waveforms and test
circuit for TP5335.
0V
Pulse
Generator
10%
INPUT
RGEN
90%
t(OFF)
-10V
t(ON)
D.U.T.
td(ON)
tr
td(OFF)
tf
INPUT
OUTPUT
0V
90%
OUTPUT
10%
RL
90%
10%
VDD
FIGURE 3-1:
VDD
Switching Waveforms and Test Circuit.
TABLE 3-1:
PRODUCT SUMMARY
BVDSS/BVDGS
(V)
RDS(ON)
(Maximum)
(Ω)
VGS(th)
(Maximum)
(V)
–350
30
–2.4
DS20005704D-page 6
2018-2022 Microchip Technology Inc. and its subsidiaries
TP5335
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
3-Lead SOT-23
(2.90 mm X 1.30 mm)
Example
P3S256
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or not include the
corporate logo.
2018-2022 Microchip Technology Inc. and its subsidiaries
DS20005704D-page 7
TP5335
3-Lead TO-236AB (SOT-23) Package Outline (K1/T)
2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch
D
3
E1 E
Gauge
Plane
0.25
1
Seating
Plane
L
2
e
L1
b
e1
View B
Top View
View B
A
A
A2
Seating
Plane
A1
Side View
View A - A
A
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Symbol
Dimension
(mm)
A
A1
A2
b
D
E
E1
MIN
0.89
0.01
0.88
0.30
2.80
2.10
1.20
NOM
-
-
0.95
-
2.90
-
1.30
MAX
1.12
0.10
1.02
0.50
3.04
2.64
1.40
e
e1
L
L1
0.20†
0.95
BSC
1.90
BSC
0.50
0.60
ș
0O
0.54
REF
8O
JEDEC Registration TO-236, Variation AB, Issue H, Jan. 1999.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
DS20005704D-page 8
2018-2022 Microchip Technology Inc. and its subsidiaries
TP5335
APPENDIX A:
REVISION HISTORY
Revision D (March 2022)
• Updated tables DC Electrical Characteristics –
Automotive and AC Electrical Characteristics –
Automotive.
• Updated Section 4.1 “Package Marking
Information”.
• Updated Product Identification System format.
• Updated legal and contact information.
Revision C (June 2020)
• Added automotive specifications to the Electrical
Characteristics section.
• Added automotive specifications to the Product
Identification System section.
• Made minor text changes throughout the
document.
Revision B (February 2020)
• Revised the order of pins in the Pin Function
Table.
• Revised the Electrical Specifications and included
notes in the DC Electrical Characteristics and AC
Electrical Characteristics tables.
• Made minor text changes throughout the
document.
Revision A (December 2018)
• Converted Supertex Doc# DSFP-TP5335 to
Microchip DS20005704A.
• Made minor text changes throughout the
document.
2018-2022 Microchip Technology Inc. and its subsidiaries
DS20005704D-page 9
2N7000
NOTES:
DS20005704D-page 10
2018-2022 Microchip Technology Inc. and its subsidiaries
TP5335
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
PART NO.
XX
-X
-XXX
Device
Package
Environmental
Qualification
Device:
TP5335:
P-Channel Enhancement-Mode Vertical DMOS FET
Package:
K1
= 3-lead SOT-23
Environmental: G
= Lead (Pb)-free/RoHS-compliant Package
Media Type:
(Blank)
= 3000/Reel for a K1 Package
Qualification:
(Blank)
VAO
= Standard Part
= Automotive AEC-Q100 Qualified
DS20005704D-page 11
Examples:
a) TP5335K1-G:
P-Channel Enhancement-Mode
Vertical DMOS FET, 3-lead
SOT-23, 3000/Reel
b) TP5335K1-G-VAO: P-Channel Enhancement-Mode
Vertical DMOS FET, Automotive
Grade, 3-lead SOT-23, 3000/
Reel, Automotive Grade
2018-2022 Microchip Technology Inc. and its subsidiaries
TP5335
NOTES:
2018-2022 Microchip Technology Inc. and its subsidiaries
DS20005704D-page 12
Note the following details of the code protection feature on Microchip products:
•
Microchip products meet the specifications contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is secure when used in the intended manner, within operating specifications, and
under normal conditions.
•
Microchip values and aggressively protects its intellectual property rights. Attempts to breach the code protection features of
Microchip product is strictly prohibited and may violate the Digital Millennium Copyright Act.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not
mean that we are guaranteeing the product is “unbreakable”. Code protection is constantly evolving. Microchip is committed to
continuously improving the code protection features of our products.
This publication and the information herein may be used only
with Microchip products, including to design, test, and integrate
Microchip products with your application. Use of this information in any other manner violates these terms. Information
regarding device applications is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your
specifications. Contact your local Microchip sales office for
additional support or, obtain additional support at https://
www.microchip.com/en-us/support/design-help/client-supportservices.
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RELATED TO THE INFORMATION INCLUDING BUT NOT
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© 2018-2022, Microchip Technology Incorporated and its subsidiaries.
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2018-2022 Microchip Technology Inc. and its subsidiaries
ISBN: 978-1-6683-0092-3
DS20005704D-page 13
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DS20005704D-page 14
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