USB2229/USB2230
5th Generation Hi-Speed USB Flash Media
and IrDA Controller with Integrated Card Power FETs
IrDA Controller
• IrDA v1.1 FIR and SIR Compliant Controller, with
9.6K, 19.2K, 38.4K, 57.6K, 115.2K, 0.576Mbps,
1.152Mpbs and 4Mbps data rate support.
Flash Media Controller
• Complete System Solution for interfacing SmartMedia™ (SM) or xD Picture Card™ (xD)1, Memory
Stick™ (MS), High Speed Memory Stick (HSMS),
Memory Stick PRO (MSPRO), MS Duo™, Secure
Digital (SD), High Speed SD, Mini-Secure Digital
(Mini-SD), TransFlash (SD), MultiMediaCard™
(MMC), Reduced Size MultiMediaCard (RSMMC), NAND Flash, Compact Flash™ (CF) and
CF Ultra™ I & II, and CF form-factor ATA hard
drives to Hi-Speed USB
- Supports USB Bulk Only Mass Storage Compliant Bootable BIOS
• Support for simultaneous operation of all above
devices. (only one at a time of each of the following groups supported: CF or ATA drive, SM or XD
or NAND, SD or MMC)
• On-Chip 4-Bit High Speed Memory Stick and MS
PRO Hardware Circuitry
• On-Chip firmware reads and writes High Speed
Memory Stick and MS PRO
• 1-bit ECC correction performed in hardware for
maximum efficiency
• Hardware support for SD Security Command
Extensions
• On-chip power FETs with short circuit protection
for supplying flash media card power
• USB Bus Power Certified
• 3.3 Volt I/O with 5V input tolerance on VBUS/
GPIO3
• Complete USB Specification 2.0 Compatibility for
Bus Powered Operation
- Includes Hi-Speed USB Transceiver
- A Bi-directional Control and two Bi-directional
Bulk Endpoints are provided.
• 8051 8 bit microprocessor
- Provides low speed control functions
- 30 Mhz execution speed at 1 clock per
instruction cycle average
- 12K Bytes of internal SRAM for general purpose scratchpad
•
•
•
•
•
•
•
•
•
•
•
- 768 Bytes of internal SRAM for general purpose scratchpad or program execution while
re-flashing external ROM
- Two, Double Buffered Bulk Endpoints
- Two, Bi-directional 512 Byte Buffers for Bulk
Endpoints
- 64 Byte RX Control Endpoint Buffer
- 64 Byte TX Control Endpoint Buffer
Internal or External Program Memory Interface
- 76K Byte Internal Code Space or Optional
128K Byte External Code Space using Flash,
SRAM or EPROM memory.
On Board 24Mhz Crystal Driver Circuit
Can be clocked by 48MHz external source
On-Chip 1.8V Regulator for Low Power Core
Operation
Internal PLL for 480Mhz Hi-Speed USB Sampling,
Configurable MCU clock
Supports firmware upgrade via USB bus if “boot
block” Flash program memory is used
12 GPIOs for special function use: LED indicators, button inputs, power control to memory
devices, etc.
- Inputs capable of generating interrupts with
either edge sensitivity
Attribute bit controlled features:
- Activity LED polarity/operation/blink rate
- Full or Partial Card compliance checking
- Bus or Self Powered
- LUN configuration and assignment
- Write Protect Polarity
- SmartDetach - Detach from USB when no
Card Inserted for Notebook apps
- Cover Switch operation for xD compliance
- Inquiry Command operation
- SD Write Protect operation
- Older CF card support
- Force USB 1.1 reporting
- Internal or External Power FET operation
Compatible with Microsoft WinXP, WinME, Win2K
SP3, Apple OS10, Softconnex, and Linux MultiLUN Mass Storage Class Drivers
Win2K, Win98/98SE and Apple OS8.6 and OS9
Multi-LUN Mass Storage Class Drivers available
from Microchip
128-Pin TQFP RoHS Compliant package (1.0mm
height, 14mmx14mm footprint)
1.xD Picture Card not applicable to USB2229.
2005-2016 Microchip Technology Inc.
DS00002252A-page 1
USB2229/USB2230
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at docerrors@microchip.com. We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.
Customer Notification System
Register on our web site at www.microchip.com to receive the most current information on all of our products.
DS00002252A-page 2
2005-2016 Microchip Technology Inc.
USB2229/USB2230
Table of Contents
1.0 General Description ........................................................................................................................................................................ 4
2.0 Pin Table ......................................................................................................................................................................................... 6
3.0 Block Diagram ................................................................................................................................................................................. 9
4.0 Pin Configuration .......................................................................................................................................................................... 10
5.0 Pin Descriptions ............................................................................................................................................................................ 11
6.0 DC Parameters ............................................................................................................................................................................. 18
7.0 Package Information ..................................................................................................................................................................... 22
8.0 GPIO Usage .................................................................................................................................................................................. 23
Appendix A: Data Sheet Revision History ........................................................................................................................................... 24
The Microchip Web Site ...................................................................................................................................................................... 25
Customer Change Notification Service ............................................................................................................................................... 25
Customer Support ............................................................................................................................................................................... 25
Product Identification System ............................................................................................................................................................. 26
2005-2016 Microchip Technology Inc.
DS00002252A-page 3
USB2229/USB2230
1.0
GENERAL DESCRIPTION
The USB2229/USB2230 is a Hi-Speed USB IrDA and Bulk Only Mass Storage Class Peripheral Controller. The Bulk
Only Mass Storage Class Peripheral Controller supports CompactFlash (CF) in True IDE Mode only, SmartMedia (SM),
Memory Stick (MS) including both serial and parallel interface and Secure Digital/MultiMediaCard (SD/MMC) flash
memory devices. It provides a single chip solution for the most popular flash memory cards in the market. In addition,
the IrDA controller consists of the Microchip IrCC block, which includes a Synchronous Communications Engine (SCE).
The IrCC SCE supports FIR and SIR IrDA. The IrCC offers flexible signal routing and programmable output control
through the Raw mode interface, General Purpose Data pins and Output Multiplexer. Chip-level address decoding is
required to access the IrCC register set.
The device consists of a USB2.0 PHY and SIE, buffers, Fast 8051 microprocessor with expanded scratchpad, and program SRAM, and IrDA, CF, MS, SM and SD controllers. The SD controller supports both SD and MMC devices.
Provisions for external Flash Memory up to 128K bytes for program storage is provided (note: when Bank switching is
enabled the upper 64K will map into the 8051 ROM space, otherwise, only the first 64K bytes is used).
12K bytes of scratchpad SRAM and 768Bytes of program SRAM are also provided.
Twelve GPIO pins are provided for indicators, external serial EEPROM for OEM ID and system configuration information, and other special functions.
Internal power FETs are provided to directly supply power to the xD/SM, MMC/SD and MS/MSPro cards.
The internal ROM program is capable of implementing any combination of single or multi-LUN CF/SD/MMC/SM/MS
reader functions with individual card power control and activity indication. Microchip also provides licenses** for Win98
and Win2K drivers and setup utilities. Note: Please check with Microchip for precise features and capabilities for the
current ROM code release.
1.1
Acronyms
SM:
SmartMedia
SMC:
SmartMedia Controller
FM:
Flash Media
FMC:
Flash Media Controller
CF:
Compact Flash
CFC:
CompactFlash Controller
SD:
Secure Digital
SDC:
Secure Digital Controller
MMC:
MultiMediaCard
MS:
Memory Stick
MSC:
Memory Stick Controller
TPC:
Transport Protocol Code.
ECC:
Error Checking and Correcting
CRC:
Cyclic Redundancy Checking
1.2
1.
2.
3.
4.
5.
6.
7.
8.
9.
Reference Documents
SmartMedia™ Electrical Specification Version 1.30
SmartMedia™ Physical Format Specifications Version 1.30
SmartMedia™ Logical Format Specifications Version 1.20
SMIL (SmartMedia Interface Library) Software Edition Version 1.00, Toshiba Corporation, 01, July, 2000
SMIL (SmartMedia Interface Library) Hardware Edition Version 1.00, Toshiba Corporation, 01, July, 2000
MultiMediaCard System Specification Version 2.2
SD Memory Card Specifications, Part 1, Physical Layer Specification Version 1.10, April 2003, SD Group
SD Memory Card Specifications, Part 2, File System Specification Version 1.01, April 15th, 2001, SD Group
SD Memory Card Specifications, Part 3, Security Specification Version 1.01, April 15th, 2001, SD Group
DS00002252A-page 4
2005-2016 Microchip Technology Inc.
USB2229/USB2230
10. SD Card Specification, Part E1, Secure Digital Input/Output (SDIO) card Specification, Version 1.00, October
2001, SD Group.
11. Memory Stick Standard Excerption from Format Specification v1.3, July, 2000, Sony Corporation.
12. Memory Stick Standard Format Specifications ver 2.0 (Memory Stick PRO). Tentative Release 0.81, February,
2002
13. CompactFlash Specification Rev 1.4
14. CF+ & CF Specification Rev. ATA-5 Draft 0.2
15. Universal Serial Bus Specification Rev 2.0
16. Samsung K9K2G08Q0M Data Sheet
17. xD Picture Card, Card Specification Version 1.10 (Jan 31, 2004)
18. xD Picture Card, Format Specification Version 1.10 (Jan 31, 2004)
19. xD Picture Card, Host Guideline Version 1.10 (Jan 31, 2004)
20. xD Picture Card, Compliance Guideline Version 1.10 (Jan 31, 2004)
2005-2016 Microchip Technology Inc.
DS00002252A-page 5
USB2229/USB2230
2.0
PIN TABLE
2.1
128-Pin Package
TABLE 2-1:
USB2229/USB2230 128-PIN PACKAGE
CompactFlash INTERFACE (28 Pins)
CF_D0
CF_D1
CF_D2
CF_D3
CF_D4
CF_D5
CF_D6
CF_D7
CF_D8
CF_D9
CF_D10
CF_D11
CF_D12
CF_D13
CF_D14
CF_D15
CF_nIOR
CF_nIOW
CF_IRQ
CF_nRESET
CF_IORDY
CF_nCS0
CF_nCS1
CF_SA0
CF_SA1
CF_SA2
CF_nCD1
CF_nCD2
SmartMedia INTERFACE (17 Pins)
SM_D0
SM_D1
SM_D2
SM_D4
SM_D5
SM_D6
SM_D3
SM_D7
SM_ALE
SM_CLE
SM_nRE
SM_nWE
SM_nWP
SM_nB/R
SM_nCE
SM_nCD
SM_nWPS
Memory Stick INTERFACE (7 Pins)
MS_BS
MS_SDIO/MS_D0
MS_SCLK
MS_D1
MS_D2
MS_D3
MS_INS
SD INTERFACE (7 Pins)
SD_CMD
SD_CLK
SD_DAT0
SD_DAT2
SD_DAT3
SD_nWP
SD_DAT1
USB INTERFACE (10 Pins)
USBDP
USBDM
ATEST
RBIAS
VDD18PLL
VSSPLL
VDDA33
VSSA
XTAL1/CLKIN
XTAL2
MA0/CLK_SEL0
MA1/CLK_SEL1
MA2/SEL_CLKDRV
MA3/TX_POL
MA4
MA5
MA6
MA7
MEMORY/IO INTERFACE (27 Pins)
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MD0
MD1
MD2
MD3
MD7
MD4
MD5
MD6
nMRD
nMWR
nMCE
MISC (15 Pins)
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6/ROMEN/MA16
GPIO7
GPIO8/
CRD_PWR0
GPIO9
GPIO10/
CRD_PWR1
GPIO11/
CRD_PWR2
GPIO12
nTEST0
nTEST1
nRESET
IR_TXD/TX
IR_RXD/RX
IrDA (3 PINS)
DS00002252A-page 6
IR_MODE
2005-2016 Microchip Technology Inc.
USB2229/USB2230
TABLE 2-1:
USB2229/USB2230 128-PIN PACKAGE (CONTINUED)
DIGITAL, POWER, GROUND & NC (14 Pins)
(5)VDD33
(2)VDD18
(7)VSS
Total 128
2.2
128-Pin List Table
TABLE 2-2:
USB2229/USB2230 128-PIN TQFP
Pin #
Name
MA
Pin #
Name
MA
Pin #
Name
MA
Pin #
Name
MA
1
MA13
8
33
CF_D1
8
65
SM_D0
8
97
VSS
-
2
MA14
8
34
CF_D2
8
66
SM_D1
8
98
RBIAS
-
3
VDD33
-
35
CF_D3
8
67
SM_D2
8
99
ATEST
-
4
MA15
8
36
CF_D4
8
68
SM_D3
8
100
VDD33
-
5
MD0
8
37
CF_D5
8
69
SM_D4
8
101
VDD18PLL
-
6
MD1
8
38
CF_D6
8
70
SM_D5
8
102
XTAL1/
CLKIN
-
7
MD2
8
39
CF_D7
8
71
SM_D6
8
103
XTAL2
-
8
MD3
8
40
CF_D8
8
72
SM_D7
8
104
VSSPLL
-
9
MD4
8
41
CF_D9
8
73
SM_ALE
8
105
GPIO9
8
10
MD5
8
42
GPIO8/
CRD_PWR0
8
74
SM_nWP
8
106
VDD18
-
11
MD6
8
43
VDD33
-
75
SM_CLE
8
107
GPIO7
8
12
MD7
8
44
GPIO11/
CRD_PWR2
8
76
SM_nWPS
-
108
VDD33
-
13
nMRD
8
45
CF_D10
8
77
SM_nB/R
-
109
GPIO6/
ROMEN/
MA16
8
14
nMWR
8
46
CF_D11
8
78
SM_nCD
-
110
GPIO5
8
15
VSS
-
47
VSS
-
79
GPIO10/
CRD_PWR1
8
111
GPIO4
8
16
VSS
-
48
CF_D12
8
80
VDD33
-
112
VSS
-
17
nMCE
8
49
VDD18
-
81
SM_nRE
8
113
nRESET
8
18
MS_INS
-
50
CF_D13
8
82
SM_nWE
8
114
GPIO2
8
19
MS_D0/
MS_SDIO
8
51
CF_D14
8
83
SM_nCE
8
115
GPIO1
-
20
MS_D1
8
52
CF_D15
8
84
VSS
-
116
MA0/
CLK_SEL0
8
21
MS_D2
8
53
CF_nCD1
-
85
VSS
-
117
MA1/
CLK_SEL1
8
22
MS_D3
8
54
CF_nCD2
-
86
VSSA
-
118
MA2/
SEL_
CLKDRV
8
23
MS_
SCLK
8
55
CF_IRQ
8
87
USBDM
-
119
MA3/
TX_POL
8
24
MS_BS
8
56
CF_IORDY
8
88
USBDP
-
120
MA4
8
25
SD_nWP
-
57
CF_nIOR
8
89
VDDA33
-
121
MA5
8
26
SD_DAT0
8
58
CF_nIOW
8
90
IR_MODE
8
122
MA6
8
27
SD_DAT1
8
59
CF_nRESET
8
91
IR_RXD/RX
8
123
MA7
8
28
SD_DAT2
8
60
CF_nCS0
8
92
IR_TXD/TX
8
124
MA8
8
2005-2016 Microchip Technology Inc.
DS00002252A-page 7
USB2229/USB2230
TABLE 2-2:
USB2229/USB2230 128-PIN TQFP (CONTINUED)
Pin #
Name
MA
Pin #
Name
MA
Pin #
Name
MA
Pin #
Name
MA
29
SD_DAT3
8
61
CF_nCS1
8
93
GPIO12
8
125
MA9
8
30
SD_CMD
8
62
CF_SA0
8
94
GPIO3
8
126
MA10
8
31
SD_CLK
-
63
CF_SA1
8
95
nTEST1
-
127
MA11
8
32
CF_D0
8
64
CF_SA2
-
96
nTEST0
-
128
MA12
8
DS00002252A-page 8
2005-2016 Microchip Technology Inc.
BLOCK DIAGRAM
2.25KB
SRAM
Flash Media
Controllers
(FMC)
512 Bytes EP3 TX/RX Buffer B
512 Bytes EP3 TX/RX Buffer A
Auto address generators
512 Bytes EP2 TX/RX Buffer B
Address
EP0TX_BC
DATA
512 Bytes EP2 TX/RX Buffer A
CF
Controller
64 Bytes EP1RX
Address
Memory
Cards
Flash Media DMA Unit
Control/
Status
64 Bytes EP1TX
EP0RX_BC
64 Bytes EP0RX
Address
RAMWR_A/B
Address
RAMRD_A/B
Address
RAMWR_C/D
Address
RAMRD_C/D
Address
32 Bit
60MHz
Data @ 32 bit
15MHz
FMC Data MUX
Address
Data Buss
EP1RX_BC
Latch phase 1
FMC
Address
A ddress MUX
EP1TX_BC
SM
Controller
Control/
Status
ECC
Control/
Status
SM/SSFDC
DATA
MS
Controller
Control/
Status
CRC
Latch phase 3
8051
Latch phase 0, 2
SIE
CF
DATA
64 Bytes EP0TX
MS/HS MS/MS PRO
DATA
SD
Controller
Control/
Status
#LOCKEDBY0HASE#LOCK
SIE
32 bit 15MHz Data Bus
X DATA & SFR
Address and Data busses
Address Register
CRC
SD/MMC
12K Byte
Scratchpad
SRAM
IR
Transceiver
IrDA + 128Byte FIFO
( Serial Interface Engine )
SIE Control Regs
USB 2.0 PHY
( Transciever )
Configuration and Control
Clock Generation
GPIO8/CRD_PWR0
PWR_FET1
GPIO10/CRD_PWR1
PWR_FET2
Interrupt Controller
GPIO11/CRD_PWR2
Osc
GPIO
XTAL
2005-2016 Microchip Technology Inc.
7 pins
PWR_FET0
FAST 8051
CPU CORE
Scratchpad
SRAM (768 Byte)
76K ROM
12 pins
ROMEN
CLOCKOUT
24 MHz
MEM/IO Bus
#LOCKEDBY0HASE#LOCK
29pins
Program Memory/ IO
Bus
USB2229/USB2230
DS00002252A-page 9
3.0
USB2229/USB2230
4.0
PIN CONFIGURATION
USB2229/USB2230 128-PIN TQFP
MA12
MA11
MA10
MA9
MA8
MA7
MA6
MA5
MA4
MA3/TX_POL
MA2/SEL_CLKDRV
MA1/CLK_SEL1
MA0/CLK_SEL0
GPIO1
GPIO2
nRESET
VSS
GPIO4
GPIO5
GPIO6/ROMEN/MA16
VDD33
GPIO7
VDD18
GPIO9
VSSPLL
XTAL2
XTAL1/CLKIN
VDD18PLL
VDD33
ATEST
RBIAS
VSS
FIGURE 4-1:
1
96
USB2230
32
64
nTEST0
nTEST1
GPIO3
GPIO12
IR_TXD/TX
IR_RXD/RX
IR_MODE
VDDA33
USBDP
USBDM
VSSA
VSS
VSS
SM_nCE
SM_nWE
SM_nRE
VDD33
GPIO10/CRD_PWR1
SM_nCD
SM_nB/R
SM_nWPS
SM_CLE
SM_nWP
SM_ALE
SM_D7
SM_D6
SM_D5
SM_D4
SM_D3
SM_D2
SM_D1
SM_D0
CF_D1
CF_D2
CF_D3
CF_D4
CF_D5
CF_D6
CF_D7
CF_D8
CF_D9
GPIO8/CRD_PWR0
VDD33
GPIO11/CRD_PWR2
CF_D10
CF_D11
VSS
CF_D12
VDD18
CF_D13
CF_D14
CF_D15
CF_nCD1
CF_nCD2
CF_IRQ
CF_IORDY
CF_nIOR
CF_nIOW
CF_nRESET
CF_nCS0
CF_nCS1
CF_SA0
CF_SA1
CF_SA2
MA13
MA14
VDD33
MA15
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
nMRD
nMWR
VSS
VSS
nMCE
MS_INS
MS_D0/MS_SDIO
MS_D1
MS_D2
MS_D3
MS_SCLK
MS_BS
SD_nWP
SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3
SD_CMD
SD_CLK
CF_D0
DS00002252A-page 10
2005-2016 Microchip Technology Inc.
USB2229/USB2230
5.0
PIN DESCRIPTIONS
This section provides a detailed description of each signal. The signals are arranged in functional groups according to
their associated interface.
The “n” symbol in the signal name indicates that the active, or asserted state occurs when the signal is at a low voltage
level. When “n” is not present before the signal name, the signal is asserted when at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of
“active low” and “active high” signal. The term assert, or assertion indicates that a signal is active, independent of
whether that level is represented by a high or low voltage. The term negate, or negation indicates that a signal is inactive.
5.1
Pin Descriptions
TABLE 5-1:
USB2229/USB2230 PIN DESCRIPTIONS
Name
Symbol
Buffer Type
Description
CompactFlash (In True IDE Mode) INTERFACE
CF Chip Select 1
CF_nCS1
O8PU
This pin is the active low chip select 1 signal for the CF
ATA device
CF Chip Select 0
CF_nCS0
O8PU
This pin is the active low chip select 0 signal for the task
file registers of CF ATA device in the True IDE mode.
CF Register Address
2
CF_SA2
O8
This pin is the register select address bit 2 for the CF ATA
device.
CF Register Address
1
CF_SA1
O8
This pin is the register select address bit 1 for the CF ATA
device
CF Register Address
0
CF_SA0
O8
This pin is the register select address bit 0 for the CF ATA
device.
CF Interrupt
CF_IRQ
IPD
This is the active high interrupt request signal from the CF
device.
CF
Data 15-8
CF_D[15:8]
I/O8PD
The bi-directional data signals CF_D15-CF_D8 in True
IDE mode data transfer.
In the True IDE Mode, all of task file register operation
occur on the CF_D[7:0], while the data transfer is on
CF_D[15:0].
The bi-directional data signal has an internal weak pulldown resistor.
CF
Data7-0
CF_D[7:0]
I/O8PD
The bi-directional data signals CF_D7-CF_D0 in the True
IDE mode data transfer.
In the True IDE Mode, all of task file register operation
occur on the CF_D[7:0], while the data transfer is on
CF_D[15:0].
The bi-directional data signal has an internal weak pulldown resistor.
IO Ready
CF_IORDY
IPU
This pin is active high input signal.
This pin has an internally controlled weak pull-up resistor.
CF
Card Detection2
CF_nCD2
IPU
This card detection pin is connected to the ground on the
CF device, when the CF device is inserted.
CF
Card Detection1
CF_nCD1
IPU
This card detection pin is connected to ground on the CF
device, when the CF device is inserted.
CF
Hardware Reset
CF_nRESET
O8
This pin is an active low hardware reset signal to CF
device.
CF
IO Read
CF_nIOR
O8
This pin is an active low read strobe signal for CF device.
This pin has an internally controlled weak pull-up resistor.
This pin has an internally controlled weak pull-up resistor.
2005-2016 Microchip Technology Inc.
DS00002252A-page 11
USB2229/USB2230
TABLE 5-1:
USB2229/USB2230 PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer Type
Description
CF
IO Write Strobe
CF_nIOW
O8
This pin is an active low write strobe signal for CF device.
SmartMedia INTERFACE
SM
Write Protect
SM_nWP
O8PD
This pin is an active low write protect signal for the SM
device.
This pin has a weak pull-down resistor that is
permanently enabled
SM
Address Strobe
SM_ALE
O8PD
This pin is an active high Address Latch Enable signal for
the SM device.
This pin has a weak pull-down resistor that is
permanently enabled
SM
Command Strobe
SM_CLE
O8PD
This pin is an active high Command Latch Enable signal
for the SM device.
This pin has a weak pull-down resistor that is
permanently enabled
SM
Data7-0
SM_D[7:0]
I/O8PD
These pins are the bi-directional data signal SM_D7SM_D0.
The bi-directional data signal has an internal weak pulldown resistor.
SM
Read Enable
SM
Write Enable
SM_nRE
08PU
This pin is an active low read strobe signal for SM device.
When using the internal FET, this pin has an internal
weak pull-up resistor that is tied to the output of the
internal Power FET.
SM_nWE
08
If an external FET is used (Internal FET is disabled), then
the internal pull-up is not available (external pull-ups must
be used, and should be connected to the applicable Card
Power Supply).
O8PU
This pin is an active low write strobe signal for SM device.
When using the internal FET, this pin has an internal
weak pull-up resistor that is tied to the output of the
internal Power FET.
08
If an external FET is used (Internal FET is disabled), then
the internal pull-up is not available (external pull-ups must
be used, and should be connected to the applicable Card
Power Supply).
A write-protect seal is detected, when this pin is low.
SM
Write Protect Switch
SM_nWPS
IPU
SM
Busy or Data Ready
SM_nB/R
I
This pin has an internally controlled weak pull-up resistor.
This pin is connected to the BSY/RDY pin of the SM
device.
An external pull-up resistor is required on this signal. The
pull-up resistor must be pulled up to the same power
source that powers the SM/NAND flash device.
SM
Chip Enable
SM_nCE
O8PU
This pin is the active low chip enable signal to the SM
device.
When using the internal FET, this pin has an internal
weak pull-up resistor that is tied to the output of the
internal Power FET.
08
DS00002252A-page 12
If an external FET is used (Internal FET is disabled), then
the internal pull-up is not available (external pull-ups must
be used, and should be connected to the applicable Card
Power Supply).
2005-2016 Microchip Technology Inc.
USB2229/USB2230
TABLE 5-1:
USB2229/USB2230 PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer Type
SM
Card Detection
SM_nCD
IPU
Description
This is the card detection signal from SM device to
indicate if the device is inserted.
This pin has an internally controlled weak pull-up resistor.
MEMORY STICK INTERFACE
MS
Bus State
MS_BS
MS
System
Data In/Out
MS_SDIO/MS_D
0
O8
This pin is connected to the BS pin of the MS device.
It is used to control the Bus States 0, 1, 2 and 3 (BS0,
BS1, BS2 and BS3) of the MS device.
I/O8PD
This pin is a bi-directional data signal for the MS device.
Most significant bit (MSB) of each byte is transmitted first
by either MSC or MS device.
The bi-directional data signal has an internal weak pulldown resistor.
MS
System
Data In/Out
MS_D[3:1]
MS
Card Insertion
MS_INS
I/O8PD
This pin is a bi-directional data signal for the MS device.
The bi-directional data signals have internal weak pulldown resistors.
IPU
This pin is the card detection signal from the MS device
to indicate, if the device is inserted.
This pin has an internally controlled weak pull-up resistor.
MS
System CLK
MS_SCLK
O8
SD
Data3-0
SD_DAT[3:0]
SD Clock
SD_CLK
O8
SD Command
SD_CMD
I/O8PU
This pin is an output clock signal to the MS device.
The clock frequency is software configurable.
SD INTERFACE
I/O8PU
These are bi-directional data signals.
These pins have internally controlled weak pull-up
resistors.
This is an output clock signal to SD/MMC device.
The clock frequency is software configurable.
This is a bi-directional signal that connects to the CMD
signal of SD/MMC device.
This pin has an internally controlled weak pull-up resistor.
SD
Write Protected
SD_nWP
IPD
This pin is an input signal with an internal weak pulldown.
This pin has an internally controlled weak pull-down
resistor.
USB INTERFACE
USB Bus Data
USBDM
USBDP
IO-U
USB Transceiver Bias
RBIAS
I
Analog Test
ATEST
AIO
1.8v PLL Power
VDD18PLL
PLL Ground
Reference
VSSPLL
Ground Reference for 1.8v PLL power
3.3v Analog Power
VDDA33
3.3v Analog Power
Analog Ground
Reference
VSSA
2005-2016 Microchip Technology Inc.
These pins connect to the USB bus data signals.
A 12.0k, 1.0% resistor is attached from VSSA to this
pin, in order to set the transceiver’s internal bias currents.
This signal is used for testing the analog section of the
chip and should be connected to VDDA33 for normal
operation.
1.8v Power for the PLL
Analog Ground Reference for 3.3v Analog Power.
DS00002252A-page 13
USB2229/USB2230
TABLE 5-1:
USB2229/USB2230 PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer Type
Description
Crystal Input/External
Clock Input
XTAL1/
CLKIN
ICLKx
24Mhz Crystal or external 24/48 MHz clock input.
This pin can be connected to one terminal of the crystal
or can be connected to an external 24/48Mhz clock when
a crystal is not used.
Note:
The ‘MA[2:0] pins will be sampled while nRESET is asserted, and the value will be latched
upon nRESET negation. This will determine
the clock source and value.
Crystal Output
XTAL2
OCLKx
24Mhz Crystal
This is the other terminal of the crystal, or left open when
an external clock source is used to drive XTAL1/CLKIN.
It may not be used to drive any external circuitry other
than the crystal circuit.
MEMORY/IO INTERFACE
Memory Data Bus
MD[7:0]
IO8
When ROMEN bit of GPIO_IN1 register = 0, these
signals are used to transfer data between the internal
CPU and the external program memory.
These pins have internally controlled weak pull-up
resistors.
Memory Address Bus
MA[15:3]
O8
Memory Address Bus
MA3/
TX_POL
I/O8PU
These signals address memory locations within the
external memory.
MA3 Addresses memory locations within the external
memory.
During nRESET assertion, TX_POL will select the
operating polarity of the IR LED (active high or active low)
and the weak pull-up resistor will be enabled. When
nRESET is negated, the value on this pin will be internally
latched and this pin will revert to MA3 functionality, the
internal pull-up will be disabled.
Memory Address Bus
MA2/
SEL_CLKDRV
I/O8PD
MA2 Addresses memory locations within the external
memory.
SEL_CLKDRV. During nRESET assertion, this pins will
select the operating clock mode (crystal or externally
driven clock source), and a weak pull-down resistor is
enabled. When nRESET is negated, the value will be
internally latched and this pin will revert to MA2
functionality, the internal pull-down will be disabled.
‘0’ = Crystal operation (24MHz only)
‘1’ = Externally driven clock source (24MHz or 48MHz)
Note:
If the latched value is ‘1’, then the MA2 pin is
tri-stated when the following conditions are
true:
1. IDLE bit (PCON.0) is 1.
2. INT2 is negated
3. SLEEP bit of CLOCK_SEL is 1.
If the latched value is ‘0’, then the MA2 pin will function
identically to the MA[15:3] pins at all times (other than
during nRESET assertion).
DS00002252A-page 14
2005-2016 Microchip Technology Inc.
USB2229/USB2230
TABLE 5-1:
USB2229/USB2230 PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Memory Address Bus MA[1:0]/CLK_SE
L[1:0]
Buffer Type
Description
I/O8PD
MA[1:0], These signals address memory locations within
the external memory.
SEL[1:0]. During nRESET assertion, these pins will select
the operating frequency of the external clock, and the
corresponding weak pull-down resistors are enabled.
When nRESET is negated, the value on these pins will
be internal latched and these pins will revert to MA[1:0]
functionality, the internal pull-downs will be disabled.
SEL[1:0]
SEL[1:0]
SEL[1:0]
SEL[1:0]
Note:
=
=
=
=
‘00’. 24MHz
‘01’. RESERVED
‘10’. RESERVED
‘11’. 48MHz
If the latched value is ‘1’, then the corresponding MA pin is tri-stated when the following conditions are true:
1. IDLE bit (PCON.0) is 1.
2. INT2 is negated
3. SLEEP bit of CLOCK_SEL is 1.
If the latched value is ‘0’, then the corresponding MA pin
will function identically to the MA[15:3] pins at all times
(other than during nRESET assertion).
Memory Write Strobe
nMWR
O8
Program Memory Write; active low
Memory Read Strobe
nMRD
O8
Program Memory Read; active low
Memory Chip Enable
nMCE
O8
Program Memory Chip Enable; active low.
This signal is asserted, when any of the following
conditions are no longer met:
1. IDLE bit (PCON.0) is 1.
2. INT2 is negated
3. SLEEP bit of CLOCK_SEL is 1.
Note:
This signal is held to a logic ‘high’ while nRESET is asserted.
MISC
General Purpose I/O
GPIO1
I/O8
This pin may be used either as input, edge sensitive
interrupt input, or output.
General Purpose I/O
GPIO2
I/O8
This pin may be used either as input, edge sensitive
interrupt input, or output.
General Purpose I/O
GPIO3
I/O8
This pin may be used either as input, edge sensitive
interrupt input, or output.
General Purpose I/O
GPIO4
I/O8
This pin may be used either as input, edge sensitive
interrupt input, or output.
General Purpose I/O
GPIO5
I/O8
This pin may be used either as input, edge sensitive
interrupt input, or output.
2005-2016 Microchip Technology Inc.
DS00002252A-page 15
USB2229/USB2230
TABLE 5-1:
USB2229/USB2230 PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer Type
GPIO6, ROMEN,
Memory Address 16
GPIO6/ROMEN/
MA16
IPU
Description
This pin has an internal weak pull-up resistor that is
enabled or disabled by the state of nRESET.
The pull-up is enabled when nRESET is active.
The pull-up is disabled, when the nRESET is inactive
(some clock cycles later, after the rising edge of
nRESET).
The state of this pin is latched internally on the rising
edge of nRESET to determine if internal or external
program memory is used.
The state latched is stored in ROMEN bit of GPIO_IN1
register.
I/O8
After the rising edge of nRESET, this pin may be used as
GPIO6 or RXD.
When pulled low via an external weak pull-down resistor,
an external program memory should be connected to the
memory data bus. The USB2229/USB2230 uses this
external bus for program execution.
When this pin is left unconnected or pulled high by a
weak pull-up resistor, the USB2229/USB2230 uses the
internal ROM for program execution.
I/O8
For Bank Switching support, MA16 addresses the
external 128k memory above the standard 64k range (the
upper 64k is mapped into the 64k addressable ROM
space)
General Purpose I/O
GPIO7
I/O8
This pin may be used either as input, edge sensitive
interrupt input, or output.
General Purpose I/O
Or
Card Power
GPIO8/
CRD_PWR0
I/O8
GPIO: This pin may be used either as input, edge
sensitive interrupt input, or output.
General Purpose I/O
GPIO9
I/O8
This pin may be used either as input, edge sensitive
interrupt input, or output.
General Purpose I/O
Or
Card Power
GPIO10/
CRD_PWR1
I/O8
GPIO: This pin may be used either as input, edge
sensitive interrupt input, or output.
General Purpose I/O
Or
Card Power
GPIO11/
CRD_PWR2
CRD_PWR: Card Power drive of 3.3V @ 100mA.
CRD_PWR: Card Power drive of 3.3V @ 100mA.
I/O8
GPIO: This pin may be used either as input, edge
sensitive interrupt input, or output.
CRD_PWR: Card Power drive of 3.3V @ 200mA.
General Purpose I/O
GPIO12
I/O8
RESET input
nRESET
IS
These pins may be used either as input, or output.
This active low signal is used by the system to reset the
chip. The active low pulse should be at least 1s wide.
TEST Input
nTEST[1:0]
I
These signals are used for testing the chip. User should
normally tie them high externally, if the test function is not
used.
IrDA
IR MODE
IR_MODE
O8
IR_MODE, declares the operating speed of the IR link.
IR Receive Data or
UART RX
IR_RXD/RX
I
IR_RXD, can be used as IR receiver or as the UART RX
line.
IR Transmit Data or
UART TX
IR_TXD/TX
O8
IR_TXD, can be used as IR transmitter or as the UART
TX line.
DIGITAL POWER, GROUNDS, and NO CONNECTS
1.8v Digital Core
Power
DS00002252A-page 16
VDD18
+1.8V Core power
All VDD18 pins must be connected together on the circuit
board.
2005-2016 Microchip Technology Inc.
USB2229/USB2230
TABLE 5-1:
USB2229/USB2230 PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
3.3v Power & &
Voltage Regulator
Input
VDD33
Ground
VSS
Buffer Type
Description
3.3V Power & Regulator Input.
Pins 100 & 108 supply 3.3V power to the internal 1.8V
regulators.
Ground Reference
Note 1: Hot-insertion capable card connectors are required for all flash media. It is required for SD connector to have
Write Protect switch. This allows the chip to detect MMC card.
2: nMCE is normally asserted except when the 8051 is in standby mode.
5.2
Buffer Type Descriptions
TABLE 5-2:
USB2229/USB2230 BUFFER TYPE DESCRIPTIONS
Buffer
I
Description
Input
IPU
Input with internal weak pull-up resistor.
IPD
Input with internal weak pull-down resistor.
IS
I/O8
Input with Schmitt trigger
Input/Output buffer with 8mA sink and 8mA source.
I/O8PU
Input/Output buffer with 8mA sink and 8mA source, with an internal
weak pull-up resistor.
I/O8PD
Input/Output buffer with 8mA sink and 8mA source, with an internal
weak pull-down resistor.
O8
Output buffer with 8mA sink and 8mA source.
O8PU
Output buffer with 8mA sink and 8mA source, with an internal weak
pull-up resistor.
O8PD
Output buffer with 8mA sink and 8mA source, with an internal weak
pull-down resistor.
ICLKx
XTAL clock input
OCLKx
XTAL clock output
I/O-U
AIO
Analog Input/Output Defined in USB specification
Analog Input/Output
2005-2016 Microchip Technology Inc.
DS00002252A-page 17
USB2229/USB2230
6.0
DC PARAMETERS
6.1
Maximum Ratings
Operating Temperature Range.....................................................................................................................0oC to +70oC
Storage Temperature Range ..................................................................................................................... -55o to +150oC
Lead Temperature Range (soldering, 10 seconds) ...............................................................................................+325oC
Positive Voltage on GPIO3, with respect to Ground...................................................................................................5.5V
Positive Voltage on any signal pin, with respect to Ground........................................................................................4.6V
Positive Voltage on XTAL1, with respect to Ground...................................................................................................4.0V
Positive Voltage on XTAL2, with respect to Ground...................................................................................................2.5V
Negative Voltage on GPIO8, 10 & 11, with respect to Ground (see Note 6-2)......................................................... -0.5V
Negative Voltage on any pin, with respect to Ground .............................................................................................. -0.5V
Maximum VDD18, VDD18PLL ......................................................................................................................................+2.5V
Maximum VDD33, VDDA33 ..........................................................................................................................................+4.6V
* Stresses above the specified parameters could cause permanent damage to the device. This is a stress rating only
and functional operation of the device at any other condition above those indicated in the operation sections of this
specification is not implied.
Note 6-1
When powering this device from laboratory or system power supplies, it is important that the Absolute
Maximum Ratings not be exceeded or device failure can result. Some power supplies exhibit voltage
spikes on their outputs when the AC power is switched on or off. In addition, voltage transients on
the AC power line may appear on the DC output. When this possibility exists, it is suggested that a
clamp circuit be used.
Note 6-2
When internal power FET operation of these pins is enabled, these pins may be simultaneously
shorted to ground or any voltage up to 3.63V indefinitely, without damage to the device as long as
VDD33 and VDDA33 are less than 3.63V and TA is less than 70°C.
6.2
DC Electrical Characteristics
(TA = 0°C - 70°C, VDD33, VDDA33 = +3.3 V ± 0.3 V, VDD18, VDD18PLL = +1.8 V ± 10%,)
Parameter
Symbol
MIN
TYP
MAX
Units
0.8
V
Comments
I,IPU & IPD Type Input Buffer
Low Input Level
VILI
High Input Level
VIHI
Pull Down
PD
72
A
Pull Up
PU
58
A
2.0
TTL Levels
V
IS Type Input Buffer
Low Input Level
VILI
High Input Level
VIHI
Hysteresis
0.8
2.0
VHYSI
V
TTL Levels
V
500
mV
ICLK Input Buffer
Low Input Level
VILCK
High Input Level
VIHCK
DS00002252A-page 18
0.4
2.2
V
V
2005-2016 Microchip Technology Inc.
USB2229/USB2230
Parameter
Symbol
MIN
Low Input Leakage
IIL
High Input Leakage
IIH
TYP
MAX
Units
Comments
-10
+10
A
VIN = 0
-10
+10
mA
VIN = VDD33
0.4
V
IOL = 8 mA @ VDD33=
3.3V
V
IOH = -8mA @ VDD33=
3.3V
A
VIN = 0 to VDD33
(Note 6-3)
Input Leakage
(All I and IS buffers)
O8. O8PU & 08PD Type Buffer
Low Output Level
VOL
High Output Level
VOH
VDD33
- 0.4
IOL
-10
Output Leakage
+10
Pull Down
PD
72
A
PU
58
A
Pull Up
I/O8, I/O8PU & I/O8PD Type
Buffer
0.4
V
IOL = 8 mA @ VDD33=
3.3V
V
IOH = -8 mA @ VDD33=
3.3V
µA
VIN = 0 to VDD33
(Note 6-3)
Low Output Level
VOL
High Output Level
VOH
VDD33 –
0.4
Output Leakage
IOL
-10
Pull Down
PD
72
µA
Pull Up
PU
58
µA
+10
IO-U
(Note 6-4)
2005-2016 Microchip Technology Inc.
DS00002252A-page 19
USB2229/USB2230
Parameter
Symbol
MIN
Output Current
IOUT
100
Short Circuit Current Limit
ISC
On Resistance
Output Voltage Rise Time
TYP
MAX
Units
Comments
Integrated Power FET for
GPIO8 & GPIO10
mA
GPIO8 or 10;
VdropFET = 0.23V
140
mA
GPIO8 or 10; VoutFET
= 0V
RDSON
2.1
GPIO8 or 10;
IFET = 70mA
tDSON
800
s
GPIO8 or 10;
CLOAD = 10F
mA
GPIO11;
VdropFET = 0.46V
Integrated Power FET for
GPIO11)
Output Current
IOUT
Short Circuit Current Limit
ISC
181
mA
GPIO11;
VoutFET = 0V
On Resistance
RDSON
2.1
GPIO11;
IFET = 70mA
Output Voltage Rise Time
tDSON
800
s
GPIO11;
CLOAD = 10F
Supply Current Unconfigured
ICCINIT
45
60
mA
@ VDD18, VDD18PLL =
1.8V
10
20
mA
@ VDD33, VDDA33 =
3.3V
35
60
mA
@ VDD18, VDD18PLL =
1.8V
15
30
mA
@ VDD33, VDDA33 =
3.3V
45
70
mA
@ VDD18, VDD18PLL =
1.8V
15
30
mA
@ VDD33, VDDA33 =
3.3V
160
180
µA
@ VDD18, VDD18PLL =
1.8V
215
240
µA
@ VDD33, VDDA33 =
3.3V
Supply Current Active
(Full Speed)
Supply Current Active
(High Speed)
Supply Current Standby
ICC
ICC
ICSBY
200
Note 6-3
Output leakage is measured with the current pins in high impedance.
Note 6-4
See Appendix A for USB DC electrical characteristics.
Note 6-5
The Maximum power dissipation parameters of the package should not be exceeded.
Note 6-6
The assignment of each Integrated Card Power FET to a designated Card Connector is controlled
by both firmware and the specific board implementation. Firmware will default to the settings listed in
Table 8-1, “GPIO Usage (ROM Rev -11),” on page 23.
DS00002252A-page 20
2005-2016 Microchip Technology Inc.
USB2229/USB2230
6.3
Capacitance
TA = 25°C; fc = 1MHz; VDD18, VDD18PLL = 1.8V
Limits
Parameter
Symbol
MIN
TYP
MAX
Units
Test Condition
All pins except USB pins (and
pins under test tied to AC
ground)
Clock Input Capacitance
CIN
20
pF
Input Capacitance
CIN
10
pF
COUT
20
pF
Output Capacitance
2005-2016 Microchip Technology Inc.
DS00002252A-page 21
USB2229/USB2230
7.0
PACKAGE INFORMATION
USB2229/USB2230 128-PIN TQFP PACKAGE, 14X14X1.0MM BODY, 0.4MM
PITCH
Note: For the most current package drawings,
see the Microchip Packaging Specification at
http://www.microchip.com/packaging
FIGURE 7-1:
DS00002252A-page 22
2005-2016 Microchip Technology Inc.
USB2229/USB2230
8.0
GPIO USAGE
TABLE 8-1:
GPIO USAGE (ROM REV -11)
Name
Active Level
Symbol
Description and Note
GPIO1
H
Flash Media Activity LED/
xD_Door
Indicates media activity. Media or USB
cable must not be removed with LED lit.
Also may be used for xD Door
functionality
GPIO2
H
EE_CS
Serial EE PROM chip select
GPIO3
H
V_BUS
USB V bus detect
GPIO4
H
EE_DIN/EE_DOUT/xDID
Serial EE PROM input/output and xD
Identify
GPIO5
L
HS_IND/SD_CD
HS Indicator LED or SD Card Detect
Switch input
GPIO6
H
A16/ROMEN
A16 address line connect for DFU or
debug LED indicator optional.
GPIO7
H
EE_CLK/
UNCONF_LED
Serial EE PROM clock output or
Unconfigured LED.
GPIO8
L
MS_PWR_CTRL/
CRD_PWR0
Memory Stick Card Power Control, or
Internal Power FET0.
GPIO9
L
CF_PWR_CTRL
CompactFlash Card Power Control
GPIO10
L
SM_PWR_CTRL/
CRD_PWR1
SmartMedia Card Power Control, or
Internal Power FET1.
GPIO11
L
SD/MMC_PWR_CTRL/
CRD_PWR2
SD/MMC Card Power Control, or Internal
Power FET2.
GPIO12
H
MS_ACT_IND/
Media Activity
Memory Stick Activity Indicator, or Media
Activity LED.
2005-2016 Microchip Technology Inc.
DS00002252A-page 23
USB2229/USB2230
APPENDIX A:
TABLE A-1:
DATA SHEET REVISION HISTORY
REVISION HISTORY
Revision
DS00002252A (07-28-16)
DS00002252A-page 24
Section/Figure/Entry
Correction
Replaces previous SMSC version Rev. 1.4 (09-14-07)
2005-2016 Microchip Technology Inc.
USB2229/USB2230
THE MICROCHIP WEB SITE
Microchip provides online support via our WWW site at www.microchip.com. This web site is used as a means to make
files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information:
• Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s
guides and hardware support documents, latest software releases and archived software
• General Technical Support – Frequently Asked Questions (FAQ), technical support requests, online discussion
groups, Microchip consultant program member listing
• Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives
CUSTOMER CHANGE NOTIFICATION SERVICE
Microchip’s customer notification service helps keep customers current on Microchip products. Subscribers will receive
e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or
development tool of interest.
To register, access the Microchip web site at www.microchip.com. Under “Support”, click on “Customer Change Notification” and follow the registration instructions.
CUSTOMER SUPPORT
Users of Microchip products can receive assistance through several channels:
•
•
•
•
Distributor or Representative
Local Sales Office
Field Application Engineer (FAE)
Technical Support
Customers should contact their distributor, representative or field application engineer (FAE) for support. Local sales
offices are also available to help customers. A listing of sales offices and locations is included in the back of this document.
Technical support is available through the web site at: http://www.microchip.com/support
2005-2016 Microchip Technology Inc.
DS00002252A-page 25
USB2229/USB2230
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
[X]
-
Temperature
Range
XXX
Package
-
[X]
Internal Microchip
Code
Device:
USB2229, USB2230
Temperature Range:
Blank
= 0C to +70C
Package:
NU
= 128-pin TQFP
DS00002252A-page 26
Examples:
a)
b)
USB2229-NU-02
128-pin TQFP RoHS Compliant package, Commercial Temp, Tray
USB2230-NU-02
128-pin TQFP RoHS Compliant package, Commercial Temp, Tray
2005-2016 Microchip Technology Inc.
USB2229/USB2230
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold
harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or
otherwise, under any Microchip intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer,
LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST
Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch,
Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial
Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless
DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their respective companies.
© 2005-2016, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 9781522408284
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
2005-2016 Microchip Technology Inc.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
DS00002252A-page 27
Worldwide Sales and Service
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06/23/16
DS00002252A-page 28
2005-2016 Microchip Technology Inc.