USB2250/50i/51/51i
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
General Description
The Microchip USB2250/50i/51/51i is a USB 2.0 compliant, Hi-Speed mass storage class peripheral controller intended for reading and writing to more than 24
popular flash media formats from the CompactFlash®
(CF), SmartMediaTM (SM), xD-Picture CardTM (xD)1,
Memory Stick® (MS), Secure Digital (SD), and MultiMediaCardTM (MMC) families.
The USB2250/50i/51/51i is a fully integrated, single
chip solution capable of ultra high performance operation. Average sustained transfer rates exceeding 35
MB/s are possible if the media and host can support
those rates.
Highlights
• 128-pin VTQFP (14x14 mm) RoHS compliant
package
• Targeted for applications in which single or
"combo" media sockets are used
• Supports multiple simultaneous card insertions
• Flexible assignment of number of LUNs and how
card types are associated with the LUNs
• Hardware-controlled data flow architecture for all
self-mapped media
• Pipelined hardware support for access to nonself-mapped media
• Order number with “i” denotes the version that
supports the industrial temperature range of -40ºC
to 85ºC
Hardware Features
• Single chip flash media controller with non-multiplexed interface for independent card sockets
• Flash Media Specification Revision Compliance
- CompactFlash 4.1
- Secure Digital 2.0
- MultiMediaCard 4.2
• MMC Streaming Mode support
- Memory Stick 1.43
- Memory Stick Pro Format 1.02
- Memory Stick Duo Format 1.10
- Memory Stick Pro-HG Duo Format 1.01
- xD-Picture Card 1.2
- SmartMedia 1.3
1.) xD-Picture Card not applicable to USB2251.
2009 - 2015 Microchip Technology Inc.
• Extended configuration options
- xD player mode operation
- Socket switch polarities, etc.
• Media Activity LED
• On board 24 MHz crystal driver circuit
• Optional external 24 MHz clock input
- 4 Independent internal card power FETs
- 200 mA each
- "Fold-back" short circuit protection
• 8051 8-bit microprocessor
- 60 MHz - single cycle execution
- 64 KB ROM | 14 KB RAM
• Internal regulator for 1.8 V core operation
• Optimized pinout improves signal routing which
eases implementation for improved signal integrity
OEM Selectable
• Vendor, product, and language IDs
• Manufacturer ID and product strings (28 character)
• Serial number string (12h digit max)
• Customizable vendor specific data by optional
use of external serial EEPROM
• Bus- or self-powered selection
• LED blink interval or duration
• Internal power FET configuration
Software Features
• Optimized for low latency interrupt handling
• Reduced memory footprint
• Device Firmware Upgrade (DFU) support of external EEPROM or External Flash
- Assembly line support
- End user field upgrade support
- DFU Package consists of driver, firmware,
sample DFU application and source code,
DFU driver API
• Optional custom firmware with up to 128 KB
external ROM
Applications
•
•
•
•
•
•
Flash Media Card Reader/Writer
Printers
Desktop and Mobile PCs
Consumer A/V
Media Players/Viewers
Vista ReadyBoostTM
DS00002005A-page 1
USB2250/50i/51/51i
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at docerrors@microchip.com. We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.
Customer Notification System
Register on our web site at www.microchip.com to receive the most current information on all of our products.
DS00002005A-page 2
2009 - 2015 Microchip Technology Inc.
USB2250/50i/51/51i
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 Pin Configuration ............................................................................................................................................................................ 6
3.0 Block Diagram ................................................................................................................................................................................. 7
4.0 Pin Table ......................................................................................................................................................................................... 8
5.0 Pin Descriptions ............................................................................................................................................................................ 10
6.0 Pin Reset State Table ................................................................................................................................................................... 17
7.0 Configuration Options ................................................................................................................................................................... 21
8.0 AC Specifications .......................................................................................................................................................................... 32
9.0 DC Parameters ............................................................................................................................................................................. 34
10.0 Package Outline .......................................................................................................................................................................... 38
Appendix A: Data Sheet Revision History ........................................................................................................................................... 39
Product Identification System ............................................................................................................................................................. 40
The Microchip Web Site ...................................................................................................................................................................... 41
Customer Change Notification Service ............................................................................................................................................... 41
Customer Support ............................................................................................................................................................................... 41
2009 - 2015 Microchip Technology Inc.
DS00002005A-page 3
USB2250/50i/51/51i
1.0
INTRODUCTION
The Microchip USB2250/50i/51/51i is a flash media card reader solution fully compliant with the USB 2.0 specification.
All required resistors on the USB ports are integrated into the device. This includes all series termination resistors on
D+ and D– pins and all required pull-down and pull-up resistors. The over-current sense inputs for the downstream facing ports have internal pull-up resistors.
Hardware Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Single chip flash media controller
USB2250/USB2251 supports the commercial temperature range of 0°C to +70°C
USB2250i/USB2251i supports the industrial temperature range of -40°C to +85°C
8051 8-bit microprocessor
- 60 MHz - single cycle execution
- 64 KB ROM |14 KB RAM
Integrated regulator for 1.8 V core operation
Flash Media Card Specification Revision Compliance
Compact Flash 4.1
- CF UDMA Modes 0-4
- CF PIO Modes 0-6
Secure Digital 2.0
- HS-SD and HC-SD
- TransFlash™ and reduced form factor media
MultiMediaCard 4.2
- 1/4/8 bit MMC
Memory Stick 1.43
Memory Stick Pro Format 1.02
Memory Stick Pro-HG Duo Format 1.01
- Memory Stick, MS Duo, HS-MS, MS Pro-HG, MS Pro
Memory Stick Duo 1.10
Smart Media 1.3
xD-Picture Card 1.2
Software Features
• If the OEM is using an external EEPROM, the following features are available:
- Customizable vendor, product, and device ID’s
- 12-hex digits maximum for the serial number string
- 28-character manufacturer ID and product strings for the flash media reader/writer
2009 - 2015 Microchip Technology Inc.
DS00002005A-page 4
USB2250/50i/51/51i
1.1
Acronyms
ATA:
Advanced Technology Attachment
CFC:
Compact Flash Controller
FET:
Field Effect Transistor
LUN:
Logical Unit Number
MMC:
MultiMediaCard
MSC:
Memory Stick Controller
PLL:
Phase-Locked Loop
RoHS:
Restriction of Hazardous Substances Directive
RXD:
Received eXchange Data
SDC:
Secure Digital Controller
SIE:
Serial Interface Engine
SMC:
SmartMedia Controller
True IDE Mode: True Integrated Drive Electronics Mode
TXD:
Transmit eXchange Data
UART:
Universal Asynchronous Receiver-Transmitter
UCHAR:
Unsigned Character
UINT:
Unsigned Integer
VTQFP:
Very Thin Quad Flat Package
DS00002005A-page 5
2009 - 2015 Microchip Technology Inc.
USB2250/50i/51/51i
2.0
PIN CONFIGURATION
128-PIN VTQFP DIAGRAM
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
97
98
99
100
101
102
103
104
105
64
63
62
61
60
59
58
57
56
106
107
108
109
110
111
112
113
114
115
116
117
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
USB225X
128 VTQFP
118
119
(Top View)
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
nRESET
CF_D5
CF_D12
CF_D4
CF_D11
CF_D3
CF_nCD
SM_nCD
SM_nB/R
SM_nRE
SM_nCE
SM_CLE
SM_ALE
VSS
VDD33
VDD18
SM_nWE
SM_nWP
SM_D0
SM_D1
SM_D2
SM_D3
SM_D4
SM_D5
SM_D6
SM_D7
SM_nWPS
MD0
MD1
MD2
MD3
MD7
MA12
MA15
nMWR
MA14
SDA
REG_EN
USB+
USBVSS
SD_D1
SD_D6
SD_D0
SD_D7
CRD_PWR0
VDD33
CRD_PWR3
VSS
SD_CLK
SD_D5
SD_CMD
SD_D4
SD_D3
SD_D2
MA10
MA1 / CLK_SEL1
nMCE
MA0 / CLK_SEL0
MA16
MD6
MD5
MD4
SD_nCD
2
120
121
122
123
124
125
126
127
128
1
MS_D6
MS_INS
MS_D3
MS_D7
MS_SCLK
VSS
TEST
VDD33
SD_WP
MA7
MA13
MA6
MA8
MA5
MA9
MA4
MA11
MA3
nMRD
MA2
CF_DMARQ / RXD
SCL / xD_ID
CF_DMACK
LED
VBUS_DET
VSS
XTAL2
XTAL1 (CLKIN)
VDD18PLL
VSS
RBIAS
VDD33
95
96
MS_D2
MS_D4
MS_D0 / MS_SDIO
MS_D5
MS_D1
MS_BS
CF_D10
CF_D9
CF_D2
CF_D8
CF_D1
CF_D0
CF_SA0
CF_SA1
CF_SA2
VSS
CF_IORDY
CF_nRESET
CRD_PWR1
VDD33
CRD_PWR2
VSS
CF_IRQ
CF_nIOW
CF_nIOR
CF_nCS0
CF_D15
CF_D7
CF_D14
CF_D6
CF_D13
VDD33
FIGURE 2-1:
2009 - 2015 Microchip Technology Inc.
DS00002005A-page 6
USB2250/50i/51/51i
3.0
BLOCK DIAGRAM
FIGURE 3-1:
USB2250/50I/51/51I BLOCK DIAGRAM
USB2250 / USB2251
SD/
MMC
AUTO_CBW
PROC
CF/
USB
Host
SIE
CTL
PHY
BUS
INTFC
BUS FMDU
INTFC CTL
GPIO (16)
FMI
MS
SM
3.3 V
EP0 TX
EP0 RX
1.8 V Reg
BUS
INTFC
VDD18
RAM
4K
total
EP1 RX
EP1 TX
EP2 RX
EP2 TX
24 MHz
Crystal
PLL
XDATA BRIDGE
+ BUS ARBITER
VDD18PLL
3.3 V
PWR_FET0
PWR_FET1
PWR_FET2
PWR_FET3
1.8 V Reg
CRD_PWR0
CRD_PWR1
CRD_PWR2
CRD_PWR3
GPIOs
RAM
10 KB
ROM
64 KB
ADDR
MAP
Program Memory I/O Bus
Clock
Generation and
Control
8051
PROCESSOR
2009 - 2015 Microchip Technology Inc.
SFR
RAM
DS00002005A-page 7
USB2250/50i/51/51i
4.0
PIN TABLE
4.1
128-Pin Package
TABLE 4-1:
128-PIN VTQFP PACKAGE
COMPACT FLASH INTERFACE (28 PINS)
CF_D0
CF_D1
CF_D2
CF_D3
CF_D4
CF_D5
CF_D6
CF_D7
CF_D8
CF_D9
CF_D10
CF_D11
CF_D12
CF_D13
CF_D14
CF_D15
CF_nIOR
CF_nIOW
CF_IRQ
CF_nRESET
CF_IORDY
CF_nCS0
CF_DMACK
CF_SA0
CF_SA1
CF_SA2
CF_nCD
CF_DMARQ
SMARTMEDIA INTERFACE (17 PINS)
SM_D0
SM_D1
SM_D2
SM_D3
SM_D4
SM_D5
SM_D6
SM_D7
SM_ALE
SM_CLE
SM_nRE
SM_nWE
SM_nWP
SM_nB/R
SM_nCE
SM_nCD
SM_nWPS
MEMORY STICK INTERFACE (11 PINS)
MS_BS
MS_D0 / MS_SDIO
MS_SCLK
MS_INS
MS_D1
MS_D2
MS_D3
MS_D4
MS_D5
MS_D6
MS_D7
SECURE DIGITAL / MULTIMEDIACARD INTERFACE (12 PINS)
SD_CMD
SD_CLK
SD_D0
SD_D1
SD_D2
SD_D3
SD_WP
SD_nCD
SD_D4
SD_D5
SD_D6
SD_D7
USB INTERFACE (6 PINS)
USB+
USB-
RBIAS
XTAL2
XTAL1 (CLKIN)
REG_EN
2009 - 2015 Microchip Technology Inc.
DS00002005A-page 8
USB2250/50i/51/51i
TABLE 4-1:
128-PIN VTQFP PACKAGE (CONTINUED)
MEMORY/IO INTERFACE (28 PINS)
MA0 / CLK_SEL0
MA1 / CLK_SEL1
MA2
MA3
MA4
MA5
MA6
MA7
MA8
MA9
MA10
MA11
MA12
MA13
MA14
MA15
MA16
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
nMRD
nMWR
nMCE
MISC (10 PINS)
nRESET
VBUS_DET
SCL / xD_ID
SDA
LED
CRD_PWR0
CRD_PWR1
CRD_PWR2
CRD_PWR3
TEST
DIGITAL, POWER (16 PINS)
(6) VDD33
(8) VSS
VDD18
VDD18PLL
TOTAL 128
DS00002005A-page 9
2009 - 2015 Microchip Technology Inc.
USB2250/50i/51/51i
5.0
PIN DESCRIPTIONS
This section provides a detailed description of each signal. The signals are arranged in functional groups according to
their associated interface. The pin descriptions are applied when using the internal default firmware and can be referenced in Section 7.0, "Configuration Options," on page 21. Please reference Section 1.1, "Acronyms," on page 5 for a
list of the acronyms used.
The “n” symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage
level. When “n” is not present in the signal name, the signal is asserted at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of
“active low” and “active high” signals. The term assert, or assertion, indicates that a signal is active, independent of
whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is inactive.
5.1
128-Pin VTQFP Pin Descriptions
TABLE 5-1:
USB2250/50I/51/51I 128-PIN VTQFP PIN DESCRIPTIONS
Name
Symbol
128-Pin
VTQFP
Buffer
Type
Description
COMPACT FLASH (CF) INTERFACE
CF Chip Select 0
CF_nCS0
71
O12PU
This pin is the active low chip select 0 signal for
the task file registers of the CF ATA device in
True IDE mode. This pin has a weak internal
pull-up resistor.
CF Register
Address
CF_SA[2:0]
82
83
84
I/O12
These pins are the register select address bits
for the CF ATA device.
CF Interrupt
CF_IRQ
74
IPD
This is the active high interrupt request signal
from the CF device. This pin has a weak internal
pull-down resistor.
CF_D[15:8] /
70
68
66
62
60
90
89
87
I/O12PD
CF_D[15:8]: These pins are the bi-directional
data signals CF_D15 - CF_D8 in True IDE mode
data transfer.
69
67
63
61
59
88
86
85
I/O12PD
CF Data 15-8
CF Data 7-0
CF_D[7:0]
In True IDE mode, all task file register
operations occur on CF_D[7:0], while data
transfer occurs on CF_D[15:0].
These bi-directional data signals have weak
internal pull-down resistors.
CF_D[7:0]: These pins are the bi-directional
data signals CF_D7 - CF_D0 in True IDE mode
data transfer. In True IDE mode, all of the task
file register operations occur on CF_D[7:0],
while data transfer occurs on CF_D[15:0].
These bi-directional data signals have weak
internal pull-down resistors.
IO Ready
CF_IORDY
80
IPU
CF Card
Detection1
CF_nCD
58
I/O12
Designates as the Compact Flash card
detection pin.
CF Hardware
Reset
CF_RESET_N
79
O12
This pin is an active low hardware reset signal
to the CF device.
CF IO Read
CF_nIOR
72
O12
This pin is an active low read strobe signal for
the CF device.
CF IO Write
Strobe
CF_nIOW
73
O12
This pin is an active low write strobe signal for
the CF device.
2009 - 2015 Microchip Technology Inc.
This pin is the active high input signal for
IORDY. This pin has a weak internal pull-up
resistor.
DS00002005A-page 10
USB2250/50i/51/51i
TABLE 5-1:
USB2250/50I/51/51I 128-PIN VTQFP PIN DESCRIPTIONS (CONTINUED)
Name
CF DMA request
Symbol
128-Pin
VTQFP
Buffer
Type
CF_DMARQ /
117
I
CF_DMACK
CF_DMARQ: This pin is the DMA request from
the device to the CF controller.
RXD: The signal can be used as input to the
RXD of UART in the device. Custom firmware is
required to activate this function.
RXD
CF DMA
acknowledge
Description
119
O12
CF_nDMACK: This pin is an active low DMA
acknowledge signal for the CF device.
SMARTMEDIA (SM) INTERFACE
SM Write Protect
SM_nWP
47
O12PD
This pin is an active low write protect signal for
the SM device and has a weak pull-down
resistor that is permanently enabled.
SM Address
Strobe
SM_ALE
52
O12PD
This pin is an active high Address Latch Enable
signal for the SM device and has a weak pulldown resistor that is permanently enabled.
SM Command
Strobe
SM_CLE
53
O12PD
This pin is an active high Command Latch
Enable signal for the SM device and has a weak
pull-down resistor that is permanently enabled.
SM_D[7:0]
39
40
41
42
43
44
45
46
I/O12PD
These pins are the bi-directional data signals
SM_D7-SM_D0 and have weak internal pulldown resistors.
SM_nRE
55
O12PU
This pin is an active low read strobe signal for
the SM device.
SM Data 7-0
SM Read Enable
When using the internal FET, this pin has a
weak internal pull-up resistor that is tied to the
output of the internal power FET.
If an external FET is used (internal FET is
disabled), then the internal pull-up is not
available (external pull-ups must be used).
SM Write Enable
SM_nWE
48
O12PU
This pin is an active low write strobe signal for
the SM device.
When using the internal FET, this pin has a
weak internal pull-up resistor that is tied to the
output of the internal power FET.
If an external FET is used (internal FET is
disabled), then the internal pull-up is not
available (external pull-ups must be used).
SM Write Protect
Switch
SM_nWPS
38
IPU
A write-protect seal is detected when this pin is
low. This pin has a weak internal pull-up resistor.
SM Busy or Data
Ready
SM_nB/R
56
IPU
This pin is connected to the BSY/RDY pin of the
SM device.
When using the internal FET, this pin has a
weak internal pull-up resistor that is tied to the
output of the internal power FET.
If an external FET is used (internal FET is
disabled), then the internal pull-up is not
available (external pull-ups must be used).
DS00002005A-page 11
2009 - 2015 Microchip Technology Inc.
USB2250/50i/51/51i
TABLE 5-1:
USB2250/50I/51/51I 128-PIN VTQFP PIN DESCRIPTIONS (CONTINUED)
Name
SM Chip Enable
Symbol
128-Pin
VTQFP
Buffer
Type
Description
SM_nCE
54
O12PU
This pin is the active low chip enable signal to
the SM device.
When using the internal FET, this pin has a
weak internal pull-up resistor that is tied to the
output of the internal power FET.
If an external FET is used (internal FET is
disabled), then the internal pull-up is not
available (external pull-ups must be used).
SM Card
Detection
SM_nCD
57
I/O12
Designates as the Smart Media card detection
pin.
MEMORY STICK (MS) INTERFACE
MS Bus State
MS_BS
91
O12
This pin is connected to the bus state pin of the
MS device.
It is used to control the bus states 0, 1, 2 and 3
(BS0, BS1, BS2 and BS3) of the MS device.
MS Card Insertion
MS_INS
98
IPU
Designates as the Memory Stick card detection
pin.
MS System CLK
MS_SCLK
101
O12
This pin is an output clock signal to the MS
device. The clock frequency is software
configurable.
MS System Data
In/Out
MS_D[7:1]
100
97
93
95
99
96
92
I/O12PD
MS_D[7:1]: These pins are the bi-directional
data signals for the MS device.
MS_D2 and MS_D3 have weak pull-down
resistors. MS_D1 has a pull-down resistor if it is
in parallel mode, otherwise it is disabled.
In 4- or 8-bit parallel mode, each MS_D7:1
signal has a weak pull-down resistor.
MS System Data
In/Out
MS_D0 /
94
I/O12PD
MS_D0: This pin is one of the bi-directional data
signals for the MS device.
In serial mode, the most significant bit (MSB) of
each byte is transmitted first by either MSC or
the MS device on MS_D0, MS_D2, and MS_D3
(which have weak pull-down resistors). If
MS_D1 is in parallel mode, it has a pull-down
resistor; Otherwise, it is disabled.
In 4- or 8-bit parallel mode, the MS_D0 signal
has a weak pull-down resistor.
SECURE DIGITAL (SD) / MULTIMEDIACARD (MMC) INTERFACE
SD Data 7-0
SD Clock
SD_D[7:0]
13
11
19
21
22
23
10
12
I/O12PU
SD_CLK
18
O12
These pins are bi-directional data signals
SD_D0 - SD_D7 and have weak pull-up
resistors.
This is an output clock signal to the SD/MMC
device.
The clock frequency is software configurable.
2009 - 2015 Microchip Technology Inc.
DS00002005A-page 12
USB2250/50i/51/51i
TABLE 5-1:
USB2250/50I/51/51I 128-PIN VTQFP PIN DESCRIPTIONS (CONTINUED)
Symbol
128-Pin
VTQFP
Buffer
Type
SD_CMD
20
I/O12PU
SD Write
Protected
SD_WP
105
I/O12
Designates as the Secure Digital card
mechanical write detect pin.
SD Card Detect
SD_nCD
32
I/O12
Designates as the Secure Digital card detection
pin.
Name
SD Command
Description
This is a bi-directional signal that connects to
the CMD signal of the SD/MMC device and has
a weak internal pull-up resistor.
USB INTERFACE
USB Bus Data
USB+
USB-
7
8
I/O-U
USB Transceiver
Bias
RBIAS
127
I-R
A 12.0 k, ±1.0% resistor is attached from VSS
to this pin in order to set the transceiver's
internal bias currents.
XTAL1
(CLKIN)
124
ICLKx
This pin can be connected to one terminal of the
crystal or it can be connected to an external
24/48 MHz clock when a crystal is not used.
24 MHz Crystal
Input (External
Clock Input)
These pins connect to the USB bus data
signals.
The MA[1:0] pins will be sampled while
RESET_N is asserted, and the value will be
latched upon RESET_N negation. This will
determine the clock source and value.
24 MHz Crystal
Output
XTAL2
123
OCLKx
This is the other terminal of the crystal, or it is
left open when an external clock source is used
to drive XTAL1(CLKIN). It may not be used to
drive any external circuitry other than the crystal
circuit.
MEMORY / IO INTERFACE
Memory
Data Bus
DS00002005A-page 13
MD[7:0]
33
29
30
31
34
35
36
37
I/O12PU
These signals are used to transfer data between
the internal CPU and the external program
memory and have weak internal pull-up
resistors.
2009 - 2015 Microchip Technology Inc.
USB2250/50i/51/51i
TABLE 5-1:
Name
Memory
Address Bus
USB2250/50I/51/51I 128-PIN VTQFP PIN DESCRIPTIONS (CONTINUED)
Symbol
128-Pin
VTQFP
Buffer
Type
MA16
28
O12
These signals address memory locations within
the external memory.
MA[15:2]
2
4
107
1
113
24
111
109
106
108
110
112
114
116
O12
These signals address memory locations within
the external memory.
MA[1:0] /
25
O12
MA[1:0]: These signals address memory
locations within the external memory.
CLK_
SEL[1:0]
27
I/O12PD
Description
CLK_SEL[1:0]: During RESET_N assertion,
these pins will select the operating frequency of
the external clock, and the corresponding weak
pull-down resistors are enabled.
When RESET_N is negated, the value on these
pins will be latched internally and these pins will
revert to MA[1:0] functionality; the internal pulldowns will be disabled.
CLK_SEL[1:0]
CLK_SEL[1:0]
CLK_SEL[1:0]
CLK_SEL[1:0]
=
=
=
=
'00'. 24 MHz
'01'. RESERVED
'10'. RESERVED
'11'. 48 MHz
If the latched value is '1', the corresponding MA
pin is tri-stated when the chip is in power down
state.
If the latched value is '0', the corresponding MA
pin will function identically to MA[15:3] pins at all
times (other than during RESET_N assertion).
Memory Write
Strobe
nMWR
3
O12
This pin is the active low program Memory Write
strobe signal.
Memory Read
Strobe
nMRD
115
O12
This pin is the active low program Memory Read
strobe signal.
Memory Chip
Enable
nMCE
26
O12
This pin is the active low program Memory Chip
Enable strobe signal.
This signal is asserted when any external
access is being done by the processor.
This signal is held to the logic 'high' while
RESET_N is asserted.
2009 - 2015 Microchip Technology Inc.
DS00002005A-page 14
USB2250/50i/51/51i
TABLE 5-1:
USB2250/50I/51/51I 128-PIN VTQFP PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
128-Pin
VTQFP
Buffer
Type
LED
120
I/O12
LED: It can be used as an LED output.
VBUS_DET
121
I/O12
VBUS is a 3.3 volt input. A resistor divider must
be used if connecting to 5 volts of USB power.
SCL /
118
O12
SCL: This is the clock output when used with an
external EEPROM.
I/O12
xD_ID: This is the xD-Picture Card detection pin
only applicable to USB2250/USB2250i.
I/O12
SDA: This is the data pin when used with an
external serial EEPROM.
I/O12
CRD_PWR: Card power drive of 3.3 V at either
100 mA or 200 mA.
Description
MISC
General Purpose
Input/Output
xD_ID
SDA
5
CRD_PWR0
14
I/O200
CRD_PWR1
78
I/O12
I/O200
CRD_PWR2
76
I/O200
CRD_PWR: Card power drive of 3.3 V at either
100 mA or 200 mA.
CRD_PWR: Card power drive of 3.3 V at either
100 mA or 200 mA.
Requirement: This must be the only FET used
to power SM devices. Failure to do this will
violate SM voltage specification on SM device
pins.
CRD_PWR3
16
I/O200
CRD_PWR: Card power drive of 3.3 V at either
100 mA or 200 mA.
Requirement: This must be the only FET used
to power SM devices. Failure to do this will
violate SM voltage specification on SM device
pins.
RESET Input
RESET_N
64
IS
TEST
103
I
Regulator Enable
REG_EN
6
IPU
1.8 V Digital Core
Power
VDD18
49
If the internal regulator is enabled, then this pin
must have a 1.0 F (or greater) ±20% (ESR
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