USB2507
Integrated USB 2.0 Compatible 7-Port Hub
Highlights
• Integrated USB 2.0 Compatible 7-Port Hub
- 7 Transaction Translators for highest performance
- High-Speed (480Mbits/s), Full-Speed
(12Mbits/s) and Low-Speed (1.5Mbits/s)
compatible
- Full power management with per port or
ganged, selectable power control
- Detects Bus-Power/Self-Power source and
changes mode automatically
• Complete USB Specification 2.0 Compatibility
- Includes USB 2.0 Transceivers
• VID/PID/DID, and Port Configuration for Hub via:
- Single Serial I2C EEPROM
- SMBus Slave Port
• Default VID/PID/DID, allows functionality when
configuration EEPROM is absent
• Hardware Strapping options allow for configuration without an external EEPROM or SMBus Host
• On-Board 24MHz Crystal Driver Circuit or 24 MHz
external clock driver
• Internal PLL for 480MHz USB 2.0 Sampling
• Internal 1.8V Linear Voltage Regulator
• Integrated USB termination and Pull-up/Pull-down
resistors
• Internal Short Circuit protection of USB differential
signal pins
• 1.8 Volt Low Power Core Operation
• 3.3 Volt I/O with 5V Input Tolerance
• 80-Pin TQFP RoHS compliant package
2007 - 2016 Microchip Technology Inc.
DS000002251A-page 1
USB2507
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The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
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DS000002251A-page 2
2007 - 2016 Microchip Technology Inc.
USB2507
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 Pin Table 7-Port .............................................................................................................................................................................. 5
3.0 Pin Configuration 7-Port Hub .......................................................................................................................................................... 6
4.0 7-Port Hub Block Diagram .............................................................................................................................................................. 7
5.0 Functional Block Description ......................................................................................................................................................... 12
6.0 XNOR Test .................................................................................................................................................................................... 30
7.0 DC Parameters ............................................................................................................................................................................. 31
8.0 AC Specifications .......................................................................................................................................................................... 35
9.0 Package Outline ............................................................................................................................................................................ 36
Appendix A: Data Sheet Revision History ........................................................................................................................................... 37
The Microchip Web Site ...................................................................................................................................................................... 38
Customer Change Notification Service ............................................................................................................................................... 38
Customer Support ............................................................................................................................................................................... 38
Product Identification System ............................................................................................................................................................. 40
2007 - 2016 Microchip Technology Inc.
DS000002251A-page 3
USB2507
1.0
INTRODUCTION
The Microchip 7-Port Hub is fully compliant with the USB 2.0 Specification and will attach to a USB host as a Full-Speed
Hub or as a Full-/High-Speed Hub. The 7-Port Hub supports Low-Speed, Full-Speed, and High-Speed (if operating as
a High-Speed Hub) downstream devices on all of the enabled downstream ports.
A dedicated Transaction Translator (TT) is available for each downstream facing port. This architecture ensures maximum USB throughput for each connected device when operating with mixed-speed peripherals.
The Hub works with an external USB power distribution switch device to control VBUS switching to downstream ports,
and to limit current and sense over-current conditions.
All required resistors on the USB ports are integrated into the Hub. This includes all series termination resistors on D+
and D– pins and all required pull-down and pull-up resistors on D+ and D– pins. The over-current sense inputs for the
downstream facing ports have internal pull-up resistors.
Throughout this document the upstream facing port of the hub will be referred to as the upstream port, and the downstream facing ports will be called the downstream ports.
1.1
OEM Selectable Features
A default configuration is available in the USB2507 following a reset. This configuration may be sufficient for some applications. Strapping option pins make it possible to modify a limited sub-set of the configuration options.
The USB2507 may also be configured by an external EEPROM or a microcontroller. When using the microcontroller
interface, the Hub appears as an SMBus slave device. If the Hub is pin-strapped for external EEPROM configuration
but no external EEPROM is present, then a value of ‘0’ will be written to all configuration data bit fields (the hub will
attach to the host with all ‘0’ values).
The 7-Port Hub supports several OEM selectable features:
• Operation as a Self-Powered USB Hub or as a Bus-Powered USB Hub.
• Operation as a Dynamic-Powered Hub (Hub operates as a Bus-Powered device if a local power source is not
available and switches to Self-Powered operation when a local power source is available).
• Optional OEM configuration via I2C EEPROM or via the industry standard SMBus interface from an external
SMBus Host.
• LED indicator support.
• Compound device support (port is permanently hardwired to a downstream USB peripheral device).
• Hardware strapping options enable configuration of the following features.
- Non-Removable Ports
- Port Power Polarity (active high or active low logic)
- Port Disable
- LED support
- MTT enable
- Ganged Vs Port power switching and over-current sensing
DS000002251A-page 4
2007 - 2016 Microchip Technology Inc.
USB2507
2.0
PIN TABLE 7-PORT
TABLE 2-1:
7-PORT PIN TABLE
UPSTREAM USB 2.0 INTERFACE (3 PINS)
USBDP0
USBDN0
VBUS_DET
7-PORT USB 2.0 INTERFACE (44 PINS)
USBDP1
USBDN1
USBDP2
USBDN2
USBDP3
USBDN3
USBDP4
USBDN4
USBDP5
USBDN5
USBDP6
USBDN6
USBDP7
USBDN7
GR1/
NON_REM0
GR2/
NON_REM1
GR3/
PRT_DIS0
GR4/
PRT_DIS1
GR5
GR6
GR7
AM1/
GANG_EN
AM2/
MTT_EN
AM3
AM5
AM6
AM7
PRTPWR1
PRTPWR2
PRTPWR3
PRTPWR5
PRTPWR6
PRTPWR7
OCS1_N
OCS2_N
OCS3_N
OCS5_N
OCS6_N
OCS7_N
PRTPWR_POL
RBIAS
AM4/
LED_EN
PRTPWR4
OCS4_N
SERIAL PORT INTERFACE (3 PINS)
SDA/SMBDATA
SCL/SMBCLK/
CFG_SEL0
CFG_SEL1
MISC (8 PINS)
XTAL1/CLKIN
XTAL2
RESET_N
SELF_PWR
ATEST/
REG_EN
CLKIN_EN
TEST1
TEST0
POWER, GROUND (22 PINS)
2007 - 2016 Microchip Technology Inc.
DS000002251A-page 5
USB2507
PIN CONFIGURATION 7-PORT HUB
VDDA33
OCS1_N
PRTPWR2
41
OCS2_N
PRTPWR3
OCS3_N
PRTPWR4
OCS4_N
PRTPWR5
VSS
VDD18
VDD33CR
OCS5_N
PRTPWR6
OCS6_N
PRTPWR7
OCS7_N
CLKIN_EN
60
PRTPWR_POL
7-PORT 80-PIN TQFP
VBUS_DET
FIGURE 3-1:
RESET_N
3.0
61
40
PRTPWR1
USBDP0
GR7
USBDN0
AM7
VSS
GR6
USBDN1
AM6
USBDP1
GR5
VDDA33
AM5
USBDP2
VDD18
USBDN2
VSS
USB2507
VSS
VDD33
VSS
GR4/PRT_DIS1
VDD18
AM4/LED_EN
VSS
GR3/PRT_DIS0
XTAL2
AM3
XTAL1/CLKIN
GR2/NON_REM1
VDDA18PLL
AM2/MTT_EN
VDDA33PLL
GR1/NON_REM0
ATEST/REG_EN
AM1/GANG_EN
RBIAS
SDA/SMBDATA
80
CFG_SEL1
SELF_PWR
TEST1
TEST0
VSS
USBDN7
USBDP7
VDDA33
USBDP6
USBDN6
VSS
USBDN5
VDDA33
USBDP5
USBDP4
VSS
USBDN4
USBDN3
USBDP3
VDDA33
DS000002251A-page 6
SCL/SMBCLK/CFG_SEL0
20
21
1
VSS
2007 - 2016 Microchip Technology Inc.
USB2507
4.0
7-PORT HUB BLOCK DIAGRAM
FIGURE 4-1:
7-PORT BLOCK DIAGRAM
Upstream Upstream 24 MHz
USB Data
VBUS
Crystal
Upstream
PHY
VBUS
Power
Detect
3.3V
To
EEPROM
Pin
1.8V Strapping or SMBus
Master
Cap Options
SD SCL
Internal
Defaults
Select
1.8V
Reg.
PLL
Controller
SIE
Repeater
TT
#1
TT
#2
Serial
Interface
...
TT
#7
Port
Controller
Routing Logic
Port #1
OC Sense
Downstream
Switch Driver
PHY #1
LED Drivers
...
Downstream OC Switch/LED
USB Data Sense Drivers
TABLE 4-1:
Port #7
OC Sense
Downstream
Switch Driver
PHY #7
LED Drivers
Downstream
USB Data
OC Switch/LED
Sense Drivers
7-PORT HUB PIN DESCRIPTIONS
Name
Symbol
Type
Function
UPSTREAM USB 2.0 INTERFACE
USB Bus Data
USBDN0
USBDP0
IO-U
These pins connect to the upstream USB bus data signals.
Detect Upstream
VBUS Power
VBUS_DET
I/O12
Detects state of Upstream VBUS power. The Microchip Hub
monitors VBUS_DET to determine when to assert the internal
D+ pull-up resistor (signaling a connect event).
When designing a detachable hub, this pin must be
connected to the VBUS power pin of the USB port that is
upstream of the hub. (Use of a weak pull-down resistor is
recommended.)
For self-powered applications with a permanently attached
host, this pin must be pulled-up to either 3.3V or 5.0V
(typically VDD33).
2007 - 2016 Microchip Technology Inc.
DS000002251A-page 7
USB2507
TABLE 4-1:
7-PORT HUB PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Type
Function
7-PORT USB 2.0 HUB INTERFACE
High-Speed USB
Data
USBDN[7:1]
USBDP[7:1]
IO-U
These pins connect to the downstream USB peripheral
devices attached to the Hub’s ports.
USB Power Enable
PRTPWR[7:1]
O12
Enables power to USB peripheral devices (downstream).
The active signal level of the PRTPWR7:1 pins is determined
by the Power Polarity Strapping function of the
PRTPWR_POL pin.
Ports [7:5] Green
LED
GR[7:5]
I/O12
Green indicator LED’s for ports[7:5]. LED is active low
Port 4:3 Green
LED
&
Port Disable
strapping option.
GR[4:3]/
PRT_DIS[1:0]
I/O12
Green indicator LED for ports 4 and 3. Will be active low
when LED support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,
these pins will be sampled at RESET_N negation to
determine if ports [7:5] will be permanently disabled. Also, the
active state of the LED’s will be determined as follows:
PRT_DIS[1:0] = ‘00’, All ports are enabled,
GR4 is active high,
GR3 is active high.
PRT_DIS[1:0] = ‘01’, Port 7 is disabled,
GR4 is active high,
GR3 is active low.
PRT_DIS[1:0] = ‘10’, Ports 7 & 6 are disabled,
GR4 is active low,
GR3 is active high.
PRT_DIS[1:0] = ‘11’, Ports 7, 6 & 5 are disabled,
GR4 is active low,
GR3 is active low.
Port [2:1] Green
LED
&
Port NonRemovable
strapping option.
GR[2:1]/
NON_REM[1:0]
I/O12
Green indicator LED for ports 2 and 1. Will be active low
when LED support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,
these pins will be sampled at RESET_N negation to
determine if ports [3:1] contain permanently attached (nonremovable) devices. Also, the active state of the LED’s will be
determined as follows:
NON_REM[1:0] = ‘00’, All ports are removable,
GR2 is active high,
GR1 is active high.
NON_REM[1:0] = ‘01’, Port 1 is non-removable,
GR2 is active high,
GR1 is active low.
NON_REM[1:0] = ‘10’, Ports 1 & 2 are non-removable,
GR2 is active low,
GR1 is active high.
NON_REM[1:0] = ‘11’, Ports 1, 2, & 3 are non-removable,
GR2 is active low,
GR1 is active low.
Ports [7:5] Amber
LED
DS000002251A-page 8
AM[7:5]
I/O12
Amber indicator LED’s for ports [7:5], LED is active low.
2007 - 2016 Microchip Technology Inc.
USB2507
TABLE 4-1:
7-PORT HUB PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Type
Function
Port 4 Amber LED
&
LED Enable
strapping option
AM4/
LED_EN
I/O12
Amber indicator LED for port 4. Will be active low when LED
support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,
this pin will be sampled at RESET_N negation to determine
if LED support is enabled or disabled. Also, the active state
of the LED will be determined as follows:
‘0’ = LED support is disabled, LED is inactive
‘1’ = LED Support is enabled, LED is active low.
Port 3 Amber LED
AM3
I/O12
Amber indicator LED for port 3. Signal will be active low.
Port 2 Amber LED
&
MTT Disable
AM2/
MTT_EN
I/O12
Amber indicator LED for port 2. Will be active low when LED
support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,
this pin will be sampled at RESET_N negation to determine
if MTT support is disabled (STT only). Also, the active state
of the LED will be determined as follows:
‘0’ = MTT support is disabled, LED is active high
‘1’ = MTT support is enabled, LED is active low.
Port 1 Amber LED
&
Gang Power
Switching and
Current Sensing
strapping option.
AM1/
GANG_EN
I/O12
Amber indicator LED for port 1, Will be active low when LED
support is enabled via EEPROM or SMBus.
If the hub is configured by the internal default configuration,
this pin will be sampled at RESET_N negation to determine
if downstream port power switching and current sensing are
ganged, or individual port-by-port. Also, the active state of the
LED will be determined as follows:
‘0’ = Port-by-port sensing & switching, LED is active high
‘1’ = Ganged sensing & switching, LED is active low.
Port Power Polarity
strapping.
PRTPWR_POL
I/O12
Port Power Polarity strapping determination for the active
signal polarity of the 7:1PRTPWR pins.
While RESET_N is asserted, the logic state of this pin will
(though the use of internal combinatorial logic) determine the
active state of the 7:1PRTPWR pins in order to ensure that
downstream port power is not inadvertently enabled to
inactive ports during a hardware reset.
On the rising edge of RESET_N (see the applicable
RESET_N timing table in Section 5.6.1), the logic value will
be latched internally, and will retain the active signal polarity
for the PRTPWR7:1 pin.
‘1’ = PRTPWR7:1 pins have an active ‘high’ polarity
‘0’ = PRTPWR7:1 pins have an active ‘low’ polarity
Over Current
Sense
OCS7:1_N
IPU
Input from external current monitor indicating an over-current
condition. {Note: Contains internal pull-up to 3.3V supply}
USB Transceiver
Bias
RBIAS
I-R
A 12.0k (resistor is attached from ground to this pin
to set the transceiver’s internal bias settings.
2007 - 2016 Microchip Technology Inc.
DS000002251A-page 9
USB2507
TABLE 4-1:
7-PORT HUB PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Type
Function
SERIAL PORT INTERFACE
Serial Data/SMB
Data
SDA/SMBDATA
IOSD12
(Serial Data)/(SMB Data) signal.
Serial Clock/SMB
Clock
&
Config Select 0
SCL/SMBCLK/
CFG_SEL0
IOSD12
(Serial Clock)/(SMB Clock) signal. This multifunction pin is
read on the rising edge of RESET_N (see the applicable
RESET_N timing table in Section 5.6.1) and will determine
the hub configuration method as described in Table 4-2.
Configuration
Programming
Select
CFG_SEL1
I
TABLE 4-2:
TABLE 4-3:
This multifunction pin is read on the rising edge of RESET_N
(see the applicable RESET_N timing table in Section 5.6.1)
and will determine the hub configuration method as described
in Table 4-2.
SMBUS OR EEPROM INTERFACE BEHAVIOR
CFG_SEL1
CFG_SEL0
SMBus or EEPROM Interface Behavior
0
0
Reserved
0
1
Configured as an SMBus slave for external download of userdefined descriptors. SMBus slave address is 0101100
1
0
Internal Default Configuration via strapping options.
1
1
2-wire (I2C) EEPROMS are supported,
MISCELLANEOUS PINS
Name
Symbol
Type
Function
Crystal
Input/External
Clock Input
XTAL1/
CLKIN
ICLKx
24MHz crystal or external clock input.
This pin connects to either one terminal of the crystal or to
an external 24MHz clock when a crystal is not used.
Crystal Output
XTAL2
OCLKx
24MHz Crystal
This is the other terminal of the crystal, or left unconnected
when an external clock source is used to drive
XTAL1/CLKIN. It must not be used to drive any external
circuitry other than the crystal circuit.
Clock Input
Enable
CLKIN_EN
I
RESET Input
RESET_N
IS
This active low signal is used by the system to reset the
chip. The minimum active low pulse is 1us.
Self-Power /
Bus-Power
Detect
SELF_PWR
I
Detects availability of local self-power source.
Low = Self/local power source is NOT available (i.e., Hub
gets all power from Upstream USB VBus).
High = Self/local power source is available.
TEST Pins
TEST[1:0]
IPD
Used for testing the chip. User must treat as a no-connect
or connect to ground.
Analog Test
&
Internal 1.8V
voltage regulator
enable
ATEST/
REG_EN
AIO
This signal is used for testing the analog section of the
chip, and to enable or disable the internal 1.8v regulator.
Clock In Enable:
Low = XTAL1 and XTAL2 pins configured for use with
external crystal
High = XTAL1 pin configured as CLKIN, and must be
driven by an external CMOS clock.
This pin must be connected to VDDA33 to enable the
internal 1.8V regulator, or to VSS to disable the internal
regulator.
When the internal regulator is enabled, the 1.8V power
pins must be left unconnected, except for the required
bypass capacitors.When the PHY is in test mode, the
internal regulator is disabled and the ATEST pin functions
as a test pin.
DS000002251A-page 10
2007 - 2016 Microchip Technology Inc.
USB2507
TABLE 4-4:
POWER, GROUND, AND NO CONNECT
Name
Symbol
VDDCORE3P3
VDD33CR
Type
Function
+3.3V I/O Power.
If the internal core 1.8V regulator is enabled, then this pin
acts as the regulator input
VDD1P8
VDD18
+1.8V core power.
If the internal regulator is enabled, then VDD18 pin 50
must have a 4.7F (or greater) ±20% (ESR
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