USB2533
USB 2.0 Hi-Speed 3-Port Hub Controller
Highlights
Additional Features
• Hub Controller IC with 3 downstream ports
• USB-IF Battery Charger revision 1.2 support on
up & downstream ports (DCP, CDP, SDP)
• Battery charging support for Apple devices
• FlexConnect: Downstream port 1 able to swap
with upstream port, allowing master capable
devices to control other devices on the hub
• USB to I2C bridge endpoint support
• USB Link Power Management (LPM) support
• SUSPEND pin for remote wakeup indication to
host
• Vendor Specific Messaging (VSM) support
• Enhanced OEM configuration options available
through a single serial I2C EEPROM, OTP, or
SMBus Slave Port
• 36-pin (6x6mm) SQFN, RoHS compliant package
• Footprint compatible with USB2513B
• MultiTRAK™
- Dedicated Transaction Translator per port
• PortMap
- Configurable port mapping and disable
sequencing
• PortSwap
- Configurable differential intra-pair signal
swapping
• PHYBoost™
- Programmable USB transceiver drive
strength for recovering signal integrity
• VariSense™
- Programmable USB receiver sensitivity
• Low power operation
• Full Power Management with individual or ganged
power control of each downstream port
• Built-in Self-Powered or Bus-Powered internal
default settings provide flexibility in the quantity of
USB expansion ports utilized without redesign
• Supports “Quad Page” configuration OTP flash
- Four consecutive 200 byte configuration
pages
• Fully integrated USB termination and Pull-up/Pulldown resistors
• On-chip Power On Reset (POR)
• Internal 3.3V and 1.2V voltage regulators
• On Board 24MHz Crystal Driver, Resonator, or
External 24MHz clock input
• Environmental
- Commercial temperature range support (0ºC
to 70ºC)
- Industrial temperature range support (-40ºC
to 85ºC)
Target Applications
•
•
•
•
•
•
•
•
•
LCD monitors and TVs
Multi-function USB peripherals
PC mother boards
Set-top boxes, DVD players, DVR/PVR
Printers and scanners
PC media drive bay
Portable hub boxes
Mobile PC docking
Embedded systems
2012 - 2019 Microchip Technology Inc.
DS00001702C-page 1
USB2533
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
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If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
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http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
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To determine if an errata sheet exists for a particular device, please check with one of the following:
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When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
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DS00001702C-page 2
2012 - 2019 Microchip Technology Inc.
USB2533
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 Acronyms and Definitions ............................................................................................................................................................... 6
3.0 Pin Descriptions .............................................................................................................................................................................. 7
4.0 Power Connections ....................................................................................................................................................................... 16
5.0 Modes of Operation ...................................................................................................................................................................... 17
6.0 Device Configuration ..................................................................................................................................................................... 21
7.0 Device Interfaces .......................................................................................................................................................................... 25
8.0 Functional Descriptions ................................................................................................................................................................. 27
9.0 Operational Characteristics ........................................................................................................................................................... 32
10.0 Package Outline
................................................................................................................................................................................................... 38
Appendix A: Data sheet Revision History ........................................................................................................................................... 39
The Microchip Web Site ...................................................................................................................................................................... 40
Customer Change Notification Service ............................................................................................................................................... 40
Customer Support ............................................................................................................................................................................... 40
Product Identification System ............................................................................................................................................................. 41
2012 - 2019 Microchip Technology Inc.
DS00001702C-page 3
USB2533
1.0
INTRODUCTION
The USB2533 is a low-power, OEM configurable, MTT (Multi-Transaction Translator) USB 2.0 hub controller with 3
downstream ports and advanced features for embedded USB applications. The USB2533 is fully compliant with the
USB 2.0 Specification, USB 2.0 Link Power Management Addendum and will attach to an upstream port as a Full-Speed
hub or as a Full-/Hi-Speed hub. The 3-port hub supports Low-Speed, Full-Speed, and Hi-Speed (if operating as a HiSpeed hub) downstream devices on all of the enabled downstream ports.
The USB2533 has been specifically optimized for embedded systems where high performance, and minimal BOM costs
are critical design requirements. Standby mode power has been minimized and reference clock inputs can be aligned
to the customer’s specific application. Additionally, all required resistors on the USB ports are integrated into the hub,
including all series termination and pull-up/pull-down resistors on the D+ and D– pins.
The USB2533 supports both upstream battery charger detection and downstream battery charging. The USB2533 integrated battery charger detection circuitry supports the USB-IF Battery Charging (BC1.2) detection method and most
Apple devices. These circuits are used to detect the attachment and type of a USB charger and provide an interrupt
output to indicate charger information is available to be read from the device’s status registers via the serial interface.
The USB2533 provides the battery charging handshake and supports the following USB-IF BC1.2 charging profiles:
•
•
•
•
DCP: Dedicated Charging Port (Power brick with no data)
CDP: Charging Downstream Port (1.5A with data)
SDP: Standard Downstream Port (0.5A with data)
Custom profiles loaded via SMBus or OTP
The USB2533 provides an additional USB endpoint dedicated for use as a USB to I2C interface, allowing external circuits or devices to be monitored, controlled, or configured via the USB interface. Additionally, the USB2533 includes
many powerful and unique features such as:
FlexConnect, which provides flexible connectivity options. The USB2533’s downstream port 1 can be swapped with
the upstream port, allowing master capable devices to control other devices on the hub.
MultiTRAK™ Technology, which utilizes a dedicated Transaction Translator (TT) per port to maintain consistent fullspeed data throughput regardless of the number of active downstream connections. MultiTRAKTM outperforms conventional USB 2.0 hubs with a single TT in USB full-speed data transfers.
PortMap, which provides flexible port mapping and disable sequences. The downstream ports of a USB2533 hub can
be reordered or disabled in any sequence to support multiple platform designs with minimum effort. For any port that is
disabled, the USB2533 hub controllers automatically reorder the remaining ports to match the USB host controller’s port
numbering scheme.
PortSwap, which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment
of USB signals (D+/D-) to connectors to avoid uneven trace length or crossing of the USB differential signals on the
PCB.
PHYBoost, which provides programmable levels of Hi-Speed USB signal drive
strength in the downstream port transceivers. PHYBoost attempts to restore USB signal integrity in a compromised system environment. The graphic on the right shows
an example of Hi-Speed USB eye diagrams before and after PHYBoost signal integrity restoration.
VariSense, which controls the USB receiver sensitivity enabling programmable levels of USB signal receive sensitivity. This capability allows operation in a sub-optimal
system environment, such as when a captive USB cable is used.
The USB2533 is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C) temperature range versions.
DS00001702C-page 4
2012 - 2019 Microchip Technology Inc.
USB2533
1.1
Block Diagram
Figure 1-1 details the internal block diagram of the USB2533.
FIGURE 1-1:
RESET_N
SYSTEM BLOCK DIAGRAM
Up or
Downstream
USB
VDDA33
VDDA33
To I2C Master/Slave
VDDA33
SDA
SCL
VDDCR12
1.2V Reg
3.3V Reg
Flex PHY
Serial
Interface
SIE
Controller
Repeater
TT #1
TT #2 TT #3 TT #4
Routing & Port Re-Ordering Logic
Bridge
UDC
20
Port Controller
2KB
DP
SRAM
256B
IRAM
Swap PHY
PHY
USB
USB
OCS
8051
Controller
GPIO
GPIO
PHY
2KB
OTP
Down or
Upstream
Port Power
4KB
SRAM
32KB
ROM
USB
Downstream Downstream
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DS00001702C-page 5
USB2533
2.0
ACRONYMS AND DEFINITIONS
2.1
Acronyms
EOP:
End of Packet
EP:
Endpoint
FS:
Full-Speed
GPIO:
General Purpose I/O (that is input/output to/from the device)
HS:
Hi-Speed
HSOS: High Speed Over Sampling
I2C:
Inter-Integrated Circuit
LS:
Low-Speed
OTP:
One Time Programmable
PCB:
Printed Circuit Board
PCS:
Physical Coding Sublayer
PHY:
Physical Layer
SMBus: System Management Bus
UUID:
Universally Unique IDentification
2.2
Reference Documents
1.
2.
3.
4.
5.
UNICODE UTF-16LE For String Descriptors USB Engineering Change Notice, December 29th, 2004, http://
www.usb.org
Universal Serial Bus Specification, Revision 2.0, April 27th, 2000, http://www.usb.org
Battery Charging Specification, Revision 1.2, Dec. 07, 2010, http://www.usb.org
I2C-Bus Specification, Version 1.1, http://www.nxp.com
System Management Bus Specification, Version 1.0, http://smbus.org/specs
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USB2533
PIN DESCRIPTIONS
VBUS_DET/PIO16
RESET_N
HS_IND/CFG_SEL1
SCL/SMBCLK/CFG_SEL0
VDD33
SDA/SMBDATA/NON_REM1
UART_TX
NC
UART_RX/OCS3_N
25
24
23
22
21
20
19
36-SQFN PIN ASSIGNMENTS
26
FIGURE 3-1:
27
3.0
SUSP_IND/LOCAL_PWR/NON_REM0
28
18
PRTPWR3/PRTCTL3/BC_EN3
VDDA33
29
17
OCS2_N
FLEX_USBUP_DM
30
16
PRTPWR2/PRTCTL2/BC_EN2
FLEX_USBUP_DP
31
15
VDD33
14
VDDCR12
13
OCS1_N
12
PRTPWR1/PRTCTL1/BC_EN1
11
LED0
10
VDDA33
4
5
6
7
8
9
NC
USBDN3_DM/PRT_DIS_M3
USBDN3_DP/PRT_DIS_P3
NC
NC
36
3
VDDA33
Ground Pad
(must be connected to VSS)
USBDN2_DP/PRT_DIS_P2
35
USBDN2_DM/PRT_DIS_M2
34
2
NC
RBIAS
1
33
SWAP_USBDN1_DP/PRT_DIS_P1
32
SWAP_USBDN1_DM/PRT_DIS_M1
XTAL2
XTAL1/REFCLK
USB2533
(Top View)
Indicates pins on the bottom of the device.
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DS00001702C-page 7
USB2533
3.1
Pin Descriptions
This section provides a detailed description of each pin. The signals are arranged in functional groups according to their
associated interface.
The “_N” symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage
level. For example, RESET_N indicates that the reset signal is active low. When “_N” is not present after the signal
name, the signal is asserted when at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of
“active low” and “active high” signals. The term assert, or assertion, indicates that a signal is active, independent of
whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is inactive.
Note:
The buffer type for each signal is indicated in the BUFFER TYPE column of Table 3-1. A description of the
buffer types is provided in Section 3.3.
Note:
Compatibility with the UCS100x family of USB port power controllers requires the UCS100x be connected
on Port 1 of the USB2533. Additionally, both PRTPWR1 and OCS1_N must be pulled high at Power-On
Reset (POR).
TABLE 3-1:
PIN DESCRIPTIONS
Buffer
Type
Num Pins
Name
Symbol
Description
FLEX_USBUP_DP
AIO
1
Upstream USB
D+
(Flex Port 0)
Upstream USB Port 0 D+ data signal.
Note:
The upstream Port 0 signals can be
optionally swapped with the downstream Port 1 signals.
FLEX_USBUP_DM
AIO
1
Upstream USB
D(Flex Port 0)
Upstream USB Port 0 D- data signal.
Note:
The upstream Port 0 signals can be
optionally swapped with the downstream Port 1 signals.
Downstream
USB D+
(Swap Port 1)
SWAP_USBDN1_DP
AIO
Downstream USB Port 1 D+ data signal.
Note:
The downstream Port 1 signals can be
optionally swapped with the upstream
Port 0 signals.
Port 1 D+
Disable
Configuration
Strap
PRT_DIS_P1
IS
USB/HSIC INTERFACES
1
This strap is used in conjunction with
PRT_DIS_M1 to disable USB Port 1.
0 = Port 1 D+ Enabled
1 = Port 1 D+ Disabled
Note:
Both PRT_DIS_P1 and PRT_DIS_M1
must be tied to VDD33 at reset to disable the associated port.
See Note 3-3 for more information on configuration
straps.
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USB2533
TABLE 3-1:
Num Pins
1
PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer
Type
Downstream
USB D(Swap Port 1)
SWAP_USBDN1_DM
AIO
Downstream USB Port 1 D- data signal.
Note:
The downstream Port 1 signals can be
optionally swapped with the upstream
Port 0 signals.
Port 1 DDisable
Configuration
Strap
PRT_DIS_M1
IS
This strap is used in conjunction with PRT_DIS_P1
to disable USB Port 1.
Description
0 = Port 1 D- Enabled
1 = Port 1 D- Disabled
Note:
Both PRT_DIS_P1 and PRT_DIS_M1
must be tied to VDD33 at reset to disable the associated port.
See Note 3-3 for more information on configuration
straps.
1
Downstream
USB D+
(Port 2)
USBDN2_DP
AIO
Port 2 D+
Disable
Configuration
Strap
PRT_DIS_P2
IS
Downstream USB Port 2 D+ data signal.
This strap is used in conjunction with
PRT_DIS_M2 to disable USB Port 2.
0 = Port 2 D+ Enabled
1 = Port 2 D+ Disabled
Note:
Both PRT_DIS_P2 and PRT_DIS_M2
must be tied to VDD33 at reset to disable the associated port.
See Note 3-3 for more information on configuration
straps.
1
Downstream
USB D(Port 2)
USBDN2_DM
AIO
Port 2 DDisable
Configuration
Strap
PRT_DIS_M2
IS
Downstream USB Port 2 D- data signal.
This strap is used in conjunction with PRT_DIS_P2
to disable USB Port 2.
0 = Port 2 D- Enabled
1 = Port 2 D- Disabled
Note:
Both PRT_DIS_P2 and PRT_DIS_M2
must be tied to VDD33 at reset to disable the associated port.
See Note 3-3 for more information on configuration
straps.
1
Downstream
USB D+
(Port 3)
USBDN3_DP
AIO
Port 3 D+
Disable
Configuration
Strap
PRT_DIS_P3
IS
Downstream USB Port 3 D+ data signal.
This strap is used in conjunction with
PRT_DIS_M3 to disable USB Port 3.
0 = Port 3 D+ Enabled
1 = Port 3 D+ Disabled
Note:
Both PRT_DIS_P3 and PRT_DIS_M3
must be tied to VDD33 at reset to disable the associated port.
See Note 3-3 for more information on configuration
straps.
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DS00001702C-page 9
USB2533
TABLE 3-1:
Num Pins
1
PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer
Type
Downstream
USB D(Port 3)
USBDN3_DM
AIO
Port 3 DDisable
Configuration
Strap
PRT_DIS_M3
IS
Description
Downstream USB Port 3 D- data signal.
This strap is used in conjunction with PRT_DIS_P3
to disable USB Port 3.
0 = Port 3 D- Enabled
1 = Port 3 D- Disabled
Note:
Both PRT_DIS_P3 and PRT_DIS_M3
must be tied to VDD33 at reset to disable the associated port.
See Note 3-3 for more information on configuration
straps.
2C
1
1
I2C/SMBUS INTERFACE
Serial
I
Clock Input
SCL
I_SMB
I2C serial clock input
SMBus Clock
SMBCLK
I_SMB
SMBus serial clock input
Configuration
Select 0
Configuration
Strap
CFG_SEL0
I_SMB
This strap is used in conjunction with CFG_SEL1
to set the hub configuration method. Refer to
Section 6.3.2, "Configuration Select
(CFG_SEL[1:0])," on page 24 for additional
information.
See Note 3-3 for more information on configuration
straps.
I2C Serial Data
SDA
IS/OD8
I2C bidirectional serial data
SMBus Serial
Data
SMBDATA
IS/OD8
SMBus bidirectional serial data
NonRemovable
Device 1
Configuration
Strap
NON_REM1
(Note 3-2)
IS
This strap is used in conjunction with NON_REM0
to configure the downstream ports as nonremovable devices. Refer to Section 6.3.1, "NonRemovable Device (NON_REM[1:0])," on page 23
for additional information.
See Note 3-3 for more information on configuration
straps.
MISC.
1
Port 1 OverCurrent Sense
Input
OCS1_N
IS
(PU)
This active-low signal is input from an external
current monitor to indicate an over-current
condition on USB Port 1.
1
Port 2 OverCurrent Sense
Input
OCS2_N
IS
(PU)
This active-low signal is input from an external
current monitor to indicate an over-current
condition on USB Port 2.
UART Receive
Input
UART_RX
IS
Port 3 OverCurrent Sense
Input
OCS3_N
IS
(PU)
UART Transmit
Output
UART_TX
O8
1
1
DS00001702C-page 10
Internal UART receive input
Note:
This is a 3.3V signal. For RS232 operation, an external 12V translator is
required.
This active-low signal is input from an external
current monitor to indicate an over-current
condition on USB Port 3.
Internal UART transmit output
Note:
This is a 3.3V signal. For RS232 operation, an external 12V driver is required.
2012 - 2019 Microchip Technology Inc.
USB2533
TABLE 3-1:
PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer
Type
System Reset
Input
RESET_N
I_RST
Crystal Input
XTAL1
ICLK
External 24 MHz crystal input
1
Reference
Clock Input
REFCLK
ICLK
Reference clock input. The device may be
alternatively driven by a single-ended clock
oscillator. When this method is used, XTAL2
should be left unconnected.
1
Crystal Output
XTAL2
OCLK
1
External USB
Transceiver
Bias Resistor
RBIAS
AI
A 12.0k (+/- 1%) resistor is attached from ground
to this pin to set the transceiver’s internal bias
settings.
LED 0 Output
LED0
O8
General purpose LED 0 output that is configurable
to blink or “breathe” at various rates.
Note:
LED0 must be enabled via the Protouch
configuration tool.
Detect
Upstream
VBUS Power
VBUS_DET
IS
Detects state of upstream bus power.
Num Pins
1
1
1
Description
This active-low signal allows external hardware to
reset the device.
Note:
The active-low pulse must be at least
5us wide. Refer to Section 8.3.2, "External Chip Reset (RESET_N)," on
page 29 for additional information.
External 24 MHz crystal output
When designing a detachable hub, this pin must
be connected to the VBUS power pin of the
upstream USB port through a resistor divider
(50k by 100k) to provide 3.3V.
For self-powered applications with a permanently
attached host, this pin must be connected to either
3.3V or 5.0V through a resistor divider to provide
3.3V.
In embedded applications, VBUS_DET may be
controlled (toggled) when the host desires to
renegotiate a connection without requiring a full
reset of the device.
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DS00001702C-page 11
USB2533
TABLE 3-1:
Num Pins
PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer
Type
Remote
Wakeup
Indicator
SUSP_IND
OD8
Description
Configurable sideband signal used to indicate
Suspend status (default) or Remote Wakeup
events to the Host.
Suspend Indicator (default configuration):
0 = Unconfigured, or configured and in USB
suspend mode
1 = Device is configured and is active
(i.e., not in suspend)
For Remote Wakeup Indicator mode:
Refer to Section 8.5, "Remote Wakeup Indicator
(SUSP_IND)," on page 30.
1
Refer to Section 6.3.1, "Non-Removable Device
(NON_REM[1:0])," on page 23 for information on
LED polarity when using this signal.
Local Power
Detect
LOCAL_PWR
IS
Detects the availability of a local self-power
source.
0 = Self/local power source is NOT available. (i.e.,
device must obtain all power from upstream USB
VBUS)
1 = Self/local power source is available
See Note 3-1 for more information on this pin.
NonRemovable
Device 0
Configuration
Strap
NON_REM0
(Note 3-2)
IS
This strap is used in conjunction with NON_REM1
to configure the downstream ports as nonremovable devices. Refer to Section 6.3.1, "NonRemovable Device (NON_REM[1:0])," on page 23
for additional information.
See Note 3-3 for more information on configuration
straps.
High Speed
Indicator
HS_IND
O8
Indicates a high speed connection on the upstream
port. The active state of the LED will be
determined as follows:
If CFG_SEL1 = 0, HS_IND is active high.
If CFG_SEL1 = 1, HS_IND is active low.
1
Asserted = hub is connected at high speed
Negated = Hub is connected at full speed
Configuration
Select 1
Configuration
Strap
CFG_SEL1
IS
This strap is used in conjunction with CFG_SEL0
to set the hub configuration method. Refer to
Section 6.3.2, "Configuration Select
(CFG_SEL[1:0])," on page 24 for additional
information.
See Note 3-3 for more information on configuration
straps.
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USB2533
TABLE 3-1:
Num Pins
PIN DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer
Type
Port 1 Power
Output
PRTPWR1
O8
Description
Enables power to a downstream USB device
attached to Port 1.
0 = Power disabled on downstream Port 1
1 = Power enabled on downstream Port 1
1
Port 1 Control
PRTCTL1
OD8/IS
(PU)
When configured as PRTCTL1, this pin functions
as both the Port 1 power enable output
(PRTPWR1) and the Port 1 over-current sense
input (OCS1_N). Refer to the PRTPWR1 and
OCS1_N descriptions for additional information.
Port 1 Battery
Charging
Configuration
Strap
BC_EN1
IS
This strap is used to indicate support of the battery
charging protocol on Port 1. Enabling battery
charging support allows a device on the port to
draw currents per the USB battery charging
specification.
0 = Battery charging is not supported on Port 1
1 = Battery charging is supported on Port 1
See Note 3-3 for more information on configuration
straps.
Port 2 Power
Output
PRTPWR2
O8
Enables power to a downstream USB device
attached to Port 2.
0 = Power disabled on downstream Port 2
1 = Power enabled on downstream Port 2
1
Port 2 Control
PRTCTL2
OD8/IS
(PU)
When configured as PRTCTL2, this pin functions
as both the Port 2 power enable output
(PRTPWR2) and the Port 2 over-current sense
input (OCS2_N). Refer to the PRTPWR2 and
OCS2_N descriptions for additional information.
Port 2 Battery
Charging
Configuration
Strap
BC_EN2
IS
This strap is used to indicate support of the battery
charging protocol on Port 2. Enabling battery
charging support allows a device on the port to
draw currents per the USB battery charging
specification.
0 = Battery charging is not supported on Port 2
1 = Battery charging is supported on Port 2
See Note 3-3 for more information on configuration
straps.
Port 3 Power
Output
PRTPWR3
O8
Enables power to a downstream USB device
attached to Port 3.
0 = Power disabled on downstream Port 3
1 = Power enabled on downstream Port 3
1
Port 3 Control
PRTCTL3
OD8/IS
(PU)
When configured as PRTCTL3, this pin functions
as both the Port 3 power enable output
(PRTPWR3) and the Port 3 over-current sense
input (OCS3_N). Refer to the PRTPWR3 and
OCS3_N descriptions for additional information.
Port 3 Battery
Charging
Configuration
Strap
BC_EN3
IS
This strap is used to indicate support of the battery
charging protocol on Port 3. Enabling battery
charging support allows a device on the port to
draw currents per the USB battery charging
specification.
0 = Battery charging is not supported on Port 3
1 = Battery charging is supported on Port 3
See Note 3-3 for more information on configuration
straps.
2012 - 2019 Microchip Technology Inc.
DS00001702C-page 13
USB2533
TABLE 3-1:
PIN DESCRIPTIONS (CONTINUED)
Num Pins
Name
Symbol
Buffer
Type
Description
5
No Connect
NC
-
These pins must be left floating for normal device
operation.
3
+3.3V Analog
Power Supply
VDDA33
P
+3.3V analog power supply. Refer to Section 4.0,
"Power Connections," on page 16 for power
connection information.
VDD33
P
2
+3.3V Power
Supply
+3.3V power supply. These pins must be
connected to VDDA33. Refer to Section 4.0,
"Power Connections," on page 16 for power
connection information.
+1.2V Core
Power Supply
VDDCR12
P
+1.2V core power supply. A 1.0 F (
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