USB2640/USB2641
Ultra Fast USB 2.0 Multi-Format Flash Media Controller/USB
Hub Combo
General Description
Features
The Microchip USB2640/USB2641 is a USB 2.0 compliant, Hi-Speed hub for USB port expansion with an
attached mass storage class peripheral controller. The
controller allows read/write capability to popular flash
media from the following families:
• Compliant with the following flash media card
specifications: SD 2.0 / MMC 4.2 / MS 1.43 / MSPro 1.02 / MS-PRO-HG 1.01 / MS-Duo 1.10 / xD
1.2
• Supports a single external 3.3 V supply source;
internal regulators provide 1.8 V internal core voltage for additional bill of materials and power savings
• The transaction translator (TT) in the hub supports operation of Full-Speed and Low-Speed
peripherals
• 9 K RAM | 64 K on-chip ROM
• Enhanced EMI rejection and ESD protection performance
• On board 24 MHz crystal driver circuit
• Optional external 24 MHz clock input
• 8051 8-bit microprocessor
• Hub and flash media reader/writer configuration
from a single source: External I2C ROM or external SPI ROM
- Configures internal code using an external
I2C EEPROM
- Supports external code using a SPI Flash
EEPROM
- Customizable vendor ID, product ID, language ID
• EEPROM update via USB
• 48-pin QFN RoHS compliant package (7 x 7 mm)
•
•
•
•
Secure DigitalTM (SD)
MultiMediaCardTM (MMC)
xD-Picture CardTM (xD)1
Memory Stick(MS)
The USB2640/USB2641 is a fully integrated, single
chip solution providing USB expansion and integrated
flash card media reader/writer capability of ultra high
performance operation. Average sustained transfer
rates exceeding 35 MB/s are possible2.
Highlights
• Hub controller with internally connected ultra fast
flash media reader/writer and 2 exposed downstream ports for external peripheral expansion
• Flash media reader/writer employs multiplexed
card interfaces which are optimized for use with
single card insertion combo sockets
• Hardware-controlled data flow architecture for all
self-mapped media
• Optional support for external firmware access via
SPI interface
• PortMap
- Flexible port mapping and port disable
sequencing supports multiple platform
designs
• PortSwap
- Programmable USB differential-pair pin locations eases PCB design by aligning USB signal traces directly to connectors
• PHYBoost
- Programmable USB transceiver drive
strength recovers signal integrity
Applications
•
•
•
•
•
•
•
Desktop and mobile PCs
Personal mobile devices
Printers
GPS navigation systems
Media Players/Viewers
Consumer A/V
Set-top boxes
1. Support and capabilities for xD-Picture Card are
not applicable for the USB2641. Please obtain a
user license from the xD-Picture Card License Office to support this flash media format.
2. Host and media dependent.
2015-2021 Microchip Technology Inc.
DS00001947C-page 1
USB2640/USB2641
TO OUR VALUED CUSTOMERS
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Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site; http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
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DS00001947C-page 2
2015-2021 Microchip Technology Inc.
USB2640/USB2641
Table of Contents
1.0 Overview ......................................................................................................................................................................................... 4
2.0 Acronyms ........................................................................................................................................................................................ 6
3.0 Block Diagrams ............................................................................................................................................................................... 7
4.0 Pin Configurations ........................................................................................................................................................................... 9
5.0 Pin Tables ..................................................................................................................................................................................... 11
6.0 Pin Descriptions ............................................................................................................................................................................ 13
7.0 Configuration Options ................................................................................................................................................................... 23
8.0 Pin Reset States ........................................................................................................................................................................... 43
9.0 DC Parameters ............................................................................................................................................................................. 47
10.0 AC Specifications ........................................................................................................................................................................ 51
11.0 Package Outline .......................................................................................................................................................................... 53
The Microchip Web Site ...................................................................................................................................................................... 57
Customer Change Notification Service ............................................................................................................................................... 57
Customer Support ............................................................................................................................................................................... 57
Product Identification System ............................................................................................................................................................. 58
2015-2021 Microchip Technology Inc.
DS00001947C-page 3
USB2640/USB2641
1.0
OVERVIEW
The Microchip USB2640/USB2641 is an integrated USB 2.0 compliant, Hi-Speed hub for USB port expansion with an
attached bulk only mass storage class peripheral controller. This multi-format flash media controller and USB Hub
Combo features three downstream ports: one port is dedicated to an internally connected ultra fast flash media
reader/writer and two exposed downstream ports are available for external peripheral expansion.
The Microchip USB2640/USB2641 is an ultra fast, OEM-configurable, hub controller IC with three downstream ports for
embedded USB solutions. The USB2640/USB2641 will attach to an upstream port as a Full-Speed Hub or as a Full-/HiSpeed Hub. The hub supports Low-Speed, Full-Speed, and Hi-Speed (if operating as a Hi-Speed Hub) downstream
devices on all of the enabled downstream ports.
All required resistors on the USB ports are integrated into the hub. This includes all series termination resistors on D+
and D– pins and all required pull-down and pull-up resistors on D+ and D– pins. The over-current sense inputs for the
downstream facing ports have internal pull-up resistors.
The USB2640/USB2641 includes programmable features such as:
PortMap which provides flexible port mapping and disable sequences. The downstream ports of a USB2640/USB2641
hub can be reordered or disabled in any sequence to support multiple platform designs with minimum effort. For any
port that is disabled, the USB2640/USB2641 automatically reorders the remaining ports to match the USB host controller’s port numbering scheme.
PortSwap which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment
of USB signals (D+/D-) to connectors avoiding uneven trace length or crossing of the USB differential signals on the
PCB.
PHYBoost which enables four programmable levels of USB signal drive strength in downstream port transceivers.
PHYBoost attempts to restore USB signal integrity that has been compromised by system level variables such as poor
PCB layout, long cables, etc.
1.1
1.1.1
•
•
•
•
Device Features
Hardware Features
Single chip flash media controller
Transaction translator (TT) in the hub supports operation of FS and LS peripherals
Full power management with individual or ganged power control of each downstream port
Optional support for external firmware access via SPI interface
- 30 MHz or 60 MHz operation support
- Single bit or dual bit mode support
- Mode 0 or mode 3 SPI support
Compliant with the following flash media card specifications:
• Secure Digital 2.0 / MultiMediaCard 4.2
- SD 2.0, HS-SD, HC-SD
- TransFlash™ and reduced form factor media
- 1/4/8 bit MMC 4.2
• MMC streaming mode support
• Memory Stick 1.43
• Memory Stick Pro Format 1.02
• Memory Stick Pro-HG Duo Format 1.01
- Memory Stick, MS Duo, HS-MS, MS Pro-HG, MS Pro
• Memory Stick Duo 1.10
• xD-Picture Card 1.2 (USB2640 only)
• On board 24 MHz crystal driver circuit
• Optional external 24 MHz clock input
- Must be used with an external resistor divider to provide a 1.8 V signal
DS00001947C-page 4
2015-2021 Microchip Technology Inc.
USB2640/USB2641
• 8051 8-bit microprocessor
- 60 MHz - single cycle execution
- 64 KB ROM; 9 KB RAM
• Internal regulator for 1.8 V core operation
• Optimized pinout improves signal flow, easing implementation and allowing for improved signal integrity treatment
1.1.2
•
•
•
•
Software Features
Optimized for low latency interrupt handling
Hub and flash media reader/writer configuration from a single source: External I2C ROM or external SPI ROM
EEPROM update via USB
Please see the USB2640/USB2641 Software Release Notes for additional software features
1.2
1.2.1
OEM Selectable Features
Hub
A default configuration is available in USB2640/USB2641 following a reset. The USB2640/USB2641 may also be configured by an external I2C EEPROM or via external SPI ROM flash.
The USB2640/USB2641 supports several OEM selectable features:
• Compound Device support (port is permanently hardwired to a downstream USB peripheral device), on a port-byport basis.
• Select over-current sensing and port power control on an individual (port-by-port) or ganged (all ports together)
basis to match the OEM’s choice of circuit board component selection.
• Port power control and over-current detection/delay features
• Configure the delay time for filtering the over-current sense inputs.
• Configure the delay time for turning on downstream port power.
• Bus- or self-powered selection
• Hub port disable or non-removable configurations
• Flexible port mapping and disable sequence. Ports can be disabled/reordered in any sequence to support multiple
platforms with a single design. The hub will automatically reorder the remaining ports to match the host controller's
numbering scheme.
• Programmable USB differential-pair pin location.
- Eases PCB layout by aligning USB signal lines directly to connectors
• Programmable USB signal drive strength. Recover USB signal integrity due to compromised system environments using 4 levels of signal drive strength.
• Indicate the maximum current that the 2-port hub consumes from the USB upstream port.
• Indicate the maximum current required for the hub controller.
1.2.2
•
•
•
•
•
FLASH MEDIA CONTROLLER
Customize vendor ID, product ID, and device ID.
12-hex digit (max) serial number string
Customizable vendor specific data by optional use of external serial EEPROM
28-character manufacturer ID and product string for flash media reader/writer
LED blink interval or duration
2015-2021 Microchip Technology Inc.
DS00001947C-page 5
USB2640/USB2641
2.0
ACRONYMS
FM:
Flash Media
FMC:
Flash Media Controller
FS:
Full-speed Device
LS:
Low-speed Device
HS:
Hi-speed Device
2
I C:
Inter-Integrated Circuit
MMC:
MultiMediaCard
MS:
Memory Stick
MSC:
Memory Stick Controller
OCS:
Over-current Sense
RXD:
Received eXchange Data
SD:
Secure Digital
SDC:
Secure Digital Controller
TXD:
Transmit eXchange Data
UART:
Universal Asynchronous Receiver-Transmitter
UCHAR:
Unsigned Character
UINT:
Unsigned Integer
xD:
xD-Picture Card
DS00001947C-page 6
2015-2021 Microchip Technology Inc.
2015-2021 Microchip Technology Inc.
USB Data
Downstream
PHY
OC Sense/
Pwr Switch
USB Data OC Sense/
Downstream Pwr Switch
PHY
Port #2
OC
Sense
Switch
Driver
Routing & Port Re-Ordering Logic
Transaction
Translator
Serial
Interface
Engine
1.8 V Reg
PLL
24 MHz
Crystal
1.8 V
BRIDGE
Port Controller
Controller
Serial
Interface
SIE
CTL
3K
total
BUS
INTFC
ADDR
MAP
EP2 RX
EP2 TX
RAM
EP0 TX
EP0 RX
ROM
64 K
RAM
6K
SFR
RAM
BUS
INTFC
PWR_FET0
SPI
xD
XDATA BRIDGE
+ BUS ARBITER
SD/
MMC
FMI
FMDU
CTL
Flash Media
Cards
(require Combo
socket)
MS
BUS
INTFC
AUTO_CBW
PROC
Program Memory I/O Bus
8051
PROCESSOR
CRD_PWR
SPI (4 pins)
FIGURE 3-1:
Port #3
OC
Sense
Switch
Driver
Upstream
PHY
Bus-Power
Detect/VBUS
Pulse
3.3 V
3.0
Repeater
Upstream USB
Data
To Upstream
VBUS
USB2640/USB2641
BLOCK DIAGRAMS
USB2640 BLOCK DIAGRAM
DS00001947C-page 7
DS00001947C-page 8
USB Data
OC Sense/
Downstream Pwr Switch
PHY
Transaction
Translator
Serial
Interface
Engine
1.8 V Reg
PLL
24 MHz
Crystal
USB Data OC Sense/
Downstream Pwr Switch
PHY
Port #2
OC
Sense
Switch
Driver
Routing & Port Re-Ordering Logic
Repeater
Upstream
PHY
Upstream USB
3.3 V
Data
1.8 V
BRIDGE
Port Controller
Controller
Serial
Interface
SIE
CTL
3K
total
BUS
INTFC
ADDR
MAP
EP2 RX
EP2 TX
RAM
EP0 TX
EP0 RX
ROM
64 K
RAM
6K
SFR
RAM
BUS
INTFC
PWR_FET0
SPI
Flash Media
Cards
(require Combo
socket)
SD/
MMC
FMI
FMDU
CTL
AUTO_CBW
PROC
BUS
INTFC
MS
XDATA BRIDGE
+ BUS ARBITER
Program Memory I/O Bus
8051
PROCESSOR
CRD_PWR
SPI (4 pins)
FIGURE 3-2:
Port #3
OC
Sense
Switch
Driver
Bus-Power
Detect/VBUS
Pulse
To Upstream
VBUS
USB2640/USB2641
USB2641 BLOCK DIAGRAM
2015-2021 Microchip Technology Inc.
USB2640/USB2641
PIN CONFIGURATIONS
NC
CRD_PWR
VDD33
xD_D5 / SD_D2
xD_D6 / SD_D3 / MS_D3
MS_INS
xD_D7 / SD_D4 / MS_D2
xD_nCD
xD_nB/R
xD_nRE
xD_nCE
VDD33
36
35
34
33
32
31
30
29
28
27
26
25
USB2640 48-PIN QFN
LED
37
24
xD_CLE / SD_CMD / MS_D0
nRESET
38
23
xD_ALE / SD_D5 / MS_D1
VBUS_DET
39
22
xD_nWE
TEST
40
21
xD_nWP / SD_CLK / MS_BS
41
20
xD_D0 / SD_D6 / MS_D7
USB+
42
19
xD_D1 / SD_D7 / MS_D6
18
xD_D2 / SD_D0 / MS_D4
17
xD_D3 / SD_D1 / MS_D5
VDD33
USB2640
(Top View QFN-48)
USB-
43
XTAL2
44
XTAL1 (CLKIN)
45
16
VDD33
PLLFILT
46
15
CRFILT
RBIAS
47
14
SD_nCD
VDD33
48
13
xD_D4 / SD_WP / MS_SCLK
7
8
9
PRTCTL3
SPI_CE_n
SPI_CLK / SCL
12
6
VDD33
5
VDD33
PRTCTL2
11
4
USBDN_DP3
SPI_DI
3
USBDN_DM3
10
2
SPI_DO / SDA / SPI_SPD_SEL
1
Ground Pad
(must be connected to VSS)
USBDN_DP2
FIGURE 4-1:
USBDN_DM2
4.0
Indicates pins on the bottom of the device.
2015-2021 Microchip Technology Inc.
DS00001947C-page 9
USB2640/USB2641
NC
CRD_PWR
VDD33
SD_D2
SD_D3 / MS_D3
MS_INS
SD_D4 / MS_D2
NC
NC
NC
NC
VDD33
35
34
33
32
31
30
29
28
27
26
25
USB2641 48-PIN QFN
36
FIGURE 4-2:
LED
37
24
SD_CMD / MS_D0
nRESET
38
23
SD_D5 / MS_D1
VBUS_DET
39
22
NC
TEST
40
21
SD_CLK / MS_BS
VDD33
41
20
SD_D6 / MS_D7
USB+
42
19
SD_D7 / MS_D6
USB-
43
18
SD_D0 / MS_D4
USB2641
(Top View QFN-48)
XTAL2
44
17
SD_D1 / MS_D5
XTAL1 (CLKIN)
45
16
VDD33
PLLFILT
46
15
CRFILT
RBIAS
47
14
SD_nCD
VDD33
48
13
SD_WP / MS_SCLK
10
11
12
SPI_DI
VDD33
7
PRTCTL3
SPI_DO / SDA / SPI_SPD_SEL
6
9
5
VDD33
PRTCTL2
8
4
USBDN_DP3
SPI_CE_n
3
SPI_CLK / SCL
2
USBDN_DP2
USBDN_DM3
USBDN_DM2
1
Ground Pad
(must be connected to VSS)
Indicates pins on the bottom of the device.
DS00001947C-page 10
2015-2021 Microchip Technology Inc.
USB2640/USB2641
5.0
PIN TABLES
5.1
48-Pin Tables
TABLE 5-1:
USB2640 48-PIN TABLE
xD (Only in USB2640) / SECURE DIGITAL / MEMORY STICK INTERFACE (18 PINS)
xD_D3 /
SD_D1 /
MS_D5
xD_D2 /
SD_D0 /
MS_D4
xD_D1 /
SD_D7 /
MS_D6
xD_D0 /
SD_D6 /
MS_D7
xD_nWP /
SD_CLK /
MS_BS
xD_ALE /
SD_D5 /
MS_D1
xD_CLE /
SD_CMD /
MS_D0
xD_D7 /
SD_D4 /
MS_D2
xD_D6 /
SD_D3 /
MS_D3
xD_D5 /
SD_D2
xD_nRE
xD_nWE
xD_D4 /
SD_WP /
MS_SCLK
xD_nB/R
xD_nCE
MS_INS
xD_nCD
SD_nCD
USB INTERFACE (5 PINS)
USB+
USB-
XTAL1 (CLKIN)
XTAL2
RBIAS
2-PORT USB INTERFACE (7 PINS)
USBDN_DP2
USBDN_DM2
PRTCTL2
USBDN_DP3
USBDN_DM3
VBUS_DET
PRTCTL3
SPI INTERFACE (4 PINS)
SPI_CE_n
SPI_DO /
SDA /
SPI_SPD_SEL
SPI_CLK /
SCL
SPI_DI
MISC (4 PINS)
nRESET
LED /
TXD
TEST
NC
CRD_PWR
POWER AND GROUND (10 PINS)
(7) VDD33
CRFILT
PLLFILT
TOTAL 48
2015-2021 Microchip Technology Inc.
DS00001947C-page 11
USB2640/USB2641
TABLE 5-2:
USB2641 48-PIN TABLE
SECURE DIGITAL / MEMORY STICK INTERFACE (13 PINS)
SD_D1 /
MS_D5
SD_D0 /
MS_D4
SD_D7 /
MS_D6
SD_D6 /
MS_D7
SD_CLK /
MS_BS
SD_D5 /
MS_D1
SD_CMD /
MS_D0
SD_D4 /
MS_D2
SD_D3 /
MS_D3
SD_D2
MS_INS
NC
SD_WP /
MS_SCLK
SD_nCD
USB INTERFACE (4 PINS)
USB+
USB-
XTAL1 (CLKIN)
XTAL2
RBIAS
2-PORT USB INTERFACE (7 PINS)
USBDN_DP2
USBDN_DM2
PRTCTL2
USBDN_DP3
USBDN_DM3
VBUS_DET
PRTCTL3
SPI INTERFACE (4 PINS)
SPI_CE_n
SPI_DO /
SDA /
SPI_SPD_SEL
SPI_CLK /
SCL
SPI_DI
MISC (5 PINS)
nRESET
LED /
TXD
TEST
NC
(CRD_PWR)
POWER AND GROUND (15 PINS)
(7) VDD33
CRFILT
PLLFILT
PLLFILT
(6) NC
TOTAL 48
DS00001947C-page 12
2015-2021 Microchip Technology Inc.
USB2640/USB2641
6.0
PIN DESCRIPTIONS
This section provides a detailed description of each signal. The signals are arranged in functional groups according to
their associated interface. The pin descriptions below are applied when using the internal default firmware and can be
referenced in Section 7.0, "Configuration Options," on page 23. Please reference Section 2.0, "Acronyms" for a list of
the acronyms used.
The “n” symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage
level. When “n” is not present in the signal name, the signal is asserted at a high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of
“active low” and “active high” signals. The term assert, or assertion, indicates that a signal is active, independent of
whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is inactive.
6.1
USB2640/USB2641 Pin Descriptions
TABLE 6-1:
Symbol
USB2640/USB2641 PIN DESCRIPTIONS
48-Pin
QFN
Buffer Type
(Table 6-2)
Description
xD-PICTURE CARD INTERFACE (APPLIES ONLY TO USB2640)
xD_D[7:0]
xD_ALE
30
32
33
13
17
18
19
20
I/O12PU
23
O12PD
xD-Picture Card Data 7-0
These pins are the bi-directional data signal xD_D7 - xD_D0 and have
weak internal pull-up resistors.
xD-Picture Card Address Strobe
This pin is an active high Address Latch Enable signal for the xDPicture Card device. This pin has a weak pull-down resistor that is
permanently enabled.
xD_nB/R
28
IPU
xD Busy or Data Ready
This pin is connected to the BSY/RDY pin of the xD-Picture Card
device.
When using the internal FET, this pin has an internal weak pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (the internal FET is disabled), then the
internal pull-up is not available (an external pull-up is required).
xD_nCE
26
O12PU
xD Chip Enable
This pin is an active low chip enable signal for the xD-Picture Card
device.
When using the internal FET, this pin has an internal weak pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (the internal FET is disabled), then the
internal pull-up is not available (an external pull-up is required).
xD_CLE
24
O12PD
xD-Picture Card Command Strobe
This pin is an active high Command Latch Enable signal for the xDPicture Card device. This pin has a weak pull-down resistor that is
permanently enabled.
xD_nCD
29
I/O12
xD Card Detection
Designates as the xD-Picture Card detection pin.
2015-2021 Microchip Technology Inc.
DS00001947C-page 13
USB2640/USB2641
TABLE 6-1:
USB2640/USB2641 PIN DESCRIPTIONS (CONTINUED)
Symbol
48-Pin
QFN
Buffer Type
(Table 6-2)
xD_nRE
27
O12PU
Description
xD Read Enable
This pin is an active low read strobe signal for the xD-Picture Card
device.
When using the internal FET, this pin has an internal weak pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (the internal FET is disabled), then the
internal pull-up is not available (an external pull-up is required).
xD_nWE
22
O12PU
xD Write Enable
This pin is an active low write strobe signal for the xD-Picture Card
device.
When using the internal FET, this pin has an internal weak pull-up
resistor that is tied to the output of the internal power FET.
If an external FET is used (the internal FET is disabled), then the
internal pull-up is not available (an external pull-up is required).
xD_nWP
21
O12PD
xD-Picture Card Write Protect
This pin is an active low write protect signal for the xD-Picture Card
device. This pin has a weak pull-down resistor that is permanently
enabled.
MEMORY STICK INTERFACE
MS_BS
21
O12
Memory Stick Bus State
This pin is connected to the bus state pin of the MS device. It is used
to control the Bus States 0, 1, 2, and 3 (BS0, BS1, and BS3) of the MS
device.
MS_INS
MS_SCLK
31
13
I/O12
Memory Stick Card Insertion
IPU
Designates as the Memory Stick card detection pin and has an internal
weak pull-up resistor.
O12
Memory Stick System Clock
This pin is an output clock signal to the MS device.
MS_D[7:0]
20
19
17
18
32
30
23
24
I/O12PD
Memory Stick System Data In/Out
These pins are the bi-directional data signals for the MS device. In
serial mode, the most significant bit (MSB) of each byte is transmitted
first by either MSC or MS device on MS_D0.
MS_D0, MS_D2, and MS_D3 have weak pull-down resistors. MS_D1
has a pull down resistor if in parallel mode, otherwise it is disabled. In
4- or 8-bit parallel modes, all MS_D7 - MS_D0 signals have weak pulldown resistors.
SECURE DIGITAL / MULTIMEDIACARD INTERFACE
SD_D[7:0]
DS00001947C-page 14
19
20
23
30
32
33
17
18
I/O12PU
Secure Digital Data 7-0
These are the bi-directional data signals SD_D0-SD_D7 and have
weak pull-up resistors.
2015-2021 Microchip Technology Inc.
USB2640/USB2641
TABLE 6-1:
USB2640/USB2641 PIN DESCRIPTIONS (CONTINUED)
Symbol
48-Pin
QFN
Buffer Type
(Table 6-2)
SD_CLK
21
O12
Description
Secure Digital Clock
This is an output clock signal to the SD/MMC device.
SD_CMD
24
I/O12PU
Secure Digital Command
This is a bi-directional signal that connects to the CMD signal of the
SD/MMC device and has an internal weak pull-up resistor.
SD_WP
13
I/O12
Secure Digital Write Protected
Designates as the Secure Digital card mechanical write protect detect
pin.
SD_nCD
14
I/O12
Secure Digital Card Detect
Designates as the Secure Digital card detection pin.
USB INTERFACE
USBUSB+
43
42
I/O-U
USBDN_DM
[3:2]
USBDN_DP
[3:2]
3
1
4
2
I/O-U
PRTCTL[3:2]
7
6
I/OD12PU
USB Bus Data
These pins connect to the upstream USB bus data signals. USB+ and
USB- can be swapped using the PortSwap feature (See Section
7.3.5.20, "F1h: Port Swap," on page 38).
USB Bus Data
These pins connect to the downstream USB bus data signals and can
be swapped using the PortSwap feature (See Section 7.3.5.20, "F1h:
Port Swap," on page 38).
USB Power Enable
As an output, these pins enable power to downstream USB peripheral
devices and have weak internal pull-up resistors. See Section 6.3,
"Port Power Control" for diagram and usage instructions.
As an input, when the power is enabled, these pins monitor the overcurrent condition. When an over-current condition is detected, the pins
turn the power off.
VBUS_DET
39
I
Detect Upstream VBUS Power
Detects the state of upstream VBUS power. The Hub monitors
VBUS_DET to determine when to assert the internal D+ pull-up resistor
(signaling a connect event).
When designing a detachable hub, connect this pin to the VBUS power
pin of the USB port that is upstream of the Hub.
For self-powered applications with a permanently attached host, this
pin should be pulled up, typically to VDD33.
VBUS is a 3.3 volt input. A resistor divider must be used if connecting
to 5 volts of USB power.
RBIAS
47
I-R
USB Transceiver Bias
A 12.0 k 1.0% resistor is attached from VSS to this pin in order to
set the transceiver's internal bias currents.
XTAL1 (CLKIN)
45
ICLKx
24 MHz Crystal Input or External clock Input
This pin can be connected to one terminal of the crystal or it can be
connected to an external 24 MHz 1.8 V clock when a crystal is not
used.
2015-2021 Microchip Technology Inc.
DS00001947C-page 15
USB2640/USB2641
TABLE 6-1:
USB2640/USB2641 PIN DESCRIPTIONS (CONTINUED)
Symbol
48-Pin
QFN
Buffer Type
(Table 6-2)
XTAL2
44
OCLKx
Description
24 MHz Crystal Output
This is the other terminal of the crystal, or it is left open when an
external clock source is used to drive XTAL1(CLKIN).
SPI INTERFACE
SPI_CE_n
8
O12
SPI Chip Enable
This is the active low chip enable output.
When the SPI interface is enabled, drive this pin high in power down
states.
SPI_CLK /
9
I/O12
SPI Clock
This is the SPI clock out to the serial ROM. See Section 6.4, "ROM
BOOT Sequence" for diagram and usage instructions. During reset,
drive this pin low.
When configured, this is the I2C EEPROM clock pin.
SCL
SPI_DO /
10
I/O12
SPI Data Out
This is the data out for the SPI port. See Section 6.4, "ROM BOOT
Sequence" for diagram and usage instructions.
SDA /
This pin is the data pin when the device is connected to the optional
I2C EEPROM.
SPI_SPD_SEL
This pin is used to select the speed of the SPI interface. During
nRESET assertion, this pin will be tri-stated with the weak pull-down
resistor enabled. When nRESET is negated, the value on the pin will
be internally latched, and the pin will revert to SPI_DO functionality, the
internal pull-down will be disabled.
‘0’ = 30 MHz (No external resistor should be applied)
‘1’ = 60 MHz (A 10 K external pull-up resistor must be applied)
If the latched value is '1', then the pin is tri-stated when the chip is in
the suspend state.
If the latched value is '0', then the pin is driven low during a suspend
state.
SPI_DI
11
I/O12PD
SPI Data In
This is the data in to the controller from the ROM. This pin has a weak
internal pull-down applied at all times to prevent floating.
MISC
LED
37
NC
36
CRD_PWR
35
I/O12
It can be used as media activities LED output.
I/O200
Card power drive: 3.3 V (100 mA or 200 mA)
This pin powers the multiplexed flash media interface (slot) for xD, MS,
and SD/MMC. If card power is not being used to power the multiplexed
flash media interface, this pin may be used as a GPIO.
It is a requirement for this to be the only FET used to power xD-Picture
Card devices. Failure to do this will violate xD voltage specification on
xD-Picture Card device pins.
Bits 0, 1, 2, and 3 control FET 2 of Register A5h. Please reference
Section 7.3.4.5, "A8h: LED Blink Interval (1 byte)," on page 30.
DS00001947C-page 16
2015-2021 Microchip Technology Inc.
USB2640/USB2641
TABLE 6-1:
USB2640/USB2641 PIN DESCRIPTIONS (CONTINUED)
Symbol
48-Pin
QFN
Buffer Type
(Table 6-2)
nRESET
38
IS
Description
RESET Input
The system uses this active low signal to reset the chip. The active low
pulse should be at least 1 s wide.
TEST
40
NC
22
26
27
28
I
TEST Input
Tie this pin to ground for normal operation.
No Connects
No connect pins only apply to the USB2641. No trace or signal should
be routed or attached to these pins.
DIGITAL / POWER / GROUND
CRFILT
15
VDD Core Regulator Filter Capacitor
This pin must have a 1.0 F (or greater) 20% (ESR
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