USB3813
USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for
Portable Applications
Highlights
Additional Features
• Hub Controller IC with 3 downstream ports
• High-Speed Inter-Chip (HSIC) support
- 1 downstream HSIC port
• USB-IF Battery Charger revision 1.2 support on
up & downstream ports (DCP, CDP, SDP)
• Battery charging support for Apple devices
• FlexConnect: Downstream port 1 able to swap
with upstream port, allowing master capable
devices to control other devices on the hub
• USB to I2C/SPI bridge endpoint support
• USB Link Power Management (LPM) support
• SUSPEND pin for remote wakeup indication to
host
• Vendor Specific Messaging (VSM) support
• Enhanced OEM configuration options available
through OTP or SMBus Slave Port
• Flexible power rail support
- VBUS or VBAT only operation
- 3.3V only operation
- VBAT + 1.8V operation
- 3.3V + 1.8V operation
• 30-ball (2.9x2.5mm) WLCSP, RoHS compliant
package
• MultiTRAK™
- Dedicated Transaction Translator per port
• PortMap
- Configurable port mapping and disable
sequencing
• PortSwap
- Configurable differential intra-pair signal
swapping
• PHYBoost™
- Programmable USB transceiver drive
strength for recovering signal integrity
• VariSense™
- Programmable USB receiver sensitivity
• Low power operation
• Full Power Management with individual or ganged
power control of each downstream port
• Built-in Self-Powered or Bus-Powered internal
default settings provide flexibility in the quantity of
USB expansion ports utilized without redesign
• Supports “Quad Page” configuration OTP flash
- Four consecutive 200 byte configuration
pages
• Fully integrated USB termination and Pull-up/Pulldown resistors
• On-chip Power On Reset (POR)
• Internal 3.3V and 1.2V voltage regulators
• On Board 24MHz Crystal Driver, Resonator, or
External 24MHz clock input
• Environmental
- Commercial temperature range support (0ºC
to 70ºC)
- Industrial temperature range support (-40ºC
to 85ºC)
Target Applications
•
•
•
•
•
•
•
•
•
•
Mobile phones
Tablets
Ultrabooks
Digital still cameras
Digital video camcorders
Gaming consoles
PDAs
Portable media players
GPS personal navigation devices
Media players/viewers
2012 - 2019 Microchip Technology Inc.
DS00001715C-page 1
USB3813
TO OUR VALUED CUSTOMERS
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The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
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To determine if an errata sheet exists for a particular device, please check with one of the following:
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DS00001715C-page 2
2012 - 2019 Microchip Technology Inc.
USB3813
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 Acronyms and Definitions ............................................................................................................................................................... 6
3.0 Ball Descriptions ............................................................................................................................................................................. 7
4.0 Power Connections ....................................................................................................................................................................... 13
5.0 Modes of Operation ...................................................................................................................................................................... 15
6.0 Device Configuration ..................................................................................................................................................................... 19
7.0 Device Interfaces .......................................................................................................................................................................... 22
8.0 Functional Descriptions ................................................................................................................................................................. 29
9.0 Operational Characteristics ........................................................................................................................................................... 35
10.0 Package Outline
................................................................................................................................................................................................... 43
Appendix A: Data sheet Revision History ........................................................................................................................................... 45
The Microchip Web Site ...................................................................................................................................................................... 46
Customer Change Notification Service ............................................................................................................................................... 46
Customer Support ............................................................................................................................................................................... 46
Product Identification System ............................................................................................................................................................. 47
2012 - 2019 Microchip Technology Inc.
DS00001715C-page 3
USB3813
1.0
INTRODUCTION
The USB3813 is a low-power, OEM configurable, MTT (Multi-Transaction Translator) USB 2.0 hub controller with 3
downstream ports and advanced features for embedded USB applications. The USB3813 is fully compliant with the
USB 2.0 Specification, USB 2.0 Link Power Management Addendum, High-Speed Inter-Chip (HSIC) USB Electrical
Specification Revision 1.0, and will attach to an upstream port as a Full-Speed hub or as a Full-/Hi-Speed hub. The 3port hub supports Low-Speed, Full-Speed, and Hi-Speed (if operating as a Hi-Speed hub) downstream devices on all of
the enabled downstream (non-HSIC) ports. HSIC ports support only Hi-Speed operation.
The USB3813 has been specifically optimized for mobile embedded applications. The pin-count has been reduced by
optimizing the USB3813 for mobile battery-powered embedded systems where power consumption, small package
size, and minimal BOM are critical design requirements. Standby mode power has been minimized and reference clock
inputs can be aligned to the customer’s specific mobile application. Flexible power rail options ease integration into
energy efficient designs by allowing the USB3813 to be powered in a single-source (VBUS, VBAT, 3.3V) or a dualsource (VBAT + 1.8, 3.3V + 1.8) configuration. Additionally, all required resistors on the USB ports are integrated into
the hub, including all series termination and pull-up/pull-down resistors on the D+ and D– pins.
The USB3813 supports both upstream battery charger detection and downstream battery charging. The USB3813 integrated battery charger detection circuitry supports the USB-IF Battery Charging (BC1.2) detection method and most
Apple devices. These circuits are used to detect the attachment and type of a USB charger and provide an interrupt
output to indicate charger information is available to be read from the device’s status registers via the serial interface.
The USB3813 provides the battery charging handshake and supports the following USB-IF BC1.2 charging profiles:
•
•
•
•
DCP: Dedicated Charging Port (Power brick with no data)
CDP: Charging Downstream Port (1.5A with data)
SDP: Standard Downstream Port (0.5A with data)
Custom profiles loaded via SMBus or OTP
The USB3813 provides an additional USB endpoint dedicated for use as a USB to I2C/SPI interface, allowing external
circuits or devices to be monitored, controlled, or configured via the USB interface. Additionally, the USB3813 includes
many powerful and unique features such as:
FlexConnect, which provides flexible connectivity options. The USB3813’s downstream port 1 can be swapped with
the upstream port, allowing master capable devices to control other devices on the hub.
MultiTRAK™ Technology, which utilizes a dedicated Transaction Translator (TT) per port to maintain consistent fullspeed data throughput regardless of the number of active downstream connections. MultiTRAKTM outperforms conventional USB 2.0 hubs with a single TT in USB full-speed data transfers.
PortMap, which provides flexible port mapping and disable sequences. The downstream ports of a USB3813 hub can
be reordered or disabled in any sequence to support multiple platform designs with minimum effort. For any port that is
disabled, the USB3813 hub controllers automatically reorder the remaining ports to match the USB host controller’s port
numbering scheme.
PortSwap, which adds per-port programmability to USB differential-pair pin locations. PortSwap allows direct alignment
of USB signals (D+/D-) to connectors to avoid uneven trace length or crossing of the USB differential signals on the
PCB.
PHYBoost, which provides programmable levels of Hi-Speed USB signal drive
strength in the downstream port transceivers. PHYBoost attempts to restore USB signal integrity in a compromised system environment. The graphic on the right shows
an example of Hi-Speed USB eye diagrams before and after PHYBoost signal integrity restoration.
VariSense, which controls the USB receiver sensitivity enabling programmable levels of USB signal receive sensitivity. This capability allows operation in a sub-optimal
system environment, such as when a captive USB cable is used.
The USB3813 is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C) temperature range versions.
DS00001715C-page 4
2012 - 2019 Microchip Technology Inc.
USB3813
1.1
Block Diagram
Figure 1-1 details the internal block diagram of the USB3813.
FIGURE 1-1:
SYSTEM BLOCK DIAGRAM
Up or Downstream
USB
ResetN
VBAT
VDDCOREREG
VDDCR12
To I2C Master/Slave
or EEPROM
Sda Scl
VDD33
IntN
Serial
Interface
1.2V Reg
SIE
Upstream
Hub Logic
& Repeater
MultiTT
Controller
Port Controller
Routing & Port Re-Ordering Logic
HSIC
Swap
Port
USB
Port
USB
Port
PLL
RefSel
CPU
COMPLEX
JTAG
Upstream
Battery
Charger
Detection
PrtPwr/OCS/Suspend/LED/IRQ_IN
Flex
PHY
USB
3.3V Reg
HubConnect
AddrSel
ChgDetN
RefClk
HSIC
USB
USB
Down or
Upstream
Downstream
Downstream
2012 - 2019 Microchip Technology Inc.
JTAG/
SPI/
GPIO
DS00001715C-page 5
USB3813
2.0
ACRONYMS AND DEFINITIONS
2.1
Acronyms
EOP:
End of Packet
EP:
Endpoint
FS:
Full-Speed
GPIO:
General Purpose I/O (that is input/output to/from the device)
HS:
Hi-Speed
HSOS: High Speed Over Sampling
HSIC:
2
High-Speed Inter-Chip
I C:
Inter-Integrated Circuit
LS:
Low-Speed
OTP:
One Time Programmable
PCB:
Printed Circuit Board
PCS:
Physical Coding Sublayer
PHY:
Physical Layer
SMBus: System Management Bus
UUID:
Universally Unique IDentification
2.2
Reference Documents
1.
2.
3.
4.
5.
6.
UNICODE UTF-16LE For String Descriptors USB Engineering Change Notice, December 29th, 2004, http://
www.usb.org
Universal Serial Bus Specification, Revision 2.0, April 27th, 2000, http://www.usb.org
Battery Charging Specification, Revision 1.2, Dec. 07, 2010, http://www.usb.org
High-Speed Inter-Chip USB Electrical Specification, Version 1.0, Sept. 23, 2007, http://www.usb.org
I2C-Bus Specification, Version 1.1, http://www.nxp.com
System Management Bus Specification, Version 1.0, http://smbus.org/specs
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2012 - 2019 Microchip Technology Inc.
USB3813
3.0
BALL DESCRIPTIONS
FIGURE 3-1:
30-WLCSP PIN ASSIGNMENTS
1
2
3
4
5
6
A
SUSPEND/
IRQ_N/
INT_N
DP0
DM0
REFCLK
VDDCORE
REG
VDDCR12
B
HUB_CONN
RESET_N
GND
VDD33
VBAT
STRB1
C
REFSEL0
SCL/
SMBCLK
RBIAS
GND
DATA1
DP2
D
SDA/
SMBDATA
SPI_CLK
CHRGDET0
DM2
DP3
E
SPI_CE_N
SPI_DI
CHRGDET1
DM3
REFSEL1
SPI_DO/
SPI_SPD_SEL
PRTCTLA
Top of USB3813 Package
2012 - 2019 Microchip Technology Inc.
DS00001715C-page 7
USB3813
3.1
Ball Descriptions
This section provides a detailed description of each ball. The signals are arranged in functional groups according to their
associated interface.
The “_N” symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage
level. For example, RESET_N indicates that the reset signal is active low. When “_N” is not present after the signal
name, the signal is asserted when at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of
“active low” and “active high” signals. The term assert, or assertion, indicates that a signal is active, independent of
whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is inactive.
Note:
The buffer type for each signal is indicated in the BUFFER TYPE column of Table 3-1. A description of the
buffer types is provided in Section 3.3.
TABLE 3-1:
BALL DESCRIPTIONS
Buffer
Type
Num Balls
Name
Symbol
Description
DP0
AIO
1
Upstream USB
D+
(Flex Port 0)
Upstream USB Port 0 D+ data signal.
Note:
The upstream Port 0 signals can be
optionally swapped with the downstream Port 1 signals.
DM0
AIO
1
Upstream USB
D(Flex Port 0)
Upstream USB Port 0 D- data signal.
Note:
The upstream Port 0 signals can be
optionally swapped with the downstream Port 1 signals.
DATA1
HSIC
1
Downstream
HSIC Data
(Swap Port 1)
Downstream HSIC Port 1 DATA signal.
Note:
The downstream Port 1 signals can be
optionally swapped with the upstream
Port 0 signals.
STRB1
HSIC
1
Downstream
HSIC Strobe
(Swap Port 1)
Downstream HSIC Port 1 STROBE signal.
Note:
The downstream Port 1 signals can be
optionally swapped with the upstream
Port 0 signals.
1
Downstream
USB D+
(Port 2)
DP2
AIO
Downstream USB Port 2 D+ data signal.
1
Downstream
USB D(Port 2)
DM2
AIO
Downstream USB Port 2 D- data signal.
1
Downstream
USB D+
(Port 3)
DP3
AIO
Downstream USB Port 3 D+ data signal.
1
Downstream
USB D(Port 3)
DM3
AIO
Downstream USB Port 3 D- data signal.
I2C Serial
Clock Input
SCL
SMBus Clock
SMBCLK
I_SMB
SDA
IS/OD8
I2C bidirectional serial data.
SMBDATA
IS/OD8
SMBus bidirectional serial data.
USB/HSIC INTERFACES
1
1
I2C Serial Data
SMBus Serial
Data
DS00001715C-page 8
I2C/SMBUS INTERFACE
I_SMB
I2C serial clock input.
SMBus serial clock input.
2012 - 2019 Microchip Technology Inc.
USB3813
TABLE 3-1:
BALL DESCRIPTIONS (CONTINUED)
Buffer
Type
Num Balls
Name
Symbol
Description
1
SPI Chip
Enable Output
SPI_CE_N
O12
Active-low SPI chip enable output.
Note:
If the SPI is enabled, this pin will be
driven high in powerdown states.
SPI Clock
Output
SPI_CLK
O12
SPI clock output
SPI Data
Output
SPI_DO
O12
SPI data output
SPI Speed
Select
Configuration
Strap
SPI_SPD_SEL
IS
(PD)
This strap is used to select the speed of the SPI.
SPI MASTER INTERFACE
1
1
0 = 30MHz (default)
1 = 60MHz
Note:
If the latched value on reset is 1, this pin
is tri-stated when the chip is in the suspend state. If the latched value on reset
is 0, this pin is driven low during a suspend state.
See Note 3-1 for more information on configuration
straps.
1
SPI Data Input
SPI_DI
IS
(PD)
SPI data input
MISC.
Reference
Clock Input
REFCLK
ICLK
1
This signal is the reference clock input. The clock
input frequency is configured via REFSEL[1:0].
Refer to Section 8.4, "Reference Clock," on
page 33 for additional information.
REFSEL0
IS
1
Reference
Clock Select 0
Input
This signal, combined with REFSEL1, selects the
reference clock input frequency. The reference
select input must be set to correspond to the
frequency applied to the REFCLK input. Refer to
Section 8.4, "Reference Clock," on page 33 for
additional information.
REFSEL1
IS
1
Reference
Clock Select 1
Input
This signal, combined with REFSEL0, selects the
reference clock input frequency. The reference
select input must be set to correspond to the
frequency applied to the REFCLK input. Refer to
Section 8.4, "Reference Clock," on page 33 for
additional information.
System Reset
Input
RESET_N
I_RST
This active-low signal allows external hardware to
reset the device.
Note:
The active-low pulse must be at least
5us wide. Refer to Section 8.3.2, "External Chip Reset (RESET_N)," on
page 32 for additional information.
External USB
Transceiver
Bias Resistor
RBIAS
AI
A 12.0k (+/- 1%) resistor is attached from ground
to this pin to set the transceiver’s internal bias
settings.
1
1
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DS00001715C-page 9
USB3813
TABLE 3-1:
Num Balls
BALL DESCRIPTIONS (CONTINUED)
Name
Symbol
Buffer
Type
Hub Connect
Input
HUB_CONN
IS
Description
This signal is used to control the hub
communication stage. The device will transition to
the hub communications stage when this pin is
asserted high. Two methods of use may be used:
Tie to +3.3V: The hub will automatically transition
to the communications stage when configuration is
complete.
1
Transition from low to high: The hub will
transition to the communications stage after
configuration is complete and this signal transitions
from low to high.
Refer to Section 8.5, "Hub Connect
(HUB_CONN)," on page 33 for additional
information.
Charge Detect
0 Output
CHRGDET0
O8
This signal, in conjunction with CHRGDET1, can
be configured to communicate information that can
affect the level of current that the system may draw
from the upstream USB VBUS wire. Refer to
Section 8.1.1.1, "Charger Detection
(CHRGDET[1:0])," on page 30 for additional
information.
Charge Detect
1 Output
CHRGDET1
O8
This signal, in conjunction with CHRGDET0, can
be configured to communicate information that can
affect the level of current that the system may draw
from the upstream USB VBUS wire. Refer to
Section 8.1.1.1, "Charger Detection
(CHRGDET[1:0])," on page 30 for additional
information.
Suspend
Output
SUSPEND
PU
This signal is used to indicate that the entire hub
has entered the USB suspend state and that
VBUS current consumption should be reduced in
accordance with the USB specification. Refer to
Section 8.7, "Suspend (SUSPEND)," on page 34
for additional information.
Note:
SUSPEND must be enabled via the
Protouch configuration tool.
Interrupt
Request Input
IRQ_N
IS
This active-low signal allows external hardware to
interrupt the device. Refer to Section 8.8, "Interrupt
Requests (IRQ_N)," on page 34 for additional
information.
Interrupt
Output
INT_N
OD8
This active-low signal allows the device to output
an interrupt to external hardware. Refer to Section
8.9, "Interrupt Output (INT_N)," on page 34 for
additional information.
USB Port
Control
PRTCTLA
OD8/IS
(PU)
1
1
1
1
This pin functions as both the downstream USB
port power enable output (PRTPWRA) and the
downstream USB port over-current sense input
(OCSA_N).
POWER
Battery Power
Supply Input
1
DS00001715C-page 10
VBAT
P
Battery power supply input. When VBAT is
connected directly to a +3.3V supply from the
system, the internal +3.3V regulator runs in
dropout and regulator power consumption is
eliminated. A 4.7 F (