VN0550
N-Channel Enhancement-Mode Vertical DMOS FET
Features
General Description
•
•
•
•
•
•
•
The VN0550 Enhancement-mode (normally-off)
transistor uses a vertical DMOS structure and a
well-proven silicon-gate manufacturing process. This
combination produces a device with the power
handling capabilities of bipolar transistors and the high
input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally induced secondary breakdown.
Free from Secondary Breakdown
Low Power Drive Requirement
Ease of Paralleling
Low CISS and Fast Switching Speeds
Excellent Thermal Stability
Integral Source-Drain Diode
High Input Impedance and High Gain
Applications
•
•
•
•
•
•
Microchip’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications
where very low threshold voltage, high breakdown
voltage, high input impedance, low input capacitance
and fast switching speeds are desired.
Motor Controls
Converters
Amplifiers
Switches
Power Supply Circuits
Drivers (Relays, Hammers, Solenoids, Lamps,
Memories, Displays, Bipolar Transistors, etc.)
Package Type
3-lead TO-92
(Top view)
DRAIN
SOURCE
GATE
See Table 3-1 for pin information.
2018 Microchip Technology Inc.
DS20005978A-page 1
VN0550
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Drain-to-Source Voltage ...................................................................................................................................... BVDSS
Drain-to-Gate Voltage ......................................................................................................................................... BVDGS
Gate-to-Source Voltage ......................................................................................................................................... ±20V
Operating Ambient Temperature, TA ................................................................................................... –55°C to +150°C
Storage Temperature, TS ..................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless
otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle
Parameter
Sym.
Min.
Drain-to-Source Breakdown Voltage
BVDSS
500
—
—
V
VGS = 0V, ID = 1 mA
Gate Threshold Voltage
VGS(th)
2
—
4
V
VGS = VDS, ID = 1 mA
∆VGS(th)
—
–3.8
–5
mV/°C
VGS = VDS, ID = 1 mA
(Note 1)
IGSS
—
—
100
nA
VGS = ±20V, VDS = 0V
—
—
10
µA
VGS = 0V,
VDS = Maximum rating
—
—
1
mA
VDS = 0.8 Maximum rating,
VGS = 0V, TA = 125°C
(Note 1)
—
100
—
mA
VGS = 5V, VDS = 25V
150
350
—
mA
VGS = 10V, VDS = 25V
Change in VGS(th) with Temperature
Gate Body Leakage Current
Zero-Gate Voltage Drain Current
On-State Drain Current
Static Drain-to-Source On-State Resistance
Change in RDS(ON) with Temperature
Note 1:
Typ. Max.
Unit
IDSS
ID(ON)
RDS(ON)
∆RDS(ON)
Conditions
—
45
—
Ω
VGS = 5V, ID = 50 mA
—
40
60
Ω
VGS = 10V, ID = 50 mA
—
1
1.7
%/°C
VGS = 10V, ID = 50 mA
(Note 1)
Specification is obtained by characterization and is not 100% tested.
DS20005978A-page 2
2018 Microchip Technology Inc.
VN0550
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. Specification is obtained by characterization and
is not 100% tested.
Parameter
Sym.
Min.
Typ.
Max.
Forward Transconductance
GFS
50
100
—
Input Capacitance
CISS
—
45
55
pF
Common Source Output Capacitance
COSS
—
8
10
pF
Reverse Transfer Capacitance
CRSS
—
2
5
pF
Turn-On Delay Time
td(ON)
—
—
10
ns
tr
—
—
15
ns
td(OFF)
—
—
10
ns
tf
—
—
10
ns
VSD
—
0.8
—
V
VGS = 0V, ISD = 500 mA (Note 1)
trr
—
300
—
ns
VGS = 0V, ISD = 500 mA
Rise Time
Turn-Off Delay Time
Fall Time
Unit
Conditions
mmho VDS = 25V, ID = 50 mA
VGS = 0V,
VDS = 25V,
f = 1 MHz
VDD = 25V,
ID = 150 mA,
RGEN = 25Ω
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
Note 1:
Unless otherwise stated, all DC parameters are 100% tested at 25°C. Pulse test: 300 µs pulse, 2% duty
cycle
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ. Max.
Unit
Operating Ambient Temperature
TA
–55
—
+150
°C
Storage Temperature
TS
–55
—
+150
°C
JA
—
132
—
°C/W
Conditions
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
3-lead TO-92
THERMAL CHARACTERISTICS
Package
ID (Note 1)
(Continuous)
(mA)
ID
(Pulsed)
(mA)
Power Dissipation
at TA = 25°C
(W)
IDR (Note 1)
(mA)
IDRM
(mA)
50
250
1
50
250
3-lead TO-92
Note 1:
ID (continuous) is limited by maximum rated TJ.
2018 Microchip Technology Inc.
DS20005978A-page 3
VN0550
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g. outside specified power supply range) and therefore outside the warranted range.
0.5
0.25
VGS = 10V
8.0V
0.4
VGS = 10V
0.20
8.0V
6.0V
0.3
ID (amperes)
ID (amperes)
6.0V
0.2
0.15
0.10
0.05
0.1
4V
4.0V
0
0
10
20
30
40
0
0
50
2.0
4.0
FIGURE 2-1:
0.40
6.0
8.0
10
VDS (volts)
VDS (volts)
Output Characteristics.
FIGURE 2-4:
Saturation Characteristics.
2.0
VDS = 25V
TA = -55OC
0.24
PD (watts)
GFS (siemenns)
0.32
25OC
0.16
TO-92
1.0
125OC
0.08
0
0
0.1
0.2
0.3
0.4
0
0.5
0
25
50
ID (amperes)
FIGURE 2-2:
Current.
Transconductance vs. Drain
FIGURE 2-5:
Temperature.
1.0
100
125
150
Power Dissipation vs. Case
1.0
Thermal Resistance (normalized)
ID (amperes)
75
TC (OC)
0.1
TO-92 (DC)
0.01
0.8
0.6
0.4
TO-92
PD = 1.0W
TC = 25OC
0.2
TC = 25OC
0.001
1.0
10
100
1000
0
0
FIGURE 2-3:
Operating Area.
DS20005978A-page 4
Maximum Rated Safe
0.01
0.1
1.0
10
tP (seconds)
VDS (volts)
FIGURE 2-6:
Characteristics.
Thermal Response
2018 Microchip Technology Inc.
VN0550
100
1.1
RDS(ON) (Ω)
BVDSS (normalized)
80
1.0
VGS = 5.0V
VGS = 10V
60
40
20
0.9
-50
0
50
100
0
0
150
0.1
0.2
O
Tj ( C)
FIGURE 2-7:
Temperature.
0.5
0.3
0.4
0.5
ID (amperes)
FIGURE 2-10:
Current.
BVDSS Variation with
VDS = 25V
On-Resistance vs. Drain
1.4
1.8
RDS(ON) @ 10V, 50mA
25OC
VGS(th) (normalized)
ID (amperes)
TA = -55OC
0.3
150OC
0.2
1.2
1.4
1.0
1.0
V(th) @ 1.0mA
0.8
0.6
0.6
0.2
RDS(ON) (normalized)
0.4
0.1
0
0
2.0
4.0
6.0
8.0
10
-50
0
50
FIGURE 2-8:
100
150
Tj (OC)
VGS (volts)
Transfer Characteristics.
FIGURE 2-11:
Temperature.
V(th) and RDS Variation with
10
100
VDS = 10V
f = 1MHz
8.0
105 pF
VGS (volts)
C (picofarads)
75
50
CISS
6.0
VDS = 40V
4.0
112 pF
25
2.0
COSS
50 pF
CRSS
0
0
0
10
20
30
40
0
VDS (volts)
FIGURE 2-9:
Capacitance vs.
Drain-to-Source Voltage.
2018 Microchip Technology Inc.
0.2
0.4
0.6
0.8
1.0
QG (nanocoulombs)
FIGURE 2-12:
Characteristics.
Gate Drive Dynamic
DS20005978A-page 5
VN0550
3.0
PIN DESCRIPTION
The details on the pins of VN0550 are listed in
Table 3-1. Refer to Package Type for the location of
pins.
TABLE 3-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
Source
2
Gate
Gate
3
Drain
Drain
DS20005978A-page 6
Source
2018 Microchip Technology Inc.
VN0550
4.0
FUNCTIONAL DESCRIPTION
Figure 4-1 illustrates the switching waveforms and test
circuit for VN0550.
10V
VDD
90%
Pulse
Generator
INPUT
10%
0V
t(ON)
t(OFF)
tr
td(ON)
VDD
td(OFF)
0V
RGEN
10%
90%
FIGURE 4-1:
TABLE 4-1:
OUTPUT
tf
10%
OUTPUT
RL
INPUT
D.U.T.
90%
Switching Waveforms and Test Circuit.
PRODUCT SUMMARY
BVDSS/BVDGS
(V)
RDS(ON)
(Maximum)
(Ω)
IDSS
(Minimum)
(mA)
500
60
150
2018 Microchip Technology Inc.
DS20005978A-page 7
VN0550
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005978A-page 8
3-lead TO-92
Example
XXXXXX
XX e3
YWWNNN
VN0550
N3 e3
807358
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2018 Microchip Technology Inc.
VN0550
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2018 Microchip Technology Inc.
DS20005978A-page 9
VN0550
NOTES:
DS20005978A-page 10
2018 Microchip Technology Inc.
VN0550
APPENDIX A:
REVISION HISTORY
Revision A (October 2018)
• Converted Supertex Doc# DSFP-VN0550 to
Microchip DS20005978A
• Added a pin function table
• Changed the package marking format
• Removed the 3-Lead TO-92 N3 P002, P003,
P005, and P014 media types
• Made minor text changes throughout the
document
2018 Microchip Technology Inc.
DS20005978A-page 11
VN0550
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
XX
PART NO.
-
Package
Options
Device
X
-
Environmental
X
Media Type
Device:
VN0550
=
N-Channel Enhancement-Mode Vertical
DMOS FET
Package:
N3
=
3-lead TO-92
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Types:
(blank)
=
1000/Bag for an N3 Package
P013
=
2000/Ammo Pack for an N3 Package
DS20005978A-page 12
Examples:
a) VN0550N3-G:
N-Channel EnhancementMode, Vertical DMOS FET,
3-lead TO-92, 1000/Bag
b) VN0550N3-G-P013:
N-Channel EnhancementMode, Vertical DMOS FET,
3-lead TO-92, 2000/Ammo
Pack
2018 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
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Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
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Information contained in this publication regarding device
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and may be superseded by updates. It is your responsibility to
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© 2018, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-3686-7
== ISO/TS 16949 ==
2018 Microchip Technology Inc.
DS20005978A-page 13
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DS20005978A-page 14
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08/15/18
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