VN10K
N-Channel Enhancement-Mode Vertical DMOS FET
Features
General Description
•
•
•
•
•
•
•
The VN10K Enhancement-mode (normally-off)
transistors uses a vertical DMOS structure and a
well-proven silicon-gate manufacturing process. This
combination produces a device with the power
handling capabilities of bipolar transistors and the high
input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally induced secondary breakdown.
Free from Secondary Breakdown
Low Power Drive Requirement
Ease of Paralleling
Low CISS and Fast Switching Speeds
Excellent Thermal Stability
Integral Source-Drain Diode
High Input Impedance and High Gain
Applications
•
•
•
•
•
•
Microchip’s vertical DMOS FETs are ideally suited for a
wide range of switching and amplifying applications
where very low threshold voltage, high breakdown
voltage, high input impedance, low input capacitance,
and fast switching speeds are desired.
Motor Controls
Converters
Amplifiers
Switches
Power Supply Circuits
Drivers (Relays, Hammers, Solenoids, Lamps,
Memories, Displays, Bipolar Transistors, etc.)
Package Type
3-lead TO-92
(Top view)
DRAIN
SOURCE
GATE
See Table 3-1 for pin information.
2021 Microchip Technology Inc.
DS20005983A-page 1
VN10K
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Drain-to-Source Voltage ...................................................................................................................................... BVDSS
Drain-to-Gate Voltage ......................................................................................................................................... BVDGS
Gate-to-Source Voltage ......................................................................................................................................... ±30V
Operating Ambient Temperature, TA ................................................................................................... –55°C to +150°C
Storage Temperature, TS ..................................................................................................................... –55°C to +150°C
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only, and functional operation of the device at those or any other conditions above those
indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for
extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless
otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle
Parameter
Sym.
Min.
Typ. Max.
Unit
Conditions
Drain-to-Source Breakdown Voltage
BVDSS
60
—
—
V
VGS = 0V, ID = 100 µA
Gate Threshold Voltage
VGS(th)
0.8
—
2.5
V
VGS = VDS, ID = 1 mA
ΔVGS(th)
—
–3.8
—
mV/°C
VGS = VDS, ID = 1 mA
(Note 1)
IGSS
—
—
100
nA
VGS = 15V, VDS = 0V
—
—
10
µA
VGS = 0V, VDS = 45V
—
—
500
µA
VGS = 0V, VDS = 45V,
TA = 125°C (Note 1)
0.75
—
—
A
VGS = 10V, VDS = 10V
—
—
7.5
Ω
VGS = 5V, ID = 200 mA
—
—
5
Ω
VGS = 10V, ID = 500 mA
—
0.7
—
%/°C
VGS = 10V, ID = 500 mA
(Note 1)
Change in VGS(th) with Temperature
Gate Body Leakage Current
Zero-Gate Voltage Drain Current
On-State Drain Current
Static Drain-to-Source On-State Resistance
Change in RDS(ON) with Temperature
Note 1:
IDSS
ID(ON)
RDS(ON)
ΔRDS(ON)
Specification is obtained by characterization and is not 100% tested.
DS20005983A-page 2
2021 Microchip Technology Inc.
VN10K
AC ELECTRICAL CHARACTERISTICS
Electrical Specifications: TA = 25°C unless otherwise specified. All AC parameters are not 100% sample tested.
Parameter
Sym.
Min.
Typ.
Max.
Unit
Forward Transconductance
GFS
100
—
—
Input Capacitance
CISS
—
48
60
pF
Common-Source Output Capacitance
COSS
—
16
25
pF
Reverse Transfer Capacitance
CRSS
—
2
5
pF
Turn-On Time
t(ON)
—
—
10
ns
Turn-Off Time
t(OFF)
—
—
10
ns
VSD
—
0.8
—
V
VGS = 0V, ISD = 500 mA (Note 1)
trr
—
160
—
ns
VGS = 0V, ISD = 500 mA
mmho VDS = 10V, ID = 500 mA
DIODE PARAMETER
Diode Forward Voltage Drop
Reverse Recovery Time
Note 1:
Conditions
VGS = 0V,
VDS = 25V,
f = 1 MHz
VDD = 15V,
ID = 600 mA,
RGEN = 25Ω
Unless otherwise stated, all DC parameters are 100% tested at 25°C. Pulse test: 300 µs pulse, 2% duty
cycle
TEMPERATURE SPECIFICATIONS
Parameter
Sym.
Min.
Typ. Max.
Unit
Operating Ambient Temperature
TA
–55
—
+150
°C
Storage Temperature
TS
–55
—
+150
°C
JA
—
132
—
°C/W
Conditions
TEMPERATURE RANGE
PACKAGE THERMAL RESISTANCE
3-lead TO-92
THERMAL CHARACTERISTICS
Package
ID (Note 1)
(Continuous)
(mA)
ID
(Pulsed)
(A)
Power Dissipation
at TA = 25°C
(W)
IDR (Note 1)
(mA)
IDRM
(A)
310
1
1
310
1
3-lead TO-92
Note 1:
ID (continuous) is limited by maximum rated TJ.
2021 Microchip Technology Inc.
DS20005983A-page 3
VN10K
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g. outside specified power supply range) and therefore outside the warranted range.
1.0
VGS = 10V
8V
1.0
7V
VGS = 10V
7V
9V
0.8
0.8
8V
ID (amperes)
ID (amperes)
6V
0.6
5V
0.4
6V
0.6
5V
0.4
4V
0.2
4V
0.2
3V
3V
2V
2V
0
0
0
10
20
30
40
50
0
2.0
4.0
VDS (volts)
FIGURE 2-1:
6.0
8.0
10
VDS (volts)
Output Characteristics.
FIGURE 2-4:
250
Saturation Characteristics.
2.0
150
PD (watts)
Ω
GFS (m )
200
100
TO-92
1.0
VDS = 10V
300µs, 2%
Duty Cycle,
Pulse Test
50
0
0
0
200
400
600
800
0
1000
25
50
ID (mA)
FIGURE 2-2:
Current.
Transconductance vs. Drain
FIGURE 2-5:
Temperature.
100
125
150
Power Dissipation vs. Case
10
Output Voltage
(volts)
10
O
TC = 25 C
1.0
5.0
0
TO-92 (DC)
Input Voltage
(volts)
ID (amperes)
75
TC (OC)
0.1
0.01
1.0
10
100
1000
15
10
5.0
0
0
VDS (volts)
FIGURE 2-3:
Operating Area.
DS20005983A-page 4
Maximum Rated Safe
10
20
30
40
50
t – Time (ns)
FIGURE 2-6:
Switching Waveform.
2021 Microchip Technology Inc.
VN10K
100
VDS = 0.1V
RDS(ON) (ohms)
BVDSS (normalized)
1.1
1.0
10
0.9
-50
0
50
100
1.0
1.0
150
10
Tj (OC)
FIGURE 2-7:
Temperature.
FIGURE 2-10:
On-Resistance vs.
Gate-to-Source Current.
BVDSS Variation with
1.0
1.0
VDS = 25V
80µs, 1%
Duty Cycle,
Pulse Test
VDS = 10V
300µs, 2%
Duty Cycle,
Pulse Test
GFS (mhos)
ID (amperes)
0.8
100
VGS (volts)
0.6
0.4
Reduction
Due to
Heating
0.1
0.2
0
0
2.0
4.0
6.0
8.0
0.01
0.01
10
0.1
FIGURE 2-8:
Transfer Characteristics.
FIGURE 2-11:
Drain Current.
Output Conductance vs.
250
50
CISS
30
150
Gfs (m )
40
200
Ω
C (picofarads)
1.0
ID (amperes)
VGS (volts)
20
COSS
10
VDS = 10V
3000µs, 2%
Duty Cycle
Pulse Test
100
50
CRSS
0
0
10
20
30
40
VDS (volts)
FIGURE 2-9:
Capacitance vs.
Drain-to-Source Voltage.
2021 Microchip Technology Inc.
50
0
0
2.0
4.0
6.0
8.0
10
VGS (volts)
FIGURE 2-12:
Transconductance vs.
Gate-to-Source Voltage.
DS20005983A-page 5
VN10K
3.0
PIN DESCRIPTION
The details on the pins of VN10K are listed in Table 3-1.
Refer to Package Type for the location of the pins.
TABLE 3-1:
PIN FUNCTION TABLE
Pin Number
Pin Name
Description
1
Source
2
Gate
Gate
3
Drain
Drain
DS20005983A-page 6
Source
2021 Microchip Technology Inc.
VN10K
4.0
FUNCTIONAL DESCRIPTION
Figure 4-1 illustrates the switching waveforms and test
circuit for VN10K.
10V
VDD
90%
Pulse
Generator
INPUT
10%
0V
t(ON)
t(OFF)
tr
td(ON)
VDD
td(OFF)
0V
RGEN
10%
90%
FIGURE 4-1:
TABLE 4-1:
OUTPUT
tf
10%
OUTPUT
RL
INPUT
D.U.T.
90%
Switching Waveforms and Test Circuit.
PRODUCT SUMMARY
BVDSS/BVDGS
(V)
RDS(ON)
(Maximum)
(Ω)
IDSS
(Minimum)
(mA)
60
5
750
2021 Microchip Technology Inc.
DS20005983A-page 7
VN10K
5.0
PACKAGING INFORMATION
5.1
Package Marking Information
3-lead TO-92
XXXXXX
XX e3
YWWNNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005983A-page 8
Example
VN10K
N3 e3
110625
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2021 Microchip Technology Inc.
VN10K
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
2021 Microchip Technology Inc.
DS20005983A-page 9
VN10K
NOTES:
DS20005983A-page 10
2021 Microchip Technology Inc.
VN10K
APPENDIX A:
REVISION HISTORY
Revision A (July 2021)
• Converted Supertex Doc# DSFP-VN10K to
Microchip DS20005983A
• Added a pin function table
• Changed the package marking format
• Removed the 3-lead TO-92 N3 P005 media type
to align packaging specifications with the actual
BQM
• Made minor text changes throughout the
document
2021 Microchip Technology Inc.
DS20005983A-page 11
VN10K
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
XX
PART NO.
-
Package
Options
Device
X
-
Environmental
X
Media Type
Device:
VN10K
=
N-Channel Enhancement-Mode Vertical
DMOS FET
Package:
N3
=
3-lead TO-92
Environmental:
G
=
Lead (Pb)-free/RoHS-compliant Package
Media Types:
(blank)
=
1000/Bag for an N3 Package
P002
=
2000/Reel (Reverse T/R) for an N3 Package
P003
=
2000/Reel for an N3 Package
P013
=
2000/AMMO Pack for an N3 Package
P014
=
2000/AMMO Pack for an N3 Package
DS20005983A-page 12
Examples:
a) VN10KN3-G:
N-Channel EnhancementMode, Vertical DMOS FET,
3-lead TO-92, 1000/Bag
b) VN10KN3-G-P003:
N-Channel EnhancementMode, Vertical DMOS FET,
3-lead TO-92, 2000/Reel
(Reverse T/R)
c) VN10KN3-G-P013:
N-Channel EnhancementMode, Vertical DMOS FET,
3-lead TO-92, 2000/AMMO
Pack
2021 Microchip Technology Inc.
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ISBN: 978-1-5224-8526-1
DS20005983A-page 13
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02/28/20