VP2110K1-G

VP2110 P-Channel Enhancement-Mode Vertical DMOS FET Features General Description • • • • • • • The VP2110 Enhancement-mode (normally-off) transistors use a vertical DMOS structure and a well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally induced secondary breakdown. Free from Secondary Breakdown Low Power Drive Requirement Ease of Paralleling Low CISS and Fast Switching Speeds Excellent Thermal Stability Integral Source-Drain Diode High Input Impedance and High Gain Applications • • • • • • Microchip’s vertical DMOS FETs are ideally suited for a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. Motor Controls Converters Amplifiers Switches Power Supply Circuits Drivers (Relays, Hammers, Solenoids, Lamps, Memories, Displays, Bipolar Transistors, etc.) Package Type 3-lead SOT-23 (Top view) DRAIN SOURCE GATE See Table 3-1 for pin information.  2021 Microchip Technology Inc. and its subsidiaries DS20006600A-page 1 VP2110 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings† Drain-to-Source Voltage ...................................................................................................................................... BVDSS Drain-to-Gate Voltage ......................................................................................................................................... BVDGS Gate-to-Source Voltage ......................................................................................................................................... ±20V Operating Ambient Temperature, TA ................................................................................................... –55°C to +150°C Storage Temperature, TS ..................................................................................................................... –55°C to +150°C † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. DC ELECTRICAL CHARACTERISTICS Electrical Specifications: TA = 25°C unless otherwise specified. All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle Parameter Sym. Min. Drain-to-Source Breakdown Voltage BVDSS –100 — — V VGS = 0V, ID = –1 mA Gate Threshold Voltage VGS(th) –1.5 — –3.5 V VGS = VDS, ID = –1 mA ΔVGS(th) — 5.8 6.5 mV/°C VGS = VDS, ID = –1 mA (Note 1) IGSS — –1 –100 nA VGS = ±20V, VDS = 0V Change in VGS(th) with Temperature Gate Body Leakage Current Zero-Gate Voltage Drain Current On-State Drain Current Static Drain-to-Source On-State Resistance Change in RDS(ON) with Temperature Note 1: IDSS ID(ON) RDS(ON) ΔRDS(ON) Typ. Max. Unit Conditions — — –10 µA VGS = 0V, VDS = Maximum rating — — –1 mA VDS = 0.8 Maximum rating, VGS = 0V, TA = 125°C (Note 1) –0.5 –1 — A VGS = –10V, VDS = –25V — 11 15 Ω VGS = –5V, ID = –100 mA — 9 12 Ω VGS = –10V, ID = –500 mA %/°C VGS = –10V, ID = –500 mA (Note 1) — 0.55 1 Specification is obtained by characterization and is not 100% tested. DS20006600A-page 2  2021 Microchip Technology Inc. and its subsidiaries VP2110 AC ELECTRICAL CHARACTERISTICS Electrical Specifications: TA = 25°C unless otherwise specified. All AC parameters are not 100% sample tested. Parameter Sym. Min. Typ. Max. Forward Transconductance GFS 150 200 — Input Capacitance CISS — 45 60 pF Common-Source Output Capacitance COSS — 22 30 pF Reverse Transfer Capacitance CRSS — 3 8 pF Turn-On Delay Time td(ON) — 4 5 ns tr — 5 8 ns td(OFF) — 5 9 ns tf — 4 8 ns VSD — –1.2 –2 V VGS = 0V, ISD = –500 mA (Note 1) trr — 400 — ns VGS = 0V, ISD = –500 mA Rise Time Turn-Off Delay Time Fall Time DIODE PARAMETER Diode Forward Voltage Drop Reverse Recovery Time Note 1: Unit Conditions mmho VDS = –25V, ID = –500 mA VGS = 0V, VDS = –25V, f = 1 MHz VDD = –25V, ID = –500 mA, RGEN = 25Ω Unless otherwise stated, all DC parameters are 100% tested at 25°C. Pulse test: 300 µs pulse, 2% duty cycle TEMPERATURE SPECIFICATIONS Parameter Sym. Min. Typ. Max. Unit Operating Ambient Temperature TA –55 — +150 °C Storage Temperature TS –55 — +150 °C JA — 203 — °C/W Conditions TEMPERATURE RANGE PACKAGE THERMAL RESISTANCE 3-lead SOT-23 THERMAL CHARACTERISTICS Package 3-lead SOT-23 Note 1: ID (Note 1) (Continuous) (mA) ID (Pulsed) (mA) Power Dissipation at TA = 25°C (W) IDR (Note 1) (mA) IDRM (mA) –120 –400 0.36 –120 –400 ID (continuous) is limited by maximum rated TJ.  2021 Microchip Technology Inc. and its subsidiaries DS20006600A-page 3 VP2110 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g. outside specified power supply range) and therefore outside the warranted range. -2.0 -1.0 -1.6 -0.8 VGS = -10V -1.2 ID (amperes) ID (amperes) -9V VGS = -10V -9V -0.8 -8V -8V -0.6 -7V -0.4 -6V -7V -6V -0.4 -5V -0.2 -5V -4V -4V 0 0 -10 -20 -30 -40 -3V -0 -50 0 -2 -4 VDS (volts) FIGURE 2-1: -6 -8 -10 VDS (volts) Output Characteristics. FIGURE 2-4: Saturation Characteristics. 1.0 250 VDS = -25V TA = -55OC 200 PD (watts) GFS (millisiemens) 25OC 150 125OC 0.5 TO-236AB 100 50 0 0 0 0 -0.2 -0.4 -0.6 -0.8 25 50 -1.0 FIGURE 2-2: Current. Transconductance vs. Drain 75 100 125 150 TA (OC) ID (amperes) FIGURE 2-5: Power Dissipation vs. Ambient Temperature. 1.0 Thermal Resistance (normalized) -1.0 TO-236AB (pulsed) ID (amperes) TO-236AB (DC) -0.1 -0.01 TO-236AB PD = 0.36W TA = 25OC 0.6 0.4 0.2 0 TA = 25OC -0.001 -0.1 0.8 0.001 -1.0 -10 -100 DS20006600A-page 4 Maximum Rated Safe 0.1 1.0 10 tp (seconds) VDS (volts) FIGURE 2-3: Operating Area. 0.01 FIGURE 2-6: Characteristics. Thermal Response  2021 Microchip Technology Inc. and its subsidiaries VP2110 -1.1 20 RDS(ON) (ohms) BVDSS (normalized) 16 -1.0 VGS = -5.0V 12 VGS = -10V 8 4 -0.9 -50 0 50 100 0 0 150 -0.2 FIGURE 2-7: Temperature. -0.4 -0.6 -0.8 -1.0 ID (amperes) Tj (OC) BVDSS Variation with FIGURE 2-10: Current. On-Resistance vs. Drain -1.0 2.0 VDS = -25V 1.4 TA = -55OC RDS(ON) @ -10V, 0.5A 1.6 -0.4 25OC -0.2 0 125OC 0 -2 -4 1.2 1.2 1.0 0.8 V(th) @ 1.0mA 0.8 -6 -8 -10 0.6 -50 0 VGS (volts) FIGURE 2-8: 50 100 RDS(ON) (normalized) VGS(th) (normalized) ID (amperes) -0.6 0.4 0 150 Tj (OC) Transfer Characteristics. FIGURE 2-11: Temperature. V(th) and RDS Variation with -10 100 f = 1.0MHz VDS = -10V VGS (volts) C (picofarads) VDS = -40V -6 75 50 101pF -4 CISS 25 -2 35pF COSS CRSS 0 0 -10 -20 -30 -40 0 0 VDS (volts) FIGURE 2-9: Capacitance vs. Drain-to-Source Voltage.  2021 Microchip Technology Inc. and its subsidiaries 1.0 2.0 QG (nanocoulombs) FIGURE 2-12: Characteristics. Gate Drive Dynamic DS20006600A-page 5 VP2110 3.0 PIN DESCRIPTION The details on the pins of VP2110 are listed in Table 3-1. Refer to Package Type for the location of pins. TABLE 3-1: 3-LEAD SOT-23 PIN FUNCTION TABLE Pin Number Pin Name 1 Gate 2 Source 3 Drain DS20006600A-page 6 Description Gate Source Drain  2021 Microchip Technology Inc. and its subsidiaries VP2110 4.0 FUNCTIONAL DESCRIPTION Figure 4-1 illustrates the switching waveforms and test circuit for VP2110. 0V Pulse Generator 10% INPUT RGEN 90% t(OFF) -10V t(ON) D.U.T. td(ON) tr td(OFF) tf INPUT OUTPUT 0V 90% OUTPUT RL 90% 10% 10% VDD VDD FIGURE 4-1: TABLE 4-1: Switching Waveforms and Test Circuit. PRODUCT SUMMARY Device BVDSS/BVDGS (V) RDS(ON) (Maximum) (Ω) ID(ON) (Minimum) (mA) VP2110 –100 12 –500  2021 Microchip Technology Inc. and its subsidiaries DS20006600A-page 7 VP2110 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 3-lead SOT-23 XXXNNN Legend: XX...X Y YY WW NNN e3 * Note: DS20006600A-page 8 Example P1A753 Product Code or Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo.  2021 Microchip Technology Inc. and its subsidiaries VP2110 3-Lead TO-236AB (SOT-23) Package Outline (K1/T) 2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch D 3 E1 E Gauge Plane 0.25 1 Seating Plane L 2 e L1 b e1 View B Top View View B A A A2 Seating Plane A1 Side View View A - A A Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging. Symbol Dimension (mm) A A1 A2 b D E E1 MIN 0.89 0.01 0.88 0.30 2.80 2.10 1.20 NOM - - 0.95 - 2.90 - 1.30 MAX 1.12 0.10 1.02 0.50 3.04 2.64 1.40 e 0.95 BSC e1 1.90 BSC L 0.20† 0.50 0.60 L1 0.54 REF ș 0O 8O JEDEC Registration TO-236, Variation AB, Issue H, Jan. 1999. † This dimension differs from the JEDEC drawing. Drawings not to scale.  2021 Microchip Technology Inc. and its subsidiaries DS20006600A-page 9 VP2110 NOTES: DS20006600A-page 10  2021 Microchip Technology Inc. and its subsidiaries VP2110 APPENDIX A: REVISION HISTORY Revision A (December 2021) • Converted Supertex Doc# DSFP-VP2110 to Microchip DS20006600A • Changed the package marking format • Added sections to comply with Microchip formatting standards • Made minor text changes throughout the document  2021 Microchip Technology Inc. and its subsidiaries DS20006600A-page 11 VP2110 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office. XX PART NO. - Package Options Device X - Environmental X Media Type Device: VP2110 = P-Channel Enhancement-Mode Vertical DMOS FET Package: K1 = 3-lead SOT-23 Environmental: G = Lead (Pb)-free/RoHS-compliant Package Media Type: (blank) = 3000/Reel for a K1 Package DS20006600A-page 12 Example: a) VP2110K1-G: P-Channel EnhancementMode, Vertical DMOS FET, 3-lead SOT-23, 3000/Reel  2021 Microchip Technology Inc. and its subsidiaries Note the following details of the code protection feature on Microchip products: • Microchip products meet the specifications contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is secure when used in the intended manner, within operating specifications, and under normal conditions. • Microchip values and aggressively protects its intellectual property rights. Attempts to breach the code protection features of Microchip product is strictly prohibited and may violate the Digital Millennium Copyright Act. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not mean that we are guaranteeing the product is “unbreakable”. Code protection is constantly evolving. Microchip is committed to continuously improving the code protection features of our products. This publication and the information herein may be used only with Microchip products, including to design, test, and integrate Microchip products with your application. Use of this information in any other manner violates these terms. Information regarding device applications is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. 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Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, QuietWire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, TrueTime, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, GridTime, IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity, JitterBlocker, Knob-on-Display, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, NVM Express, NVMe, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SmartHLS, SMART-I.S., storClad, SQI, SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY, ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. The Adaptec logo, Frequency on Demand, Silicon Storage Technology, Symmcom, and Trusted Time are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2021, Microchip Technology Incorporated and its subsidiaries. All Rights Reserved. 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