®
PRODUCT BRIEF
VSC8664
Quad Port 10/100/1000BASE-T PHY and
100BASE-FX/1000BASE-X SerDes with
Recovered Clock Outputs
The industry’s first PHY with dual recovered clock
outputs delivers carrier-quality Synchronous Ethernet
Helping OEMs to capitalize on the cost reduction and optimization of
Synchronous Ethernet, the VSC8664 addresses the challenges in
providing fully traceable timing across TDM backhaul links, cellular
base stations, and other Synchronous Ethernet applications. With dual
recovered clock outputs, the VSC8664 meets and goes beyond the
requirements of the ITU-T Recommendation G.8261/Y.1361.
Supporting four copper/fiber ports and SGMII MAC interfaces, the
VSC8664 includes a highly integrated feature set to ensure low-cost,
rapid deployment.
APPLICATIONS
• Copper and fiber-based synchronous
Ethernet systems
• SGMII-to-SFP designs
• Multiport, SGMII-based Gigabit
Ethernet (GbE) designs
LOW POWER
• Low power consumption with three
power savings modes
• ActiPHY™ power management system
with built-in intelligence and
saving modes
Carrier-Quality Synchronous Ethernet
Meeting the carrier demands for redundancy, the VSC8664 features
dual recovered clocks to enable a primary and secondary timing
reference. Programmable clock squelch control is included to inhibit
undesirable clocks from propagating and to help prevent timing loops.
VSC8664 is the first GbE PHY to provide clock recovery in combination
with an SGMII interface, making layouts simpler than RGMII/GMII
solutions. Also featured is a fast link failure indication that can indicate
the onset of a link failure in less than 1 ms, a critical feature for
support of synchronization timing.
1
2
Recovered
Clock Output
RJ-45
4
4
VSC8664
Synchronous
Ethernet PLL
SGMII
4
SFP
Gigabit
Ethernet
Switch / MAC
CPU
Highly Integrated, Cost-Effective Deployment
VSC8664 helps to lower the component count without sacrificing
capabilities or utility, resulting in more cost-effective production and
deployment. Its patented, low electromagnetic interference line driver
and integrated line side termination resistors conserve both power and
printed circuit board space. With an integrated I2C multiplexer to
control SFPs or power-over-Ethernet modules, VSC8664 also eliminates
the need for an external two-wire serial device.
1 GbE Line Card
Vitesse's mixed signal and digital signal processing (DSP) architecture
yield robust performance, supporting both full and half duplex
10BASE-T, 100BASE-TX, and 1000BASE-T over >140 meters of
CAT-5, unshielded twisted pair cable, with industry leading tolerance to
NEXT, FEXT, Echo, and system noise. With dual, high-performance
1.25 Gbps SerDes, VSC8664 maximizes receive jitter tolerance and
minimizes transmit jitter in comparison to single SerDes architectures.
www.vitesse.com
Making next-generation networks a reality.
VSC8664
Wide Range of Support
Flexibility
• Compliant with IEEE 802.3 (10BASE-T, 100BASE-TX,
1000BASE-T, 100BASE-FX, and 1000BASE-X)
specifications
• Support for 802.3ah unidirectional transport for
100BASE-FX and 1000BASE-X fiber media
• Support for >16 kB jumbo frames in all speeds with
programmable synchronization FIFOs
• Supports Cisco SGMII v1.7 and 1000BASE-X MACs,
IEEE 1149.1 JTAG boundary scan, and IEEE 1149.6
AC-JTAG
• Integrated quad I2C multiplexer to control SFPs or
PoE modules, eliminating the need for an external
two-wire serial device for the control and status of
SFP or PoE modules
• VeriPHY® cable diagnostics suite provides extensive
network cable information such as cable length,
termination status, and open/short fault location
• Extensive test features (including near end, far end,
and connector loopback, and Ethernet packet
generator with CRC error counter) to decrease timeto-market
Synchronous Ethernet
Advanced SerDes
• Recovered clock output support for G.8261 and
IEEE-1588 synchronous Ethernet applications,
including programmable squelch control
• Patent-pending, fast link fail indication (
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