ACT8810QJ50F-T

Active-Semi FEATURES • ActivePathTM Li+ Charger with System Power Selection • Six Integrated Regulators − 1.3A High Efficiency Step-Down DC/DC − 1.0A High Efficiency Step-Down DC/DC − 0.55A High Efficiency Step-Down DC/DC − 2×360mA Low Noise, High PSRR LDOs − 30mA RTC LDO / Backup Battery Charger • I2CTM Serial Interface • Minimal External Components ACT8810 Rev 8, 08-Oct-10 Eight Channel ActivePathTM Power Management IC GENERAL DESCRIPTION The patent-pending ACT8810 is a complete, cost effective, highly-efficient ActivePMUTM power management solution that is ideal for a wide range of high performance portable handheld applications such as personal navigation devices (PNDs). This device integrates the ActivePathTM complete battery charging and management system with six power supply channels. The ActivePath architecture automatically selects the best available input supply for the system. If the external input source is not present or the system load current is more than the input source can provide, the ActivePath supplies additional current from the battery to the system. The charger is a complete, thermallyregulated, stand-alone single-cell linear Li+ charger that incorporates an internal power MOSFET. REG1, REG2, and REG3 are three independent, fixed-frequency, current-mode step-down DC/DC converters that output 1.3A, 1.0A, and 0.55A, respectively. REG4 and REG5 are high performance, low-noise, low-dropout linear regulators that output up to 360mA each. REG6 is a RTC LDO that outputs up to 30mA for a real time clock. Finally, an I2C serial interface provides programmability for the DC/DC converters and LDOs. The ACT8810 is available in a tiny 5mm x 5mm 40pin Thin-QFN package that is just 0.75mm thin. • Compatible with USB or AC-Adapter Charging • 5mm × 5mm, Thin-QFN (TQFN55-40) Package − Only 0.75mm Height − RoHS Compliant APPLICATIONS • Personal Navigation Devices • Portable Media Players • Smart Phones SYSTEM BLOCK DIAGRAM CHG_IN CHGLEV DCCC ISET ACIN nSTAT0 nSTAT1 TH BTR nPBIN nIRQ nRSTO SCL SDA ON1 ON2 ON3 VSEL Battery Programmable Up to 1A VSYS REG1 Step-Down DC/DC REG2 Step-Down DC/DC REG3 Step-Down DC/DC System Control REG4 LDO REG5 LDO OUT1 Adjustable, or 0.8V to 4.4V Up to 1.3A OUT2 Adjustable, or 0.8V to 4.4V Up to 1.0A OUT3 Adjustable, or 0.8V to 4.4V Up to 0.55A OUT4 0.9V to 3.3V Up to 360mA OUT5 0.9V to 3.3V Up to 360mA OUT6 0.9V to 3.3V Up to 30mA ActivePathTM & Single-Cell Li+ Battery Charger ActivePMU PMU Innovative PowerTM ACT8810 TM REG6 RTC_LDO -1- www.active-semi.com Copyright © 2010 Active-Semi, Inc. ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. Active-Semi TABLE OF CONTENTS ACT8810 Rev 8, 08-Oct-10 GENERAL INFORMATION ..........................................................................................P. 01 Functional Block Diagram ...................................................................................................... p. 03 Ordering Information .............................................................................................................. p. 04 Pin Configuration .................................................................................................................... p. 04 Pin Descriptions ..................................................................................................................... p. 05 Absolute Maximum Ratings.................................................................................................... p. 07 SYSTEM MANAGEMENT ...........................................................................................P. 08 Register Descriptions ............................................................................................................. p. 08 I2C Interface Electrical Characteristics ................................................................................... p. 09 Electrical Characteristics ........................................................................................................ p. 10 Register Descriptions ............................................................................................................. p. 11 Typical Performance Characteristics...................................................................................... p. 12 Functional Description ............................................................................................................ p. 13 STEP-DOWN DC/DC CONVERTERS ..........................................................................P. 17 Electrical Characteristics ........................................................................................................ p. 17 Typical Performance Characteristics...................................................................................... p. 20 Register Descriptions ............................................................................................................. p. 22 Functional Description ............................................................................................................ p. 28 LOW-DROPOUT LINEAR REGULATORS ..................................................................P. 31 Electrical Characteristics ........................................................................................................ p. 31 Typical Performance Characteristics...................................................................................... p. 33 Register Descriptions ............................................................................................................. p. 34 Functional Description ............................................................................................................ p. 36 RTC LOW-DROPOUT LINEAR REGULATOR ............................................................P. 37 Electrical Characteristics ........................................................................................................ p. 37 Register Descriptions ............................................................................................................. p. 38 Functional Description ............................................................................................................ p. 39 ActivePathTM CHARGER .............................................................................................P. 40 Electrical Characteristics ........................................................................................................ p. 40 Typical Performance Characteristics...................................................................................... p. 42 Functional Description ............................................................................................................ p. 44 PACKAGE INFORMATION ..........................................................................................P. 53 Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. -2- www.active-semi.com Copyright © 2010 Active-Semi, Inc. Active-Semi FUNCTIONAL BLOCK DIAGRAM Active-Semi ACT8810 Rev 8, 08-Oct-10 Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. -3- REG3 REG2 REG1 www.active-semi.com Copyright © 2010 Active-Semi, Inc. Active-Semi ORDERING INFORMATION PART NUMBER ACT8810QJ1C1-T ACT8810QJ213-T ACT8810QJ3EB-T ACT8810QJ420-T ACT8810QJ50F-T ACT8810 Rev 8, 08-Oct-10 VOUT1/VSTBY1 3.3V/3.3V 1.2V/1.2V 3.3V/3.3V 3.3V/3.3V 1.2V/1.2V VOUT2/VSTBY2 VOUT3/VSTBY3 VOUT4 VOUT5 VOUT6 CONTROL SEQUENCE 1.1V/1.2V 1.8V/1.8V 1.2V/1.2V 1.8V/1.8V 3.3V/3.3V 1.2V/1.2V 1.0V/1.0V 1.8V/1.8V 1.1V/1.2V 1.8V/1.8V 1.2V 3.3V 1.5V 1.2V 3.3V 2.8V 1.2V 2.8V 3.3V 1.8V 3.3V 3.0V 3.3V 2.5V 3.0V Sequence A Sequence B Sequence C Sequence D Sequence E PACKAGING DETAILS ACT8810QJ###-T PACKAGE TQFN55-40 PINS 40 TEMPERATURE RANGE -40°C to +85°C PACKING TAPE & REEL : All Active-Semi components are RoHS Compliant and with Pb-free plating unless specified differently. The term Pb-free means semiconductor products that are in compliance with current RoHS (Restriction of Hazardous Substances) standards. : To select VSTBYx as a output regulation voltage of REGx, tie VSEL to VSYS or a logic high. : Refer to the Control Sequence section for more information. PIN CONFIGURATION TOP VIEW CHGLEV nSTAT1 nSTAT0 nRSTO REFBP OUT4 nIRQ ON2 INL GA TH DCCC BTR ACIN BAT BAT VSYS VSYS CHG_IN ISET OUT5 OUT6 VP3 Active-Semi ACT8810 EP SW3 GP3 OUT3 nPBIN SDA SCL ON3 VSEL ON1 Thin - QFN (TQFN55-40) OUT2 VP2 SW2 GP2 GP1 SW1 VP1 OUT1 Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. -4- www.active-semi.com Copyright © 2010 Active-Semi, Inc. Active-Semi PIN DESCRIPTIONS PIN 1 ACT8810 Rev 8, 08-Oct-10 NAME TH DESCRIPTION Temperature Sensing Input. Connect to battery thermistor. TH is pulled up with a 100µA current internally. See the Battery Temperature Monitoring section for more information. Dynamic Charging Current Control. Connect a resistor to set the dynamic charging current control point. A internal 100µA current source sets up a voltage that is used to compare with VSYS and dynamically scale the charging current to maintain VSYS regulation. See the Dynamic Charge Current Control section for more information. Safety Timer Program Pin. The resistance between this pin and GA determines the timers timeout values. See the Charging Safety Timers section for more information. AC Adaptor Detect. Detects presence of a wall adaptor and automatically adjusts the charge current to the maximum charge current level. Do not leave ACIN floating. Battery Charger Output. Connect this pin directly to the battery anode (+ terminal) System Output Pin. Bypass to GA with a 10µF or larger ceramic capacitor. 2 DCCC 3 4 5, 6 7, 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 BTR ACIN BAT VSYS Power Input for the Battery Charger. Bypass CHG_IN to GA with a capacitor placed as close to the CHG_IN IC as possible. The battery charger are automatically enabled when a valid voltage is present on CHG_IN. See the CHG_IN Bypass Capacitor Selection section for more information. ISET VSEL ON1 OUT2 VP2 SW2 GP2 GP1 SW1 VP1 OUT1 ON3 SCL SDA Charge Current Set. Program the maximum charge current by connecting a resistor (RISET) between ISET and GA. See the Charger Current Programming section for more information. Step-Down DC/DCs Output Voltage Selection. Drive to logic low to select default output voltage. Drive to logic high to select secondary output voltage. See the Output Voltage Selection Pin section for more information. Independent Enable Control Input for REG1. Drive ON1 to VSYS or to a logic high for normal operation, drive to GA or a logic low to disable REG1. Do not leave ON1 floating. Output Feedback Sense for REG2. Connect this pin directly to the output node to connect the internal feedback network to the output voltage. Power Input for REG2. Bypass to GP2 with a high quality ceramic capacitor placed as close as possible to the IC. Switching Node Output for REG2. Connect this pin to the switching end of the inductor. Power Ground for REG2. Connect GA, GP1, GP2 and GP3 together at a single point as close to the IC as possible. Power Ground for REG1. Connect GA, GP1, GP2 and GP3 together at a single point as close to the IC as possible. Switching Node Output for REG1. Connect this pin to the switching end of the inductor. Power Input for REG1. Bypass to GP1 with a high quality ceramic capacitor placed as close as possible to the IC. Output Feedback Sense for REG1. Connect this pin directly to the output node to connect the internal feedback network to the output voltage. Enable Control Input for REG3. Drive ON3 to a logic high for normal operation, drive to GA or a logic low to disable REG3. Do not leave ON3 floating. Clock Input for I2C Serial Interface. Data Input for I2C Serial Interface. Data is read on the rising edge of SCL. Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. -5- www.active-semi.com Copyright © 2010 Active-Semi, Inc. Active-Semi PIN DESCRIPTIONS CONT’D PIN 24 ACT8810 Rev 8, 08-Oct-10 NAME nPBIN DESCRIPTION Master Enable Input. Drive nPBIN to GA through a 100kΩ resistor to enable the IC, drive nPBIN directly to GA to assert a Hard-Reset condition. Refer to the System Startup & Shutdown and Control Sequence sections for more information. nPBIN is internally pulled up to VSYS through a 50kΩ resistor. Output Feedback Sense for REG3. Connect this pin directly to the output node to connect the internal feedback network to the output voltage. Power Ground for REG3. Connect GA, GP1, GP2, and GP3 together at a single point as close to the IC as possible. Switching Node Output for REG3. Connect this pin to the switching end of the inductor. Power Input for REG3. Bypass to GP3 with a high quality ceramic capacitor placed as close as possible to the IC. RTC LDO Output Voltage. Capable of delivering up to 30mA of output current. Output Voltage for REG5. Capable of delivering up to 360mA of output current. The output is discharged to GA with 1kΩ when disabled. Power Input for REG4, REG5, and REG6. Bypass to GA with a high quality ceramic capacitor placed as close as possible to the IC. Output Voltage for REG4. Capable of delivering up to 360mA of output current. The output is discharged to GA with 1kΩ when disabled. 25 26 27 28 29 30 31 32 OUT3 GP3 SW3 VP3 OUT6 OUT5 INL OUT4 33 Active-Low Open-Drain Charger Status Output. nSTAT0 has a 5mA (typ) current limit, allowing it to directly drive an indicator LED without additional external components. To generate a logic-level nSTAT0 output, connect nSTAT0 to an appropriate supply voltage (typically VSYS) through a 10kΩ or greater pull-up resistor. See the Charge Status Indication section for more information. ON2 GA REFBP Independent Enable Control Input for REG2. Drive ON2 to a logic high for normal operation, drive to GA or a logic low to disable REG2. Do not leave ON2 floating. Analog Ground. Connect GA directly to a quiet ground node. Connect GA, GP1, GP2, and GP3 together at a single point as close to the IC as possible. Reference Noise Bypass. Connect a 0.01μF ceramic capacitor from REFBP to GA. This pin is discharged to GA in shutdown. 34 35 36 37 Active-Low Open-Drain Charger Status Output. nSTAT1 has a 5mA (typ) current limit, allowing it to directly drive an indicator LED without additional external components. To generate a logic-level nSTAT1 output, connect nSTAT1 to an appropriate supply voltage (typically VSYS) through a 10kΩ or greater pull-up resistor. See the Charge Status Indication section for more information. nRSTO nIRQ Open-Drain Reset Output. nRSTO asserts low whenever REG1 is out of regulation, and remains low for 260ms (typ) after REG1 reaches regulation. Open-Drain Interrupt Output. nIRQ asserts any time nPBIN is asserted or an unmasked fault condition exists. See the nIRQ Output section for more information. Charging State Select Input. When ACIN = 0 charge current is internally set; Drive CHGLEV to a logic-high for high-current USB charging mode (maximum charge current is 500mA), drive CHGLEV to a logic-low for low-current USB charging mode (maximum charge current is 100mA). When ACIN = 1 charge current is externally set by RISET; Drive CHGLEV to a logic-high to for highcurrent charging mode (ISET (mA) = KISET × 1V/(RISET (kΩ) +0.031) where KISET = 628), drive CHGLEV to a logic-low for low-current charging mode (ISET (mA) = KISET × 1V/(RISET (kΩ) + 0.031) where KISET = 314). Do not leave CHGLEV floating. Exposed Pad. Must be soldered to ground on the PCB. -6www.active-semi.com Copyright © 2010 Active-Semi, Inc. 38 39 40 CHGLEV EP EP Innovative PowerTM ActivePMUTM and ActivePathTM are trademarks of Active-Semi. I2CTM is a trademark of NXP. Active-Semi ABSOLUTE MAXIMUM RATINGS PARAMETER CHG_IN to GA t < 1ms and duty cycle