TQL9066

TQL9066 50 – 1500 MHz Dual LNA ® General Description The TQL9066 is a high linearity, ultra-low noise figure dual device amplifier in a 4x4 mm package. At 830 MHz in a balanced configuration, the LNA provides 18.4 dB gain, 22 dBm IIP3 and 0.62 dB noise figure. The part does not require a negative supply for operation and is bias adjustable for both drain current and voltage. The device is housed in a green/RoHS-compliant industry standard QFN package. 16-pin 4x4 mm QFN Package Product Features • • • • • • • • • The TQL9066 consists of a single monolithic GaAs EpHEMT die and integrates bias circuitry as well as shutdown capability allowing the LNA to be useful for both FDD and TDD applications. The TQL9066 is optimized for the 700−1000 MHz band, but can be used outside of the band. TriQuint offers pincompatible dual LNAs for the 1.5−2.3 GHz band (TQP3M9040) and 2.3−4.0 GHz (TQP3M9041). The balanced amplifier is optimized for high performance receivers in wireless infrastructure and can be used for base-station transceivers or tower-mounted amplifiers. 0.62 dB NF (Balanced configuration) at 830 MHz 50−1500 MHz Operational bandwidth 18.4 dB Gain at 830 MHz +22 dBm Input IP3 -35 dB Reverse Isolation Integrated shut-down biasing feature Bias adjustable Does not require negative voltage supply 4x4 mm 16-pin QFN plastic package Applications • • • • Functional Block Diagram Base Station Receivers Tower Mount Amplifiers Balanced Amplifiers Defense Communications Pin 1 Reference Mark DC Bias 1 Vpd1 Ictrl1 16 15 14 NA 13 RFout1/ RFin1/ Vg1 1 12 Vd1 GND 2 11 GND GND 3 10 GND RFin2/ Vg2 4 9 Vd2 RFout2/ 5 6 7 DC Vpd2 Ictrl2 Bias 2 8 Ordering Information NA Backside Paddle - RF/DC GND Part No. Description TQL9066 TQL9066-PCB 50−1500 MHz Dual LNA 700−1000 MHz Evaluation Board Standard T/R size = 2500 pieces on a 13” reel Data Sheet March 1, 2018 | Subject to change without notice 1 of 10 www.qorvo.com TQL9066 50 – 1500 MHz Dual LNA ® Absolute Maximum Ratings Parameter Storage Temperature Drain Voltage (Vd) Idd (Vd = 5V) per channel Input Power (CW) Input Power (CW, DC off condition) Input Power (DC off condition & 10% Duty Cycle) Recommended Operating Conditions Rating −65 to 150°C +7 V 300 mA +22 dBm +22 dBm +30 dBm Operation of this device outside the parameter ranges given above may cause permanent damage. Parameter Min Vpd Vg Vd Id, single channel Operating Temp. Range Tch (for>106 hrs MTTF) 0 0 +2 Typ +0.5 57 −40 Max Units +5 +1 +5 85 +105 190 V V V mA °C °C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Electrical Specifications Test conditions unless otherwise noted: Vd = +4.35 V, Temp.=+25°C, tuned balanced configuration. NF is de-embedded to the input of the input hybrid coupler. Parameter Operational Frequency Range Test Frequency Gain Output P1dB Input IP3 Output IP3 Noise Figure Reverse Isolation, S12 Drain Voltage, Vd Drain Current, Id Power Down Control Voltage, Vpd1 Thermal Resistance, θjc Conditions Min Typ 50 17.9 Pin=−13 dBm/tone, Δf=1 MHz Pout=+5 dBm/tone, Δf=1 MHz Balanced configuration +17 Single Channel On-State Off-State Channel to case - per channel 40 0 +2.1 830 19 +21.4 +22 +40 0.62 -35 +4.35 55 53.4 Max Units 1500 MHz MHz dB dBm dBm dBm dB dB V mA V V °C/W 20.3 0.95 85 +0.3 Vd Notes: This voltage is references to the turret labeled Vpd1, Vpd2 on the evaluation board turret as shown on page 3. Data Sheet March 1, 2018 | Subject to change without notice 2 of 10 www.qorvo.com TQL9066 50 – 1500 MHz Dual LNA ® S-Parameters Test Conditions: VDD=+4.35 V, IDD=55 mA (typ.), T=+25°C, unmatched 50 ohm system, calibrated to device leads Freq (GHz) 0.63 0.68 0.73 0.78 0.83 0.88 0.93 0.98 1.03 1.08 1.13 1.18 1.23 1.28 1.33 1.38 S11 (mag) 0.79337 0.79442 0.79277 0.78648 0.79306 0.78059 0.78969 0.78116 0.78332 0.78317 0.77558 0.78385 0.77114 0.78121 0.77214 0.77461 S11 (ang) -12.900 -13.874 -14.172 -15.172 -15.631 -16.375 -17.284 -17.695 -18.899 -19.210 -20.396 -20.946 -21.773 -22.803 -23.231 -24.510 Note: Single Ended Configuration. S21 (mag) 8.26522 7.74829 7.26533 6.84091 6.49595 6.14597 5.88192 5.59921 5.36480 5.15505 4.95617 4.79515 4.61128 4.47997 4.32752 4.20926 S21 (ang) 90.261 88.361 86.104 84.470 82.537 80.813 79.116 77.274 75.909 74.048 72.708 70.912 69.304 67.885 66.119 64.759 S12 (mag) 0.01148 0.01248 0.01339 0.01432 0.01531 0.01622 0.01727 0.01820 0.01920 0.02024 0.02126 0.02239 0.02335 0.02451 0.02555 0.02670 S12 (ang) 75.844 75.711 75.404 75.284 74.926 74.516 74.219 73.540 73.430 72.645 72.415 71.594 71.051 70.482 69.734 69.193 S22 (mag) 0.92636 0.92606 0.92339 0.92274 0.92335 0.92385 0.92328 0.92190 0.91992 0.92047 0.92067 0.91905 0.91742 0.91527 0.91543 0.91419 S22 (ang) -12.494 -13.755 -15.078 -16.327 -17.625 -18.774 -20.130 -21.322 -22.552 -23.861 -24.977 -26.433 -27.760 -29.220 -30.654 -32.037 Noise Parameters Test Conditions: VDD=+4.35 V, IDD=55 mA (typ.), T=+25°C, unmatched 50 ohm system, calibrated to device leads Freq (GHz) 0.63 0.68 0.73 0.78 0.83 0.88 0.93 0.98 1.03 1.08 1.13 1.18 1.23 1.28 1.33 1.38 NFmin (dB) 0.18904 0.15268 0.13607 0.14421 0.18132 0.22549 0.21280 0.22103 0.22786 0.24764 0.22524 0.22329 0.23666 0.25239 0.23498 0.22454 Note: Single Ended Configuration. Data Sheet March 1, 2018 | Subject to change without notice MagOpt (mag) 0.68290 0.60214 0.59945 0.61001 0.56081 0.58780 0.51434 0.55135 0.51948 0.49175 0.48301 0.44584 0.46800 0.44915 0.40194 0.42934 3 of 10 AngOpt (deg) 20.6785 18.3406 22.8778 20.4961 19.4236 24.7523 20.6518 24.4779 22.6357 23.1648 25.1937 25.1826 28.0534 22.6713 29.8884 25.3527 Rn (Ω) 0.06298 0.06813 0.06129 0.06111 0.06567 0.06571 0.06780 0.05977 0.06729 0.06989 0.06393 0.06376 0.06793 0.06323 0.06239 0.07558 www.qorvo.com TQL9066 50 – 1500 MHz Dual LNA ® Noise Figure Circles at 900 MHz Noise parameter measurements taken at the package pin reference plane. The gate and drain are biased externally through bias-tees. The achievable NFmin will worsen with on board non-ideal bias circuit. Graph 1 p1: Freq = 0.9 GHz p2: Freq = 0.9 GHz p3: Freq = 0.9 GHz NF = 0.22042 dB NF = 0.27042 dB NF = 0.32042 dB Swp Max p4: Freq = 0.9 GHz p5: Freq = 0.9 GHz p6: Freq = 0.9 GHz 0.9GHz NF = 0.37042 dB NF = 0.42042 dB NF = 0.47042 dB S11* p1 p3 p5 p2 p4 ΓOPT p6 NFCIR(5,0.05) Swp Min 0.9GHz Conj(S(1,1)) Data Sheet March 1, 2018 | Subject to change without notice 4 of 10 www.qorvo.com TQL9066 50 – 1500 MHz Dual LNA ® TQL9066-PCB Evaluation Board Layout J4 J3 J5 X1 L8 R8 R7 C8 R2 R17 R4 C21 L7 L3 L2 C3 C1 C10 C11 C9 C7 R1 R6 C12 C13 R14 C17 C18 L10 C20 C19 L9 X2 R16 R15 R9 C14 C15 R10 R18 R12 C22 L4 C6 C4 L6 U1 C16 J7 J8 J6 See Evaluation Board PCB Information section for PCB material and stack-up. Bill of Material – TQL9066-PCB Reference Des. Description Manuf. Part Number U1 Value n/a Dual LNA TriQuint TQL9066 X1 n/a Hybrid coupler Anaren X3C09P1-03S X2 n/a Hybrid coupler Anaren C0810J5003AHF R1, R9 330 Ω RES, 0402, +/-5%, 1/16W Various R8, R15 51 Ω RES, 0402, +/-5%, 1/16W Various R6, R14 10 Ω RES, 0402, +/-5%, 1/16W Various R4, R12 2.2K Ω RES, 0402, +/-5%, 1/16W Various R7, R16 2.2 Ω RES, 0603, +/-5%, 1/8W Various R17, R18 15K Ω RES, 0402, +/-5%, 1/16W Various R2, R10 33K Ω RES, 0402, +/-5%, 1/10W Various C1, C4 47 pF CAP, 0402, +/-5%, 50V Panasonic ECJ-0EC1H470J C3, C6 1.2 pF CAP, 0402, +/-0.1pF, 25V Panasonic ECD-G0E1R2B C7, C14 1.8 pF CAP, 0402, +/-0.1pF, 50V AVX 04025U1R8BAT2A C8, C15, C21, C22, C11, C19 100 pF CAP, 0402, +/-5%, 50V Panasonic ECJ-0EC1H101J C9, C16 0.01 uF CAP, 0805, +/-5%, 50V, X7R Various C10, C20 1000 pF CAP, 0402, +/-10%, 50V Various 4.7 pF CAP, 0402, +/-0.1pF, 50V AVX 04025U4R7BAT2A L2, L4 6.8 nH IND, 0402, +/-5% Coilcraft 0402CS-6N8XJL L3, L6 220 nH IND, 0603, +/-5% Coilcraft 0603CS-R22XJL L7, L9 100 nH IND, 0603, +/-5%, 600mA Coilcraft 0603CS-R10XJL L8, L10 8.2 nH IND, 0402, +/-5% Coilcraft 0402CS-8N2XJL C12, C13, C17, C18 Data Sheet March 1, 2018 | Subject to change without notice 5 of 10 www.qorvo.com TQL9066 50 – 1500 MHz Dual LNA ® TQL9066-PCB Evaluation Board Schematic J4 J3 R2 33K C9 0.01uF R17 15K 1.8pF C1 L2 47pF 6.8nH C10 1000pF 100pF C8 C7 R7 2.2 C21 100pF R1 330 L3 220nH C11 R4 2.2K R6 C3 1.2pF 100pF L7 100nH C12 10 4.7pF R14 C17 C13 L8 4.7pF 8.2nH X2 R8 50 X1 C4 R15 50  L4 47pF 6.8nH C6 1.2pF C14 1.8pF R12 2.2K L6 220nH 10 L9 4.7pF 100nH R9 C19 330 100pF C20 R10 33K C15 100pF R18 15K C22 100pF C18 L10 4.7pF 8.2nH 1000pF R16 2.2 C16 0.01uF J7 Data Sheet March 1, 2018 | Subject to change without notice J6 6 of 10 www.qorvo.com TQL9066 50 – 1500 MHz Dual LNA ® Typical Performance (Balanced Configuration) Test conditions unless otherwise noted: Vd = +4.35 V, Id =115 mA, Temp.=+25°C. NF is de-embedded to the input of the input hybrid coupler. Parameter Typical Value Frequency Gain Reverse Isolation, S12 Noise Figure (Balanced Configuration) Output P1dB IIP3 (Pin/tone=-13 dBm, Δf = 1 MHz) 700 18 -39 0.57 +21.6 +22.0 830 18.5 -38 0.62 +21.5 +24.8 Units 900 18.4 -36 0.6 +21.4 +25.7 1000 18.0 -35 0.69 +21.3 +25.0 MHz dB dB dB dBm dBm Performance Plots (Balanced Configuration) Test conditions unless otherwise noted: Vd = +4.35 V, Id =115 mA, Temp.=+25°C Gain vs. Frequency 20 Input Return Loss vs. Frequency 0 Output Return Loss vs. Frequency 0 -5 -5 19 -10 +105°C +85°C 17 +25°C −40°C +105°C -10 |S22| (dB) |S11| (dB) Gain (dB) -15 18 -20 +105°C -25 +85°C -30 +25°C +85°C +25°C -15 −40°C -20 −40°C -35 16 -25 -40 15 -45 700 750 800 850 900 950 1000 -30 700 750 800 Frequency (MHz) Isolation vs. Frequency 0 900 950 1000 700 750 850 900 950 1000 Frequency (MHz) IIP3 vs. Frequency 30 800 Noise Figure vs Frequency 1.4 Temp.=+25°C -5 1.2 -10 Noise Figure (dB) 25 -15 -20 IIP3 (dBm) Isolation (dB) 850 Frequency (MHz) +105°C -25 +85°C +25°C -30 20 +105°C +85°C +25°C −40°C −40°C 15 -35 Pin = -13dBm/tone -40 -45 750 800 850 900 950 1000 +25°C −40°C 0.8 0.6 0.4 0.2 0 10 700 +85°C 1 700 750 800 Frequency (MHz) 850 900 950 1000 700 750 800 850 900 950 1000 Frequency (MHz) Frequency (MHz) Idq vs. Vpd 140 120 Idq (mA) 100 80 +105°C 60 +85°C +25°C 40 −40°C 20 0 0 0.5 1 1.5 2 2.5 3 3.5 Vpd (V) Data Sheet March 1, 2018 | Subject to change without notice 7 of 10 www.qorvo.com TQL9066 50 – 1500 MHz Dual LNA ® Pin Configuration and Description Pin 1 Reference Mark DC Bias 1 Vpd1 Ictrl1 16 15 14 NA 13 RFout1/ RFin1/ Vg1 1 12 Vd1 GND 2 11 GND GND 3 10 GND RFin2/ Vg2 4 9 Vd2 RFout2/ 5 6 7 DC Vpd2 Ictrl2 Bias 2 8 NA Backside Paddle - RF/DC GND Pin No. Label Description 1 RFin1/Vg1 RF input pin for channel 1. Gate voltage bias pin for channel 1. No internal connection but should be grounded to provide PCB mounting integrity and 2, 3 GND isolation between the two RF paths. 4 RFin2/Vg2 RF input pin for channel 2. Gate voltage bias pin for channel 2. 5 DC Bias 2 DC out bias for channel 2 6 Vpd2 Power down control voltage for channel 1 7 Ictrl2 Channel 2 drain current control 8, 13 NA No internal connection. These pins can be left floating or grounded. 10, 11 GND Internally connected. These pins must be externally grounded for functionality. 9 RFout2/Vd2 RF output pin for channel 2. Gate voltage bias pin for channel 2. 12 RFout1/Vd1 RF output pin for channel 1. Drain voltage bias pin for channel 1. 14 Ictrl1 Channel 1 drain current control 15 Vpd1 Power down control voltage for channel 1 16 DC Bias 1 DC out bias for channel 1 RF/DC Ground. Follow recommended via pattern and ensure good solder attach for Backside Paddle RF/DC GND best thermal and electrical performance. Evaluation Board PCB Information TriQuint PCB 1094098 Material and Stack-up 1 oz. Cu top layer 0.020 ± 0.002 Finished Board Thickness Rogers 4003 εr=3.5 typ. 1 oz. Cu bottom layer 50 ohm line dimensions: width = .040”, spacing = .020” Data Sheet March 1, 2018 | Subject to change without notice 8 of 10 www.qorvo.com TQL9066 50 – 1500 MHz Dual LNA ® Mechanical Information Package Marking and Dimensions Marking: Part number – TQL9066 Year, week - YYWW Assembly code - AaXXXX Pin #1 IDENTIFIER CHAMFER 0.300 x 45° 4.000±0.050 16X 0.65 Pitch 16X 0.30±0.05 TERMINAL #1 IDENTIFIER TQL9066 YYWW AaXXXX 4.000±0.050 16X 0.40±0.05 2.50±0.05 Exp. DAP 1.95 Ref. 2.50±0.05 Exp. DAP GND/THERMAL PAD .10 C 16X .850±0.050 .08 C SEATING PLANE 0.000 0.050 .203 Ref. C Notes: 1. All dimensions are in millimeters. Angles are in degrees. 2. Except where noted, this part outline conforms to JEDEC standard MO-220, Issue E (Variation VGGC) for thermally enhanced plastic very thin fine pitch quad flat no lead package (QFN). 3. Dimension and tolerance formats conform to ASME Y14.4M-1994. 4. The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP-012 PCB Mounting Pattern 3 0.65 PITCH PACKAGE OUTLINE 12X 16X 0.40 R.19 0.27 1 16X 0.80 1 2.30 0.64 0.55 2.30 COMPONENT SIDE Notes: 1. All dimensions are in millimeters. Angles are in degrees. 2. Use 1 oz. copper minimum for top and bottom layer metal. 3. We recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25 mm (0.10”). 4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance. Data Sheet March 1, 2018 | Subject to change without notice 9 of 10 www.qorvo.com TQL9066 50 – 1500 MHz Dual LNA ® Handling Precautions Parameter Rating Standard ESD – Human Body Model (HBM) Class 1A ESDA / JEDEC JS-001-2014 ESD – Charged Device Model (CDM) Class C3 ESDA / JEDEC JS-002-2014 MSL – Moisture Sensitivity Level Level 1 IPC/JEDEC J-STD-020 Caution! ESD-Sensitive Device Solderability Compatible with lead-free (260°C max. reflow temp.) soldering process. Solder profiles available upon request. Contact plating: NiPdAu RoHS Compliance This part is compliant with 2011/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment) as amended by Directive 2015/863/EU. This product also has the following attributes: • Lead Free • Halogen Free (Chlorine, Bromine) • Antimony Free • TBBP-A (C15H12Br402) Free • PFOS Free • SVHC Free Pb Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: www.qorvo.com Tel: 1-844-890-8163 Email: customer.support@qorvo.com For technical questions and application information: Email: appsupport@qorvo.com Important Notice The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Copyright 2018 © Qorvo, Inc. | Qorvo is a registered trademark of Qorvo, Inc. Data Sheet March 1, 2018 | Subject to change without notice 10 of 10 www.qorvo.com