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TQP3M9008

TQP3M9008

  • 厂商:

    ACTIVE-SEMI

  • 封装:

    SOT89

  • 描述:

    TQP3M9008

  • 数据手册
  • 价格&库存
TQP3M9008 数据手册
TQP3M9008 High Linearity LNA Gain Block ® General Description The TQP3M9008 is a cascadable, high linearity gain block amplifier in a low-cost surface-mount package. At 1.9 GHz, the amplifier typically provides 20.6 dB gain, +36 dBm OIP3, and 1.3 dB Noise Figure while only drawing 85 mA current. The device is housed in a leadfree/green/RoHS-compliant industry-standard SOT-89 package. 3-pin SOT-89 Package Product Features • • • • • • • • • The TQP3M9008 has the benefit of having high gain across a broad range of frequencies while also providing very low noise. This allows the device to be used in both receiver and transmitter chains for high performance systems. The amplifier is internally matched using a highperformance E-pHEMT process and only requires an external RF choke and blocking/bypass capacitors for operation from a single +5 V supply. The internal active bias circuit also enables stable operation over bias and temperature variations. The TQP3M9008 covers the 0.05 – 4 GHz frequency band and is targeted for wireless infrastructure or other applications requiring high linearity and/or low noise figure. 50 – 4000 MHz 20.6 dB Gain at 1.9 GHz +36 dBm Output IP3 1.3 dB Noise Figure at 1.9 GHz 50 Ohm Cascadable Gain Block Unconditionally stable High input power capability +5 V Single Supply, 85 mA Current SOT-89 Package Applications • • • • Repeaters Mobile Infrastructure LTE / WCDMA / EDGE / CDMA General Purpose Wireless Functional Block Diagram Backside Paddle - GND Ordering Information 1 2 RF IN GND 3 Part No. Description TQP3M9008 High Linearity LNA Gain Block TQP3M9008-PCB_IF 0.05 – 0.5 GHz Evaluation Board TQP3M9008-PCB_RF 0.5 – 4.0 GHz Evaluation Board RF OUT / VDD Standard T/R size = 1000 pieces on a 7” reel Datasheet, April 18, 2019 | Subject to change without notice 1 of 12 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® Absolute Maximum Ratings Parameter Recommended Operating Conditions Rating Storage Temperature RF Input Power, CW, 50Ω, T=25°C Device Voltage (VDD) Reverse Device Voltage −65 to 150 °C +23 dBm +7 V −0.3 V Operation of this device outside the parameter ranges given above may cause permanent damage. Parameter Min Typ Max Units Device Voltage (VDD) TCASE Tj for >106 hours MTTF +3.0 −40 +5.0 +5.25 +105 +190 V °C °C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Electrical Specifications Test conditions unless otherwise noted: VDD = +5 V, Temp. = +25 °C, 50 Ω system Parameter Operational Frequency Range Test Frequency Gain Input Return Loss Output Return Loss Output P1dB Output IP3 Noise Figure Current, IDD Thermal Resistance, θjc Conditions Min Typ 50 19 Pout = +3 dBm/tone, ∆f = 1 MHz Junction to case Datasheet, April 18, 2019 | Subject to change without notice 2 of 12 +32.5 1900 20.6 16 17 +20 +36 1.3 85 Max Units 4000 MHz MHz dB dB dB dBm dBm dB mA °C/W 22 100 38.7 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® S-Parameters Test Conditions: VDD = +5 V, IDD = 85 mA, Temp. = +25 °C, 50 Ω system, calibrated to device leads Freq (MHz) S11 (dB) S11 (ang) S21 (dB) S21 (ang) S12 (dB) S12 (ang) S22 (dB) S22 (ang) 50 -12.5 -170.0 23.6 172.9 -26.7 0.6 -9.8 177.2 100 -11.9 -175.1 23.5 167.7 -26.7 -1.9 -9.9 171.9 200 -11.4 178.0 23.1 159.5 -26.6 -5.5 -10.0 162.2 400 -11.4 167.0 22.7 144.1 -26.7 -12.9 -10.5 145.5 600 -11.6 154.1 22.3 129.4 -26.7 -19.6 -10.7 129.3 800 -11.8 147.2 22.0 114.6 -26.7 -26.1 -11.3 111.8 1000 -12.3 139.1 21.7 99.5 -26.8 -33.4 -12.4 94.3 1200 -12.7 132.1 21.4 85.6 -26.9 -39.9 -13.1 77.8 1400 -13.3 126.3 21.0 71.0 -27.1 -47.7 -14.3 58.7 1600 -13.6 116.9 20.8 56.2 -27.4 -56.5 -15.4 36.8 1800 -13.9 110.2 20.5 41.8 -27.6 -63.3 -16.3 15.3 2000 -14.3 103.5 20.3 27.9 -28.1 -71.6 -17.5 -11.2 2200 -15.1 94.6 19.9 13.8 -28.5 -80.2 -18.0 -39.1 2400 -15.8 85.2 19.7 -1.1 -28.7 -88.9 -17.4 -65.9 2600 -16.8 72.7 19.5 -16.0 -29.4 -96.8 -16.6 -94.2 2800 -18.0 55.2 19.2 -31.3 -29.9 -105.7 -14.9 -115.0 3000 -19.8 25.5 19.0 -46.9 -30.6 -117.1 -14.1 -131.7 3200 -19.9 -16.8 18.6 -63.5 -31.0 -128.0 -13.1 -148.3 3400 -17.8 -59.0 18.3 -80.5 -31.8 -139.4 -12.4 -160.2 3600 -14.3 -90.8 17.7 -98.5 -32.8 -154.4 -11.9 -173.9 3800 -11.3 -114.3 17.0 -117.1 -34.0 -168.1 -11.2 174.5 4000 -8.7 -132.7 16.1 -135.8 -34.8 173.1 -10.7 167.6 Datasheet, April 18, 2019 | Subject to change without notice 3 of 12 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® TQP3M9008-PCB_IF / RF Evaluation Board J3 J4 J3 VDD R1 0 J4 GND R1 C3 C1 L1 C3 Q1 L1 C2 C1 J1 C2 1 Q1 RF Input J2 3 RF Output 2, Backside Paddle Notes: 1. See Evaluation Board PCB section for material and stack-up. 2. Components shown on the silkscreen but not on the schematic are not used. 3. R1 (0 Ω jumper) may be replaced with copper trace in the target application layout. 4. The recommended component values are dependent upon the frequency of operation. 5. All components are of 0603 size unless stated on the schematic. Bill of Material − TQP3M9008-PCB_IF / RF Reference Designation TQP3M9008-PCB_IF (50~500 MHz) TQP3M9008-PCB_RF (500~4000MHz) TQP3M9008 1000 pF 0.01 μF 330 nH TQP3M9008 100 pF 0.01 μF 68 nH Q1 C1, C2 C3 L1 D1 R1 Do Not Place 0Ω Performance can be optimized at frequency of interest by using recommended component values shown in the table below. Reference Designation C1, C2 L1 500 (MHz) 2000 (MHz) 2500 (MHz) 3500 (MHz) 100 pF 82 nH 22 pF 22 nH 22 pF 18 nH 22 pF 15 nH Datasheet, April 18, 2019 | Subject to change without notice 4 of 12 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® Typical Performance − TQP3M9008-PCB_RF Test conditions unless otherwise noted: VDD=+5 V, IDD=85 mA, Temp=+25 °C, 50 Ω system Parameter Units Typical Value Frequency Gain Input Return Loss Output Return Loss 500 22.8 10 9.5 900 22.3 12 12 1900 20.6 16 17 2700 19.0 18 13 3500 17.6 10 12.4 4000 16.0 7.3 14 MHz dB dB dB Output P1dB OIP3 Noise figure +20.9 +37.5 1.1 +19.7 +37.6 1.1 +19.9 +36 1.3 +19.4 +35.3 1.6 +19.7 +34.7 2 +18.5 +33.7 2.5 dBm dBm dB Notes: 1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz. 2. Noise figure values in the table above includes board losses. Approx. =0.1dB at 2 GHz. Performance Plots − TQP3M9008-PCB_RF Test conditions unless otherwise noted: VDD = +5 V, IDD = 85 mA, Temp. = +25 °C, 50 Ω system 0 -40°C -20°C +25°C +85⁰C +85 C +25 C -40 C -20⁰C -10 18 -15 16 -20 1000 1500 2000 2500 3000 3500 4000 -20 500 1000 1500 2500 3000 3500 OIP3 vs. Pout/tone over Temp Noise Figure vs. Frequency over Temp 4 OIP3 (dBm) 2 1 0 2500 3000 3500 4000 Frequency (MHz) Datasheet, April 18, 2019 | Subject to change without notice 3500 4000 1 MHz tone spacing, 3 dBm/tone +25 C +85 C -40 C +25 C +85 C -40 C 40 35 35 30 25 2000 2000 2500 3000 Frequency (MHz) OIP3 vs. Frequency over Temp 30 1500 1500 45 40 +85 C +25 C -40 C 1000 1000 F=1900 MHz, 1 MHz tone spacing 45 500 500 4000 Frequency (MHz) Frequency (MHz) 3 2000 OIP3 (dBm) 500 -10 -15 -25 14 -40 C -20 C +25 C +85⁰C -5 S22 (dB) 20 0 -5 S11 (dB) Gain (dB) 22 NF (dB) S22 vs. Frequency over Temp S11 vs. Frequency over Temp Gain vs. Frequency over Temp 24 25 0 3 6 Pout/tone (dBm) 5 of 12 9 12 500 1000 1500 2000 2500 3000 Frequency (MHz) 3500 4000 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® Performance Plots − TQP3M9008-PCB_RF Test conditions unless otherwise noted: VDD = +5 V, IDD = 85 mA, Temp. = +25 °C, 50 Ω system P1dB vs. Frequency over Temp OIP2 vs. Frequency 55 22 Compression Curve 32 Pout = 3 dBm / tone, 1 MHz spacing, +5V, +25C TQP3M9008_PCB-RF Freq.=500 MHz 50 28 Temp.=+25°C 18 -40 C +25 C +85 C 16 45 Pout (dBm) OIP2 (dBm) P1dB (dBm) 20 40 1500 2000 2500 3000 3500 4000 0 500 1000 1500 OIP3 vs. Vdd 45 2000 2500 3000 3500 12 4000 -10 -6 -4 P1dB vs. Vdd 30 -2 0 2 4 6 8 10 12 14 Pin (dBm) Noise Figure vs. Vdd 3.0 Pout/tone = 3dBm Tone spacing = 1MHz 2.5 25 35 30 1900 MHz 900 MHz 2.0 NF (dB) 1900MHz 900MHz P1dB (dBm) OIP3 (dBm) -8 Frequency (MHz) Frequency (MHz) 40 P10dB 16 30 1000 20 P1dB 35 14 500 24 20 1900MHz 900MHz 1.5 1.0 15 0.5 25 10 3 4 5 6 7 0.0 3 4 5 Vdd (Volts) 6 3 4 5 6 7 Vdd (Volts) Idd vs. Temperature Idd vs Vdd 90 CW Signal 90 85 85 Idd (mA) Idd (mA) 7 Vdd (Volts) 80 75 80 75 70 70 65 3 4 5 6 -40 7 Vdd (Volts) Datasheet, April 18, 2019 | Subject to change without notice -15 10 35 60 85 Temperature (°C) 6 of 12 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® Typical Performance − TQP3M9008-PCB_IF Test conditions unless otherwise noted: VDD = +5 V, IDD = 85 mA, Temp. = +25 °C, 50 Ω system Parameter Units Typical Value Frequency Gain Input Return Loss Output Return Loss Output P1dB OIP3 Noise figure 70 23.2 10 9 100 23.2 11 9 200 22.9 11 10 500 22.3 11 10 MHz dB dB dB +19.8 +37 1.2 +20.2 +37 1.1 +19.9 +37 0.8 +19.9 +37 1.1 dBm dBm dB Notes: 1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz. 2. Noise figure values in the table above includes board losses. Approx. =0.1dB at 2 GHz. Performance Plots − TQP3M9008-PCB_IF Test conditions unless otherwise noted: VDD =+5 V, IDD =85 mA, Temp= +25 °C, 50 Ω system. -40 ⁰C -20 C +25 C +85 C 21 -40°C -20°C +25°C +85⁰C 19 -10 -20 -20 15 100 200 300 400 500 0 100 200 300 Frequency (MHz) Frequency (MHz) 400 3 OIP3 (dBm) 1 35 100 200 300 400 -40 C +25 C +85 C 14 0 500 500 18 16 25 0 400 20 30 0 300 22 -40 C +25 C +85 C 40 +85 C +25 C -40 C 200 P1dB vs. Frequency over Temp 1 MHz tone spacing, 3 dBm/tone 45 100 Frequency (MHz) OIP3 vs. Frequency over Temp Noise Figure vs. Frequency over Temp 4 2 0 500 P1dB (dBm) 0 -10 -15 -15 17 -20 C -40 C +25 C +85⁰C -5 S22 (dB) -5 S11 (dB) Gain (dB) 0 0 23 NF (dB) S22 vs. Frequency over Temp S11 vs. Frequency over Temp Gain vs. Frequency over Temp 25 100 200 300 400 500 0 100 200 300 400 500 Frequency (MHz) Frequency (MHz) Frequency (MHz) Compression Curve 32 TQP3M9008_PCB-IF Freq.=500 MHz 28 Pout (dBm) Temp.=+25°C 24 20 P10dB P1dB 16 12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 14 Pin (dBm) Datasheet, April 18, 2019 | Subject to change without notice 7 of 12 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® Pin Configuration and Description Backside Paddle - GND 1 2 RF IN GND 3 RF OUT / VDD Pin No. Label Description 1 RF IN 2, Backside Paddle GND RF input; matched to 50 Ω. External DC Block is required. RF/DC ground. Use recommended via hole pattern to minimize inductance and 3 RF OUT / VDD thermal resistance. See PCB Mounting Pattern for suggested footprint. RF output; matched to 50 Ω. External DC Block and bias voltage required. Evaluation Board PCB Qorvo PCB 1075825 Material and Stack-up 1 oz. Cu top layer Nelco N-4000-13 1 oz. Cu inner layer 0.062" ± 0.006" Finished Board Thickness Core 1 oz. Cu inner layer Nelco N-4000-13 1 oz. Cu bottom layer 50 Ω line dimensions: width = .028”, spacing = .028” Datasheet, April 18, 2019 | Subject to change without notice 8 of 12 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® Package Marking and Dimensions Package Marking Product Identifier: 3M9008 Lot Code: XXXX 3M9008 XXXX PCB Mounting Pattern 3.86 [0.152] 29X 3 1.26 [0.050] 0.63 [0.025] 0.76 [0.030] 4.50 [0.177] Ø.254 (.010) PLATED THRU VIA HOLES PACKAGE OUTLINE 2X 1.27 [0.050] 2X 0.58 [0.023] 2.65 [0.104] 2X 0.86 [0.034] 0.64 [0.025] 0.86 [0.034] 3.86 [0.152] NOTES: 1. All dimensions are in millimeters[inches]. Angles are in degrees. 2. Use 1 oz. copper minimum for top and bottom layer metal. 3. Via holes are required under the backside paddle of this device for proper RF/DC grounding and thermal dissipation. We recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25mm (0.01”). 4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance. 5. Place mounting screws near the part to fasten a backside heat sink. 6. Do not apply solder mask to the back side of the PC board in the heat sink contact region. 7. Ensure that the backside via region makes good physical contact with the heat sink. Datasheet, April 18, 2019 | Subject to change without notice 9 of 12 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® Tape and Reel Information – Carrier and Cover Tape Dimensions Feature Cavity Centerline Distance Measure Symbol Size (in) Size (mm) Length A0 0.181 4.60 Width B0 0.193 4.90 Depth K0 0.075 1.90 Pitch P1 0.315 8.00 Cavity to Perforation - Length Direction P2 0.079 2.00 Cavity to Perforation - Width Direction F 0.217 5.50 Cover Tape Width C 0.362 9.20 Carrier Tape Width W 0.472 12.0 Datasheet, April 18, 2019 | Subject to change without notice 10 of 12 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® Tape and Reel Information – Reel Dimensions Standard T/R size = 1,000 pieces on a 7” reel. Feature Flange Hub Measure Symbol Size (in) Size (mm) Diameter A 6.969 170.0 Thickness W2 0.717 18.2 Space Between Flange W1 0.504 12.8 Outer Diameter N 2.283 58.0 Arbor Hole Diameter C 0.512 13.0 Key Slit Width B 0.079 2.0 Key Slit Diameter D 0.787 20.0 Tape and Reel Information – Tape Length and Label Placement Notes: 1. Empty part cavities at the trailing and leading ends are sealed with cover tape. See EIA 481-1-A. 2. Labels are placed on the flange opposite the sprockets in the carrier tape. Datasheet, April 18, 2019 | Subject to change without notice 11 of 12 www.qorvo.com TQP3M9008 High Linearity LNA Gain Block ® Handling Precautions Parameter Rating Standard ESD – Human Body Model (HBM) Class 1A ESDA / JEDEC JS-001-2012 ESD – Charged Device Model (CDM) Class C3 JEDEC JESD22-C101F MSL – Moisture Sensitivity Level Level 1 IPC/JEDEC J-STD-020 Caution! ESD-Sensitive Device Solderability Compatible with both lead-free (260°C max. reflow temp.) and tin/lead (245°C max. reflow temp.) soldering processes. Solder profiles available upon request. Contact plating: Matte Tin RoHS Compliance This part is compliant with 2011/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment) as amended by Directive 2015/863/EU. This product also has the following attributes: • Lead Free • Halogen Free (Chlorine, Bromine) • • • • Antimony Free TBBP-A (C15H12Br402) Free PFOS Free SVHC Free Pb Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: www.qorvo.com Tel: 1-844-890-8163 Email: customer.support@qorvo.com For technical questions and application information: Email: appsupport@qorvo.com Important Notice The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Copyright 2019 © Qorvo, Inc. | Qorvo is a registered trademark of Qorvo, Inc. Datasheet, April 18, 2019 | Subject to change without notice 12 of 12 www.qorvo.com
TQP3M9008 价格&库存

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TQP3M9008
    •  国内价格
    • 10+48.38060
    • 50+46.65280
    • 100+45.35690
    • 500+44.92490
    • 1000+44.06090
    • 3000+43.19700

    库存:0