TQP3M9009
High Linearity LNA Gain Block
®
General Description
The TQP3M9009 is a cascadable, high linearity gain block
amplifier in a low-cost surface-mount package. At 1.9 GHz,
the amplifier is targeted to provide 21.8 dB gain, +39.5 dBm
OIP3, and 1.3 dB Noise Figure while only drawing 125 mA
current. The device is housed in a leadfree/green/RoHScompliant industry-standard SOT-89 package using a
NiPdAu plating to eliminate the possibility of tin whiskering.
3-pin SOT- 89 Package
Product Features
•
•
•
•
•
•
•
•
•
The TQP3M9009 has the benefit of having high gain across
a broad range of frequencies while also providing very low
noise. This allows the device to be used in both receiver
and transmitter chains for high performance systems. The
amplifier is internally matched using a high performance EpHEMT process and only requires an external RF choke
and blocking/bypass capacitors for operation from a single
+5V supply. The internal active bias circuit also enables
stable operation over bias and temperature variations.
50 – 4000 MHz
21.8 dB Gain At 1.9 GHz
+39.5 dBm Output IP3
1.3 dB Noise Figure At 1.9 GHz
50 Ohm Cascadable Gain Block
Unconditionally Stable
High input power capability
+5V Single Supply, 125 mA Current
SOT-89 Package
The TQP3M9009 covers the 0.05 – 4 GHz frequency band
and is targeted for wireless infrastructure or other
applications requiring high linearity and/or low noise figure.
Applications
•
•
•
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Functional Block Diagram
Repeaters
Mobile Infrastructure
LTE / WCDMA / EDGE / CDMA
General Purpose Wireless
GND
4
Ordering Information
1
2
RF IN
GND
3
RF OUT
Part No.
Description
TQP3M9009
High Linearity LNA Gain Block
TQP3M9009-PCB_IF 0.05 – 0.5 GHz Evaluation Board
TQP3M9009-PCB_RF 0.5 – 4 GHz Evaluation Board
Standard T/ R size = 1000 pieces on a 7” reel
Datasheet, October 2, 2018 | Subject to change without notice
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TQP3M9009
High Linearity LNA Gain Block
®
Absolute Maximum Ratings
Recommended Operating Conditions
Parameter
Rating
Storage Temperature
RF Input Power, CW, 50 Ω, T=25 °C
Device Voltage (VDD)
Reverse Device Voltage
−65 to +150 °C
+23 dBm
+7 V
−0.3 V
Operation of this device outside the parameter ranges
given above may cause permanent damage.
Parameter
Min
Typ
Max Units
Device Voltage (VDD)
TCASE
Tj for >106 hours MTTF
+3.0
-40
+5.0
+5.25
+105
+190
V
°C
°C
Electrical specifications are measured at specified test
conditions. Specifications are not guaranteed over all
recommended operating conditions.
Electrical Specifications
Test conditions unless otherwise noted: VDD=+5 V, Temp=+25 °C, 50 Ω system
Parameter
Operational Frequency Range
Test Frequency
Gain
Input Return Loss
Output Return Loss
Output P1dB
Output IP3
Noise Figure
Current, IDD
Thermal Resistance, θjc
Conditions
Min
Typ
50
20
Pout=+3 dBm / tone, ∆f=1 MHz
Junction to case
Datasheet, October 2, 2018 | Subject to change without notice
2 of 12
+36.5
1900
21.8
13
14
+22
+39.5
1.3
125
Max
Units
4000
MHz
MHz
dB
dB
dB
dBm
dBm
dB
mA
°C/W
23
150
34
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TQP3M9009
High Linearity LNA Gain Block
®
S-Parameters
Test Conditions: VDD=+5 V, IDD=125 mA, T=+25 °C, 50 Ω system, calibrated to device leads
Freq (MHz)
50
100
200
400
600
800
1000
1200
1400
1600
1800
2000
2200
2400
2600
2800
3000
3200
3400
3600
3800
4000
S11 (dB)
−16.66
−14.86
−13.56
−12.51
−11.37
−10.40
−9.76
−9.31
−8.84
−8.51
−8.33
−8.16
−8.01
−8.06
−8.13
−8.14
−8.00
−8.13
−7.86
−7.65
−7.20
−6.39
S11 (ang)
−149.04
−157.51
−165.34
−173.30
178.88
169.81
160.89
150.48
139.39
128.52
116.42
104.69
92.36
79.88
66.42
51.54
35.02
17.50
−3.63
−26.69
−52.39
−79.22
S21 (dB)
27.36
27.12
26.70
26.14
25.53
24.85
24.16
23.40
22.82
22.31
21.66
21.23
20.82
20.33
20.02
19.74
19.52
19.28
19.10
18.91
18.59
18.17
Datasheet, October 2, 2018 | Subject to change without notice
S21 (ang)
171.55
166.00
156.36
137.87
119.50
102.41
86.01
70.36
55.48
41.20
27.52
13.67
0.68
−13.12
−26.88
−41.54
−55.82
−71.00
−87.06
−103.86
−121.75
−140.35
3 of 12
S12 (dB)
−29.65
−29.37
−29.26
−29.42
−29.63
−30.03
−30.28
−30.96
−31.05
−31.76
−2.00
−32.50
−33.07
−33.72
−34.02
−34.42
−35.18
−36.25
−36.83
−37.20
−38.27
−39.25
S12 (ang)
1.22
−1.50
−5.67
−14.20
−21.58
−28.26
−35.35
−40.26
−46.78
−51.29
−58.53
−63.59
−66.83
−72.40
−77.18
−81.16
−86.54
−88.92
−94.66
−96.43
−102.65
−102.05
S22 (dB)
−13.56
−13.09
−12.78
−13.06
−13.69
−14.46
−15.64
−16.58
−17.14
−17.34
−17.04
−16.80
−16.28
−15.48
−14.43
−13.66
−12.61
−11.99
−11.31
−10.62
−10.05
−9.83
S22 (ang)
179.33
174.97
159.12
133.47
110.30
86.04
62.04
37.31
11.49
−12.33
−33.75
−57.05
−76.12
−95.17
−113.34
−128.34
−142.44
−157.55
−167.91
−179.13
170.24
159.78
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TQP3M9009
High Linearity LNA Gain Block
®
TQP3M9009-PCB_IF / RF Evaluation Board
J3
J4
J3 VDD
R1
0
J4 GND
R1
C3
L1
C3
Q1
C1
L1
C2
J1
C1
C2
1
Q1
RF
Input
J2
3
RF
Output
2, Backside Paddle
Notes:
1. See PC Board Layout, page 8 for more information.
2. Components shown on the silkscreen but not on the schematic are not used.
3. R1 (0 Ω jumper) may be replaced with copper trace in the target application layout.
4. The recommended component values are dependent upon the frequency of operation.
5. All components are of 0603 size unless stated on the schematic.
Bill of Material – TQP3M9009-PCB_IF / RF
Reference Designation
Q1
C1, C2
C3
L1
D1
R1
TQP3M9009-PCB_IF
50 – 500 MHz
TQP3M9009-PCB_RF
500 – 4000 MHz
TQP3M9009
1000 pF
0.01 uF
330 nH
TQP3M9009
100 pF
0.01 uF
68 nH
Do Not Place
0 Ω
Performance can be optimized at frequency of interest by using recommended component values shown in the table below.
Reference
Designation
C1, C2
L1
500
100 pF
82 nH
Datasheet, October 2, 2018 | Subject to change without notice
Frequency (MHz)
2000
2500
3500
22 pF
22 nH
22 pF
15 nH
4 of 12
22 pF
18 nH
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TQP3M9009
High Linearity LNA Gain Block
®
Typical Performance – TQP3M9009-PCB_RF
Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.
Parameter
Units
Typical Value
Frequency
Gain
Input Return Loss
Output Return Loss
500
25.7
12
11
900
24.7
12
13
1900
21.8
13
14
2700
20
13
10
3500
18.9
8
10
4000
18
6
11.5
MHz
dB
dB
dB
Output P1dB
OIP3 (1)
Noise figure (2)
+22.5
+41.4
0.9
+21.8
+40.5
0.9
+22
+39.5
1.3
+21.6
+39
1.7
+21.8
+37.9
2.1
+20.7
+35.8
2.4
dBm
dBm
dB
Notes:
1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz.
2. Noise figure values in the table above includes board losses. Approx. =0.1dB at 2 GHz.
Performance Plots − TQP3M9009-PCB_RF
Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.
Gain vs. Frequency
30
Input Return Loss vs. Frequency
0
Output Return Loss vs. Frequency
0
+85°C
-5
-5
−20°C
+25°C
|S22| (dB)
20
−20°C
-10
−40°C
-20
-20
10
1000
1500
2000
2500
3000
3500
500
4000
1000
1500
2000
2500
3000
3500
500
4000
1000
1500
Noise Figure vs. Frequency
Output IP3 vs. Pout / Tone
50
2000
2500
45
2
−40°C
+85°C
OIP3 (dBm)
OIP3 (dBm)
NF (dB)
+85°C
+25°C
+25°C
−40°C
40
35
1
500
1000
1500
2000
2500
3000
3500
2
4
6
8
10
12
500
P1dB vs. Frequency
1500
2500
3000
3500
4000
Output IP2 vs. Frequency
65
Pout = +3 dBm / Tone
1 MHz Tone Spacing
CW Signal
125
+25°C
2000
Frequency (MHz)
IDD vs. Temperature
130
+85°C
24
1000
Pout / Tone (dBm)
Frequency (MHz)
26
−40°C
30
0
4000
+25°C
40
35
30
0
4000
Pout=+3 dBm/tone
1 MHz Tone Spacing,
45
+85°C
3500
Output IP3 vs. Frequency
50
Freq = 1900 MHz
1 MHz Tone Spacing
3
3000
Frequency (MHz)
Frequency (MHz)
Frequency (MHz)
4
−20°C
−40°C
-10
-15
-15
15
500
+25°C
+85°C
−40°C
|S11| (dB)
Gain (dB)
+85°C
+25°C
25
Temp.=+25°C
60
20
OIP2 (dBm)
IDD (mA)
P1dB (dB)
−40°C
22
120
115
110
18
500
1000
1500
2000
2500
3000
3500
4000
Frequency (MHz)
Datasheet, October 2, 2018 | Subject to change without notice
50
45
105
16
55
40
-40
-15
10
35
Temperature (°C)
5 of 12
60
85
0
500
1000
1500
2000
2500
3000
3500
4000
Frequency (MHz)
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TQP3M9009
High Linearity LNA Gain Block
®
Performance Plots − TQP3M9009-PCB_RF (contd.)
Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.
Output IP3 vs. VDD
45
Noise Figure vs. VDD
3.0
Temp.=+25°C
Temp.=+25°C
2.5
25
35
1900 MHz
900 MHz
2.0
NF (dB)
P1dB (dBm)
40
OIP3 (dBm)
P1dB vs. VDD
30
Temp.=+25°C
Pout/tone = +3 dBm
Tone Spacing = 1 MHz
20
1900 MHz
900 MHz
30
15
25
10
1900 MHz
1.5
900 MHz
1.0
0.5
3
4
5
6
0.0
3
7
4
5
6
7
VDD (Volts)
VDD (Volts)
3
4
5
6
7
VDD (Volts)
IDD vs VDD
125
Temp.=+25°C
IDD (mA)
120
115
110
105
3
4
5
6
7
VDD (Volts)
Datasheet, October 2, 2018 | Subject to change without notice
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TQP3M9009
High Linearity LNA Gain Block
®
Typical Performance − TQP3M9009-PCB_IF
Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.
Parameter
Units
Typical Value
Frequency
Gain
Input Return Loss
Output Return Loss
Output P1dB
OIP3 (1)
Noise figure (2)
70
27
12
11
100
26.8
13
11
200
26.4
13
12
500
25.8
13
13
MHz
dB
dB
dB
+21.6
+37.6
1.4
+21.9
+38.8
1.3
+21.9
+39
0.9
+22.2
+41.4
0.9
dBm
dBm
dB
Notes:
1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz.
2. Noise figure values in the table above includes board losses. Approx. =0.1 dB at 2 GHz.
Performance Plots − TQP3M9009-PCB_IF
Test conditions unless otherwise noted: VDD=+5 V, IDD=125 mA, Temp=+25 °C, 50 Ω system.
Gain vs. Frequency
30
Input Return Loss vs. Frequency
0
Output Return Loss vs. Frequency
0
+85°C
+25°C
24
+25°C
−20°C
-10
−40°C
-20
200
300
400
500
−40°C
-10
-20
0
100
Frequency (MHz)
200
300
400
500
0
100
Frequency (MHz)
Noise Figure vs. Frequency
2.5
−20°C
-15
-15
22
200
300
400
500
400
500
Frequency (MHz)
Output IP3 vs. Pout/Tone
50
P1dB vs. Frequency
26
Pout=3 dBm/Tone
1 MHz Tone Spacing,
2.0
+85°C
45
1.5
+25°C
−40°C
1.0
−40°C
40
0.0
100
200
300
400
500
Frequency (MHz)
Datasheet, October 2, 2018 | Subject to change without notice
−40°C
22
18
30
0
+25°C
20
35
0.5
+85°C
24
+25°C
P1dB (dB)
+85°C
OIP3 (dBm)
NF (dB)
|S22| (dB)
26
100
+25°C
+85°C
−40°C
0
+85°C
-5
-5
−20°C
|S11| (dB)
Gain (dB)
28
0
100
200
300
Pout / Tone (dBm)
7 of 12
400
500
0
100
200
300
Frequency (MHz)
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TQP3M9009
High Linearity LNA Gain Block
®
Pin Configuration and Description
Backside Paddle - GND
1
2
RF IN
GND
3
RF OUT / VDD
Pin No.
Label
Description
1
RF IN
2, Backside Paddle
GND
RF input; matched to 50 ohms. External DC Block is required.
RF/DC ground. Use recommended via pattern to minimize inductance and thermal
3
RF OUT / VDD
resistance. See PCB Mounting Pattern for suggested footprint.
RF output, matched to 50 ohms. External DC Block and bias voltage required.
Evaluation Board PCB Information
Qorvo PCB 1075825 Material and Stack-up
1 oz. Cu top layer
0.014"
Nelco N-4000-13
1 oz. Cu inner layer
0.062 ± 0.006
Finished Board
Thickness
Nelco N-4000-13
εr=3.7 typ.
1 oz. Cu inner layer
0.014"
Nelco N-4000-13
1 oz. Cu bottom layer
50 ohm line dimensions: width = .028”, spacing = .028”
Datasheet, October 2, 2018 | Subject to change without notice
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TQP3M9009
High Linearity LNA Gain Block
®
Package Marking and Dimensions
Package Marking:
Part Identifier − 3M9009
Assembly Code − XXXX
3M9009
XXXX
PCB Mounting Pattern
3.86 [0.152]
29X
3
1.26 [0.050]
0.63 [0.025]
0.76 [0.030]
4.50 [0.177]
Ø.254 (.010) PLATED THRU VIA HOLES
PACKAGE OUTLINE
2X 1.27 [0.050]
2X 0.58 [0.023]
2.65 [0.104]
2X 0.86 [0.034]
0.64 [0.025]
0.86 [0.034]
3.86 [0.152]
NOTES:
1. All dimensions are in millimeters[inches]. Angles are in degrees.
2. Use 1 oz. copper minimum for top and bottom layer metal.
3. Via holes are required under the backside paddle of this device for proper RF/DC grounding and thermal dissipation. We
recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25mm (0.01”).
4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance.
Datasheet, October 2, 2018 | Subject to change without notice
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TQP3M9009
High Linearity LNA Gain Block
®
Tape and Reel Information – Carrier and Cover Tape Dimensions
Feature
Cavity
Centerline Distance
Measure
Symbol
Size (in)
Size (mm)
Length
A0
0.181
4.60
Width
B0
0.193
4.90
Depth
K0
0.075
1.90
Pitch
P1
0.315
8.00
Cavity to Perforation - Length Direction
P2
0.079
2.00
Cavity to Perforation - Width Direction
F
0.217
5.50
Cover Tape
Width
C
0.362
9.20
Carrier Tape
Width
W
0.472
12.0
Datasheet, October 2, 2018 | Subject to change without notice
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TQP3M9009
High Linearity LNA Gain Block
®
Tape and Reel Information – Reel Dimensions
Standard T/R size = 1,000 pieces on a 7” reel.
Feature
Flange
Hub
Measure
Symbol
Size (in)
Size (mm)
Diameter
A
6.969
170.0
Thickness
W2
0.717
18.2
Space Between Flange
W1
0.504
12.8
Outer Diameter
N
2.283
58.0
Arbor Hole Diameter
C
0.512
13.0
Key Slit Width
B
0.079
2.0
Key Slit Diameter
D
0.787
20.0
Tape and Reel Information – Tape Length and Label Placement
Notes:
1. Empty part cavities at the trailing and leading ends are sealed with cover tape. See EIA 481-1-A.
2. Labels are placed on the flange opposite the sprockets in the carrier tape.
Datasheet, October 2, 2018 | Subject to change without notice
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TQP3M9009
High Linearity LNA Gain Block
®
Handling Precautions
Parameter
Rating
Standard
ESD – Human Body Model (HBM)
Class 1A
ESDA / JEDEC JS-001-2012
ESD – Charged Device Model (CDM)
Class C3
JEDEC JESD22-C101F
MSL – Moisture Sensitivity Level
Level 1
IPC/JEDEC J-STD-020
Caution!
ESD-Sensitive Device
Solderability
Compatible with both lead-free (260°C max. reflow temp.) and tin/lead (245°C max. reflow temp.) soldering processes.
Solder profiles available upon request.
Contact plating: Matte Tin
RoHS Compliance
This part is compliant with 2011/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and
Electronic Equipment) as amended by Directive 2015/863/EU.
This product also has the following attributes:
• Lead Free
• Halogen Free (Chlorine, Bromine)
•
•
•
•
Pb
Antimony Free
TBBP-A (C15H12Br402) Free
PFOS Free
SVHC Free
Contact Information
For the latest specifications, additional product information, worldwide sales and distribution locations:
Web: www.qorvo.com
Tel: 1-844-890-8163
Email: customer.support@qorvo.com
For technical questions and application information:
Email: appsupport@qorvo.com
Important Notice
The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained
herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained
herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for
Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any
patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by
such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED
HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER
EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE,
INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical,
life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal
injury or death.
Copyright 2018 © Qorvo, Inc. | Qorvo is a registered trademark of Qorvo, Inc.
Datasheet, October 2, 2018 | Subject to change without notice
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