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TQP3M9036

TQP3M9036

  • 厂商:

    ACTIVE-SEMI

  • 封装:

    DFN8

  • 描述:

    TQP3M9036

  • 数据手册
  • 价格&库存
TQP3M9036 数据手册
TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Product Overview The TQP3M9036 is a high linearity, ultra-low noise gain block amplifier in a small 2x2 mm surface-mount package. At 900 MHz, the amplifier typically provides high 19.8 dB gain, +36 dBm OIP3, and 0.45 dB Noise Figure while drawing 68 mA current from a 5V supply. The amplifier does not require any negative supplies for operation and can be biased from positive supply rails from 3.3 to 5 V. The device is housed in a lead-free/green/RoHS-compliant industry-standard 2x2 mm package. The TQP3M9036 is internally matched using a highperformance E-pHEMT process and only requires 4 external components for operation from a single positive supply: an external RF choke and blocking/bypass capacitors. The low noise amplifier contains an internal active bias to maintain high performance over temperature and integrates a shut-down biasing capability for TDD applications. The TQP3M9036 covers the 50−2000 MHz frequency band and is targeted for wireless infrastructure. The LNA is pin compatible with the high-band, 1500−2700 MHz TQP3M9037. Functional Block Diagram Pin 1 Reference Mark NC 1 8 NC RF In 2 7 RF Out NC 3 6 Shut Down NC 4 5 NC 8-pin 2x2 mm DFN Package Key Features • 50−2000 MHz Operational Bandwidth • Ultra-low noise figure, 0.45 dB NF at 900 MHz • High gain, 19.8 dB Gain at 900 MHz • High linearity, +36 dBm Output IP3 • High input power ruggedness, >22 dBm PIN, MAX • Unconditionally stable • Integrated on-chip matching, 50 ohm in/out • Integrated active bias • Integrated shutdown control pin • 3-5 V positive supply voltage: −Vgg not required • Pin compatible with high-band TQP3M9037 Applications • • • • • Repeaters Mobile Infrastructure LTE / WCDMA / CDMA / GSM General Purpose Wireless TDD or FDD systems Backside Paddle - RF/DC GND Top View Ordering Information Part No. Description TQP3M9036 TQP3M9036−PCB Ultra low noise, High IP3 LNA 100−2000 MHz Evaluation Board Standard T/R size = 2500 pieces on a 7” reel Datasheet, November 27, 2018 | Subject to change without notice 1 of 12 www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Absolute Maximum Ratings Parameter Storage Temperature RF Input Power, CW, 50 Ω, T=+25 °C Device Voltage (VDD) Recommended Operating Conditions Rating −65 to 150 °C +22 dBm +7 V Parameter Min Typ Max Units Device Voltage (VCC) TCASE Tj for >106 hours MTTF +3.3 −40 +5.0 +5.25 +105 +190 V °C °C Electrical specifications are measured at specified test conditions. Specifications are not guaranteed over all recommended operating conditions. Operation of this device outside the parameter ranges given above may cause permanent damage. Electrical Specifications Test conditions unless otherwise noted: VDD = +5V, Temp=+25°C, 50 Ω system. Parameter Conditions Operational Frequency Range Test Frequency Gain Input Return Loss Output Return Loss Output P1dB Output IP3 Noise Figure Min 50 18.2 Note 1 Note 1 Power Shutdown Control (3) Current, IDD Shutdown pin current, ISD Switching Speed (4) Thermal Resistance, θjc Typ Pout=+5 dBm/tone, Δf=1 MHz +32 On state Off state (Power down) 0 2.5 On state Off state (Power down) VPD ≥ 3 V ON time (50%Ctrl to 90% RF) OFF time (50%Ctrl to 10% RF) channel to case 40 900 19.8 13 11 +20 +36 0.45 3.3 68 3 140 1 0.5 62 Max Units 2000 MHz MHz dB dB 21.2 0.75 0.4 VDD 90 4 dB dBm dBm dB V V mA mA µA µs µs °C/W Notes: 1. Input and output return loss can be improved to better than 15 dB with minimal impact on noise figure by adjusting the values of the bias inductor and output DC blocking capacitor. Refer to the Optimized Return Loss reference design on page 7. 2. Current can be reduced by operating at a lower device voltage. (example: I dd=50 mA at Vdd=4 V) 3. Voltage referred to J5 turret on evaluation board (pg.4). 4. Switching speed can be improved by reducing the value of C1 of schematic on pg. 4. Pin 6 (VPD) voltage limits Vlow Vhigh min 0 0.5 Max 0.1 VDD Datasheet, November 27, 2018 | Subject to change without notice Units V V 2 of 12 www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Device Characterization Data S-Parameters Test conditions unless otherwise noted: VDD=+5 V, IDD=68 mA (typ.), Temp=+25°C, 50 Ohm system Freq (MHz) S11 (dB) S11 (ang) S21 (dB) S21 (ang) S12 (dB) S12 (ang) S22 (dB) S22 (ang) 50 100 200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 -7.1 -7.3 -8.0 -9.8 -11.4 -12.6 -13.6 -14.4 -14.9 -15.4 -15.7 -15.9 -16.2 -16.4 -16.7 -16.9 -11.1 -13.5 -20.6 -30.6 -34.6 -36.2 -36.1 -35.7 -34.8 -33.9 -33.2 -32.6 -32.1 -31.3 -30.5 -29.6 28.4 28.1 27.2 24.8 22.5 20.6 19.0 17.6 16.4 15.4 14.4 13.6 12.8 12.1 11.5 10.9 167.9 160.6 145.9 124.1 109.8 99.5 91.3 84.4 78.3 72.7 67.6 62.8 58.2 53.8 49.5 45.3 -33.8 -33.5 -32.6 -30.1 -27.5 -25.4 -23.7 -22.2 -20.9 -19.9 -18.9 -18.0 -17.2 -16.4 -15.8 -15.1 13.3 16.7 28.7 45.5 53.1 56.2 56.8 56.4 55.1 53.4 51.4 49.3 47.0 44.6 42.0 39.4 -22.8 -20.1 -15.8 -12.4 -11.3 -10.9 -10.6 -10.5 -10.4 -10.3 -10.2 -10.2 -10.2 -10.2 -10.2 -10.3 -2.8 27.8 32.8 17.7 4.5 -5.8 -14.5 -22.1 -29.2 -35.6 -41.6 -47.2 -52.9 -58.3 -63.6 -69.2 Noise Parameters Test conditions unless otherwise noted: VDD=+5 V, IDD=68 mA (typ.), Temp=+25°C, 50 Ohm system Freq (MHz) NFmin (dB) MagOpt (mag) AngOpt (deg) Rn (Ω) 700 0.356 0.187 10.9 0.062 900 0.452 0.174 22.2 0.060 1100 0.415 0.140 12.1 0.061 1300 0.406 0.142 23.7 0.062 1500 0.377 0.116 -6.64 0.069 1700 0.346 0.115 23.6 0.062 Datasheet, November 27, 2018 | Subject to change without notice 3 of 12 www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Application Circuit – TQP3M9036-PCB J5 J4 C4 J3 J3 VDD R 3 1 uF J4 GND C3 L1 C4 C3 C1 100 pF L1 68 nH (0603) C2 C2 U1 R2 R1 J1 RF Input C1 2 7 Q1 6 100 pF 100 pF J2 RF Output 1,3,4,5,8 R2 33k  C5 R1 10k  C6 J5 PD See note 6. Resistors are not needed if shut-down functionality is not used. Notes: 1. See Evaluation Board PCB Information section for material and stack-up. 2. R3 (0 Ω jumper) is not shown on the schematic and may be replaced with copper trace in the target application layout. 3. All components are of 0402 size unless stated on the schematic. 4. C1, C2, and C3 are non-critical values. The reactive impedance should be as low as possible at the frequency of operation for optimal performance. 5. The L1 value is non-critical and needs to provide high reactive impedance at the frequency of operation. 6. R1 and R2 are optional and do not need to be loaded if the shut-down functionality is not needed; i.e. FDD applications. If R1 and R2 are not loaded, the LNA will operate in its standard “ON” state. 7. A through line is included on the evaluation board for board loss measurement and de-embedding. Bill of Material − TQP3M9036-PCB Reference Des. Value Description U1 R1 R2 R3 L1 C4 C1, C2, C3, C5, C6 J3, J4, J5 10K Ω 33K Ω 0Ω 68 nH 1.0 μF 100 pF - PCB, Printed Circuit Board AMP, Ultra-Low Noise, High Linearity RES, 0402, 5%, 1/16W RES, 0402, 5%, 1/16W RES, 0402, 5%, 1/16W IND, 0603, 5%, Ceramic CAP, 0402, 10%, 10V, X5R CAP, 0402, 5%, 50V, NPO/COG Solder Turret Datasheet, November 27, 2018 | Subject to change without notice Manuf. 4 of 12 Qorvo Qorvo various various various various various various various Part Number 1084112 TQP3M9036 various various various various various various various www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Γopt and S11* TQP3M9036 0.8 1.0 Conj(S(1,1)) Swp Max 2. 0 6 0. 0.91GHz GMN() 0. 4 0 3. 0 4. 5.0 S11* 0.2 10.0 5.0 4.0 3.0 2.0 1.0 0.8 0.6 0.4 0 0.2 10.0 -10.0 2 -0. ΓOPT -4 .0 -5. 0 -3 .0 Datasheet, November 27, 2018 | Subject to change without notice .0 -2 -1.0 -0.8 -0 .6 .4 -0 5 of 12 Swp Min 0.9GHz www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Typical Performance – TQP3M9036-PCB VDD = 5 V, 25ºC Typical Parameter Conditions Test conditions unless otherwise noted: VDD = +5 V, IDD = 68 mA (typ.), Temp=+25°C 600 22.5 -11 -11.5 +23.5 Frequency Gain Input Return Loss Output Return Loss Output P1dB Output IP3 Noise figure (1) Pout= +5 dBm/tone, Δf=1 MHz +36 0.38 Value Units 700 20.8 -11.2 -10.4 900 19.1 -12.7 -11.0 1500 15.1 -14.3 -11.1 2000 13 -13.5 -8.6 MHz dB dB dB +23.1 +34.2 0.38 +23.2 +35.2 0.4 +23.2 +36 0.44 +23.2 +37 0.52 dBm dBm dB Notes: 1. Noise figure data shown in the table above is de-embedded from the eval board loss. Performance Plots – TQP3M9036-PCB VDD = 5 V Test conditions unless otherwise noted: VDD = +5 V, IDD = 68 mA, TCASE = +25°C, 50 Ω system Gain vs. Frequency 27 Input Return Loss vs. Frequency 0 Output Return Loss vs. Frequency 0 +85°C 23 Gain (dB) +25°C 21 40°C 19 17 15 -5 Output Return Loss (dB) Input Return Loss (dB) 25 +85°C +25°C -10 40°C -15 -20 13 -25 11 400 600 800 1000 1200 1400 1600 1800 600 800 1000 +25°C 40°C -10 -15 1200 1400 1600 1800 2000 400 OIP3 vs Pout/tone OIP3 vs Frequency 40 34 600 MHz 700 MHz 800 MHz 900 MHz 1000 MHz 36 34 3 5 7 9 700 11 750 800 Gain vs. Frequency (Shut-Down Mode) 850 900 950 +25°C −40°C 0.4 0 1000 400 800 K Factor vs. Frequency 5 1200 2000 Idd vs. Shutdown Voltage 90 Temp.=+25°C 75 4 +85°C +25°C -20 3 Idd (mA) K Factor 60 Gain (dB) 1600 Frequency (MHz) VDD = +5 V VPD = +3.3 V -10 2000 0.6 Frequency (MHz) Pout/tone (dBm) 0 1800 0 30 1 1600 0.2 32 30 1400 +85°C 0.8 Noise Figure (dB) OIP3 (dBm) OIP3 (dBm) 36 1200 Board losses de-embeded −40 °C 38 38 1000 Noise Figure vs. Frequency 1 +85 °C +25 °C -1 800 Frequency (MHz) Temp.=+25 °C 32 600 Frequency (MHz) Frequency (MHz) 40 +85°C -20 400 2000 -5 2 40°C 45 30 -30 1 15 0 -40 0 1000 2000 3000 4000 Frequency (MHz) Datasheet, November 27, 2018 | Subject to change without notice 0 0 2 4 6 8 10 12 Frequency (MHz) 6 of 12 14 16 18 20 0 1 2 3 4 5 Shutdown Voltage (V) www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Typical Performance − TQP3M9036-PCB VDD = 3.3 V Parameter Conditions Test conditions unless otherwise noted: VDD=+3.3 V, IDD=45 mA (typ.), Temp=+25°C Units Typical Value Frequency Gain Input Return Loss Output Return Loss 700 21 10.6 11.8 900 19.3 12.2 11.5 1500 15.3 14.3 10 2000 12.8 13.8 8.7 MHz dB dB dB Output P1dB Output IP3 Noise figure (1) +17.7 +31.1 0.38 +18.1 +31.7 0.4 +20.5 +32.9 0.44 +20.7 +33.7 0.52 dBm dBm dB Pout= +5 dBm/tone, Δf=1 MHz Notes: 1. Noise figure data shown in the table above is de-embedded from the eval board loss. Performance Plots – TQP3M9036-PCB VDD = 3.3 V Test conditions unless otherwise noted: VDD =+3.3 V, IDD = 45 mA, TCASE = +25°C, 50 Ω system Gain vs. Frequency 27 Input Return Loss vs. Frequency 0 Temp.=+25°C Output Return Loss vs. Frequency 0 Temp.=+25°C Temp.=+25°C Gain (dB) 23 21 19 17 15 -5 Output Return Loss (dB) Input Return Loss (dB) 25 -10 -15 -20 13 11 -25 400 600 800 1000 1200 1400 1600 1800 2000 600 800 1200 1400 1600 1800 2000 25 20 800 6 7 1000 1200 1400 1600 0.8 4 0.6 3 0.4 8 Pout/Tone (dBm) Datasheet, November 27, 2018 | Subject to change without notice 1800 2000 K Factor vs. Frequency 5 Temp.=+25°C 2 1 0 0 5 600 Frequency (MHz) 0.2 4 400 K Factor Noise Figure (dB) 900 MHz 3 -20 Board losses de-embeded 35 OIP3 (dBm) 1000 Noise Figure vs. Frequency 1 Temp.=+25°C 2 -15 Frequency (MHz) OIP3 vs. Pout/tone 30 -10 -25 400 Frequency (MHz) 40 -5 400 600 800 1000 1200 1400 Frequency (MHz) 7 of 12 1600 1800 2000 0 2 4 6 8 10 12 14 16 18 20 Frequency (MHz) www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Reference Design – 690-920 MHz Optimized Return Loss The following reference design provides improved input/output return loss in the 690-920 MHz band. This covers the low frequency UL bands. C4 J5 J3 J4 J3 VDD 1 uF R 3 C3 J4 GND L1 C4 C3 J1 C1 100 pF L1 18 nH (0603) J2 C2 U1 J1 R1 R2 RF Input C1 C2 2 7 Q1 6 100 pF 4.3 pF J2 RF Output 1,3,4,5,8 R2 33k  J6 C5 J7 C6 J5 PD R1 10k  Bill of Material Reference Des. L1 C1, C3, C5, C6 C2 C4 R1 R2 R3 Value 18 nH 100 pF 4.3 pF 1.0 uF 10K Ω 33K Ω 0Ω Description IND, 0603, 5%, CAP, 0402, 5%, 50V, NPO/COG CAP, 0402, ± 0.1 pF, 25V, ACCU-P CAP, 0402, 10%, 10V, NPO, X5R RES, 0402, 5%, 1/16W RES, 0402, 5%, 1/16W RES, 0402, 5%, 1/16W Manuf. Coilcraft various AVX various various various various Part Number 0603HP-18NXJL 04023J4R3BBSTR RF Performance Plots Gain vs. Frequency 23 20 19 35 OIP3 (dBm) 21 OIP3 vs. Pout/tone 37 -5 Return Loss (dB) 22 Gain (dB) Return Loss vs. Frequency 0 -10 -15 33 31 680 MHz 720 MHz -20 760 MHz 29 820 MHz Input Return Loss Output Return Loss 18 865 MHz 920 MHz -25 690 736 782 828 874 920 27 690 736 Frequency (MHz) 782 828 874 920 Frequency (MHz) 3 4 5 6 7 Pout/Tone (dBm) Noise Figure vs. Frequency 1 Noise Figure (dB) 0.8 0.6 0.4 0.2 0 690 736 782 828 874 920 Frequency (MHz) Datasheet, November 27, 2018 | Subject to change without notice 8 of 12 www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Reference Design – 860-960 MHz Optimized Return Loss The following reference design provides improved output return loss in the 860-960 MHz band. This is achieved via adjustment of the values of the existing bias inductor and output DC blocking capacitor. Notes: 1. See Evaluation Board PCB Information section for material and stack-up. 2. R3 (0 Ω jumper) is not shown on the schematic and may be replaced with copper trace in the target application layout. 3. All components are of 0402 size unless stated on the schematic. 4. Distance from the right edge of U1 to the left edge of C2 is 115 mils. 5. C1 and C3 are non-critical values. The reactive impedance should be as low as possible at the frequency of operation for optimal performance. 6. R1 and R2 are optional and do not need to be loaded if the shut-down functionality is not needed; i.e. FDD applications. 7. If R1 and R2 are not loaded, the LNA will operate in its standard “ON” state. 8. A through line is included on the evaluation board for board loss measurement and de-embedding. Bill of Material Reference Des. Value Description U1 L1 C1, C3, C5, C6 C2 C4 R1 R2 R3 12 nH 100 pF 4.7 pF 1.0 uF 10K Ω 33K Ω 0Ω PCB, Printed Circuit Board AMP, Ultra-Low Noise, High Linearity IND, 0603, 5%, CHIP CAP, 0402, 5%, 50V, NPO/COG CAP, 0402, ± 0.1 pF, 50V, U-Series CAP, 0402, 10%, 10V, NPO, X5R RES, 0402, 5%, 1/16W RES, 0402, 5%, 1/16W RES, 0402, 5%, 1/16W Manuf. Part Number Qorvo Qorvo various various AVX various various various various 1084122 TQP3M9036 04025U4R7BAT2A RF Performance Plots Gain vs. Frequency 25 Return Loss vs. Frequency 0 Temp.=+25°C 21 19 17 Temp.=+25°C -5 0.8 Noise Figure (dB) |S11| or |S22| (dB) Gain (dB) 23 S22 -10 S11 -15 -20 15 880 900 920 940 960 0.6 0.4 0.2 -25 860 Noise Figure vs. Frequency 1 Temp.=+25°C 0 860 Frequency (MHz) Datasheet, November 27, 2018 | Subject to change without notice 880 900 920 Frequency (MHz) 9 of 12 940 960 860 880 900 920 940 960 Frequency (MHz) www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Pin Configuration and Description Pin 1 Reference Mark NC 1 8 NC RF In 2 7 RF Out NC 3 6 Shut Down NC 4 5 NC Backside Paddle - RF/DC GND Pin No. Label Description 2 RF In 6 Shut Down 7 RF Out / DCBias 1, 3, 4, 5, 8 NC Backside Paddle RF/DC GND RF Input pin. A DC Block is required. A high voltage turns off the device. If the pin is not connected or is less than 1V, then the device will operate under its normal operating condition. RF Output pin. DC bias will also need to be injected through a RF bias choke/inductor for operation. No electrical connection. Provide grounded land pads for PCB mounting integrity. RF/DC ground. Use recommended via pattern to minimize inductance and thermal resistance; see PCB Mounting Pattern for suggested footprint. Evaluation Board PCB Information Qorvo PCB 1084112 Material and Stack-up 1 oz. Cu top layer 0.010" Rogers 4350B 1 oz. Cu inner layer 0.062" ± 0.006" Finished Board Thickness Rogers 4450F 1 oz. Cu inner layer 0.010" Rogers 4350B 1 oz. Cu bottom layer 50 Ω line dimensions: width = .020”, spacing = .032” Datasheet, November 27, 2018 | Subject to change without notice 10 of 12 www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Mechanical Information Package Marking and Dimensions Marking: Part number – 9036 Lot Code – XXXX NOTES: 1. All dimensions are in millimeters. Angles are in degrees. 2. Except where noted, this part outline conforms to JEDEC standard MO-220, Issue E (Variation VGGC) for thermally enhanced plastic very thin fine pitch quad flat no lead package (QFN). 3. Dimension and tolerance formats conform to ASME Y14.4M-1994. 4. The terminal #1 identifier and terminal numbering conform to JESD 95-1 SPP-012. PCB Mounting Pattern NOTES: 1. All dimensions are in millimeters. Angles are in degrees. 2. Use 1 oz. copper minimum for top and bottom layer metal. 3. Vias are required under the backside paddle of this device for proper RF/DC grounding and thermal dissipation. We recommend a 0.35mm (#80/.0135") diameter bit for drilling via holes and a final plated thru diameter of 0.25 mm (0.010”). 4. Ensure good package backside paddle solder attach for reliable operation and best electrical performance. Datasheet, November 27, 2018 | Subject to change without notice 11 of 12 www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA ® Handling Precautions Parameter Rating Standard ESD – Human Body Model (HBM) 1B ESDA / JEDEC JS-001-2012 ESD – Charged Device Model (CDM) C2 JEDEC JESD22-C101F MSL – Moisture Sensitivity Level Level 1 IPC/JEDEC J-STD-020 Caution! ESD-Sensitive Device Solderability Compatible with both lead-free (260°C max. reflow temp.) and tin/lead (245°C max. reflow temp.) soldering processes. Solder profiles available upon request. Contact plating: NiPdAu RoHS Compliance This part is compliant with the 2011/65/EU RoHS directive (Restrictions on the Use of Certain Hazardous Substances in Electrical and Electronic Equipment) as amended by Directive 2015/863/EU. This product also has the following attributes: • • • • • • Lead Free Halogen Free (Chlorine, Bromine) Antimony Free TBBP-A (C15H12Br402) Free PFOS Free SVHC Free Pb Contact Information For the latest specifications, additional product information, worldwide sales and distribution locations: Web: www.qorvo.com Tel: 1-844-890-8163 Email: customer.support@qorvo.com For technical questions and application information: Email: appsupport@qorvo.com Important Notice The information contained herein is believed to be reliable; however, Qorvo makes no warranties regarding the information contained herein and assumes no responsibility or liability whatsoever for the use of the information contained herein. All information contained herein is subject to change without notice. Customers should obtain and verify the latest relevant information before placing orders for Qorvo products. The information contained herein or any use of such information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property rights, whether with regard to such information itself or anything described by such information. THIS INFORMATION DOES NOT CONSTITUTE A WARRANTY WITH RESPECT TO THE PRODUCTS DESCRIBED HEREIN, AND QORVO HEREBY DISCLAIMS ANY AND ALL WARRANTIES WITH RESPECT TO SUCH PRODUCTS WHETHER EXPRESS OR IMPLIED BY LAW, COURSE OF DEALING, COURSE OF PERFORMANCE, USAGE OF TRADE OR OTHERWISE, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Without limiting the generality of the foregoing, Qorvo products are not warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other applications where a failure would reasonably be expected to cause severe personal injury or death. Copyright 2018 © Qorvo, Inc. | Qorvo is a registered trademark of Qorvo, Inc. Datasheet, November 27, 2018 | Subject to change without notice 12 of 12 www.qorvo.com
TQP3M9036 价格&库存

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