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UF3C065030K4S

UF3C065030K4S

  • 厂商:

    ACTIVE-SEMI

  • 封装:

    TO-247-4

  • 描述:

    通孔 N 通道 650 V 85A(Tc) 441W(Tc) TO-247-4

  • 数据手册
  • 价格&库存
UF3C065030K4S 数据手册
650V-27mW SiC Cascode Rev. A, January 2019 DATASHEET Description UF3C065030K4S CASE CASE D (1) United Silicon Carbide's cascode products co-package its highperformance F3 SiC fast JFETs with a cascode optimized MOSFET to produce the only standard gate drive SiC device in the market today. This series exhibits very fast switching using a 4-terminal TO-247package and the best reverse recovery characteristics of any device of similar ratings. These devices are excellent for switching inductive loads, and any application requiring standard gate drive. Features w Typical on-resistance RDS(on),typ of 27mW w Maximum operating temperature of 175°C w Excellent reverse recovery G (4) w Low gate charge w Low intrinsic capacitance w ESD protected, HBM class 2 KS (3) w TO-247-4L package for faster switching, clean gate waveforms S (2) 1 2 34 Typical applications w EV charging Part Number Package Marking UF3C065030K4S TO-247-4L UF3C065030K4S w PV inverters w Switch mode power supplies w Power factor correction modules w Motor drives w Induction heating Datasheet: UF3C065030K4S Rev. A, January 2019 1 Maximum Ratings Parameter Symbol VDS VGS Drain-source voltage Gate-source voltage Continuous drain current 1 ID Pulsed drain current 2 Single pulsed avalanche energy 3 Power dissipation Maximum junction temperature Operating and storage temperature IDM EAS Ptot TJ,max TJ, TSTG Max. lead temperature for soldering, 1/8” from case for 5 seconds TL Test Conditions DC TC = 25°C TC = 100°C TC = 25°C L=15mH, IAS =4A TC = 25°C Value Units 650 -25 to +25 85 62 230 120 441 175 -55 to 175 V V A A A mJ W °C °C 250 °C 1. Limited by TJ,max 2. Pulse width tp limited by TJ,max 3. Starting TJ = 25°C Thermal Characteristics Parameter Symbol Thermal resistance, junction-to-case RqJC Datasheet: UF3C065030K4S Test Conditions Rev. A, January 2019 Value Min Typ Max 0.26 0.34 Units °C/W 2 Electrical Characteristics (TJ = +25°C unless otherwise specified) Typical Performance - Static Parameter Drain-source breakdown voltage Total drain leakage current Total gate leakage current Drain-source on-resistance Gate threshold voltage Gate resistance Symbol Test Conditions BVDS VGS=0V, ID=1mA IDSS IGSS RDS(on) VG(th) RG Value Min Typ Max 650 V VDS=650V, VGS=0V, TJ=25°C 6 VDS=650V, VGS=0V, TJ=175°C 30 VDS=0V, TJ=25°C, VGS=-20V / +20V 6 20 VGS=12V, ID=50A, TJ=25°C 27 35 VGS=12V, ID=50A, TJ=175°C VDS=5V, ID=10mA Units 150 mA mA mW 43 4 f=1MHz, open drain 5 4.5 6 V W Typical Performance - Reverse Diode Parameter Diode continuous forward current 1 Diode pulse current 2 Forward voltage Test Conditions IS TC=25°C 85 A IS,pulse TC=25°C 230 A VFSD Reverse recovery charge Qrr Reverse recovery time trr Reverse recovery charge Qrr Reverse recovery time trr Datasheet: UF3C065030K4S Value Symbol Min Typ VGS=0V, IF=20A, TJ=25°C 1.3 VGS=0V, IF=20A, TJ=175°C 1.35 VR=400V, IF=50A, VGS=-5V, RG_EXT=10W di/dt=2650A/ms, TJ=25°C VR=400V, IF=50A, VGS=-5V, RG_EXT=10W di/dt=2650A/ms, TJ=150°C Rev. A, January 2019 Max Units 1.4 V 425 nC 25 ns 280 nC 20 ns 3 Typical Performance - Dynamic Parameter Value Symbol Test Conditions Ciss Coss Crss VDS=100V, VGS=0V f=100kHz 1500 320 2.3 pF Effective output capacitance, energy related Coss(er) VDS=0V to 400V, VGS=0V 230 pF Effective output capacitance, time related Coss(tr) VDS=0V to 400V, VGS=0V 520 pF COSS stored energy Eoss VDS=400V, VGS=0V 18.5 mJ Total gate charge Gate-drain charge Gate-source charge QG QGD QGS VDS=400V, ID=50A, VGS = -5V to 12V 43 11 19 nC Turn-on delay time td(on) Input capacitance Output capacitance Reverse transfer capacitance Rise time Turn-off delay time Fall time tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Turn-on delay time Rise time Turn-off delay time Fall time ETOTAL td(on) tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Datasheet: UF3C065030K4S ETOTAL VDS=400V, ID=50A, Gate Driver =-5V to +12V, Turn-on RG,EXT=8.5W, Turn-off RG,EXT=20W Inductive Load, FWD: same device with VGS = -5V, RG = 10W, TJ=25°C VDS=400V, ID=50A, Gate Driver =-5V to +12V, Turn-on RG,EXT=8.5W, Turn-off RG,EXT=20W Inductive Load, FWD: same device with VGS = -5V, RG = 10W, TJ=150°C Rev. A, January 2019 Min Typ Max Units 25 31 48 ns 12 310 171 mJ 481 22 27 48 ns 10 247 114 mJ 361 4 200 200 150 150 100 Drain Current, ID (A) Drain Current, ID (A) Typical Performance Diagrams Vgs = 15V Vgs = 10V Vgs = 8V Vgs = 7.5V Vgs = 7V Vgs = 6.5V 50 0 Vgs = 15V Vgs = 10V Vgs = 8V Vgs = 7V Vgs = 6.5V 50 0 0 1 2 3 4 5 6 7 8 9 Drain-Source Voltage, VDS (V) 10 Figure 1. Typical output characteristics at TJ = 55°C, tp < 250ms 0 1 2 3 4 5 6 7 8 9 Drain-Source Voltage, VDS (V) 10 Figure 2. Typical output characteristics at TJ = 25°C, tp < 250ms 200 2.0 Vgs = 15V Vgs = 10V Vgs = 8V Vgs = 7V Vgs = 6.5V Vgs = 6V 150 100 On Resistance, RDS_ON (P.U.) Drain Current, ID (A) 100 50 1.5 1.0 0.5 0.0 0 0 1 2 3 4 5 6 7 8 9 Drain-Source Voltage, VDS (V) Figure 3. Typical output characteristics at TJ = 175°C, tp < 250ms Datasheet: UF3C065030K4S -75 -50 -25 0 25 50 75 100 125 150 175 Junction Temperature, TJ (°C) 10 Figure 4. Normalized on-resistance vs. temperature at VGS = 12V and ID = 50A Rev. A, January 2019 5 150 Tj = 175°C Tj = 25°C Tj = - 55°C 80 60 40 20 Tj = 25°C Tj = 175°C 100 75 50 25 0 0 0 25 50 75 100 Drain Current, ID (A) 125 150 Figure 5. Typical drain-source on-resistances at VGS = 12V 0 2 3 4 5 6 7 8 Gate-Source Voltage, VGS (V) 9 10 Gate-Source Voltage, VGS (V) 20 5 4 3 2 1 0 -100 1 Figure 6. Typical transfer characteristics at VDS = 5V 6 Threshold Voltage, Vth (V) Tj = -55°C 125 Drain Current, ID (A) On-Resistance, RDS(on) (mW) 100 15 10 5 0 -5 -50 0 50 100 150 Junction Temperature, TJ (°C) Figure 7. Threshold voltage vs. junction temperature at VDS = 5V and ID = 10mA Datasheet: UF3C065030K4S 0 200 10 20 30 40 Gate Charge, QG (nC) 50 60 Figure 8. Typical gate charge at VDS = 400V and ID = 50A Rev. A, January 2019 6 0 0 Vgs = - 5V Vgs = 0V -25 Vgs = 5V Drain Current, ID (A) Drain Current, ID (A) Vgs = -5V Vgs = 8V -50 -75 -100 Vgs = 0V -25 Vgs = 5V Vgs = 8V -50 -75 -100 -4 -3 -2 -1 Drain-Source Voltage, VDS (V) 0 Figure 9. 3rd quadrant characteristics at TJ = -55°C -4 -3 -2 -1 Drain-Source Voltage, VDS (V) 0 Figure 10. 3rd quadrant characteristics at TJ = 25°C 0 45 35 -25 30 EOSS (mJ) Drain Current, ID (A) 40 -50 Vgs = - 5V -75 25 20 Vgs = 0V 15 Vgs = 5V 10 Vgs = 8V 5 0 -100 -4 -3 -2 -1 Drain-Source Voltage, VDS (V) Figure 11. 3rd quadrant characteristics at TJ = 175°C Datasheet: UF3C065030K4S 0 0 100 200 300 400 500 Drain-Source Voltage, VDS (V) 600 Figure 12. Typical stored energy in COSS at VGS = 0V Rev. A, January 2019 7 10,000 100 DC Drain Current, ID (A) Capacitance, C (pF) Ciss 1,000 Coss 100 10 Crss 80 60 40 20 0 1 0 100 200 300 400 500 Drain-Source Voltage, VDS (V) -75 -50 -25 0 25 50 75 100 125 150 175 Case Temperature, TC (°C) 600 Figure 13. Typical capacitances at f = 100kHz and VGS = 0V Figure 14. DC drain current derating Thermal Impedance, ZqJC (°C/W) Power Dissipation, Ptot (W) 500 400 300 200 100 0 -75 -50 -25 0 25 50 75 100 125 150 175 Case Temperature, TC (°C) Figure 15. Total power dissipation Datasheet: UF3C065030K4S 0.1 0.01 D = 0.5 D = 0.3 D = 0.1 D = 0.05 D = 0.02 D = 0.01 Single Pulse 0.001 1.E-06 1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 Pulse Time, tp (s) Figure 16. Maximum transient thermal impedance Rev. A, January 2019 8 600 Switching Energy (mJ) 100 Drain Current, ID (A) VDD = 400V, VGS = -5V/12V RG_ON = 8.5W, RG_OFF = 20W FWD: same device with VGS = -5V, RG = 10W 1ms 10ms 10 100ms 1ms 1 DC 10ms 500 400 Etot Eon Eoff 300 200 100 0 0.1 1 0 10 100 1000 Drain-Source Voltage, VDS (V) Figure 17. Safe operation area at TC = 25°C, D = 0, Parameter tp 10 20 30 40 Drain Current, ID (A) 50 60 Figure 18. Clamped inductive switching energy vs. drain current at TJ = 25°C 500 400 Turn-Off Energy, EOFF (mJ) Turn-on Energy, EON (mJ) 350 400 300 200 VDD = 400V, VGS = -5V/12V ID = 50A, TJ = 25°C FWD: same device with VGS - 5V, RG = 10W 100 300 250 200 150 VDD = 400V, VGS = -5V/12V ID = 50A, TJ =25°C FWD: same device with VGS = -5V, RG = 10W 100 50 0 0 0 5 10 15 Total External RG, RG,EXT_ON (W) 20 Figure 19. Clamped inductive switching turn-on energy vs. RG,EXT_ON Datasheet: UF3C065030K4S 0 20 40 60 80 Total External RG, RG,EXT_OFF (W) 100 Figure 20. Clamped inductive switching turn-off energy vs. RG,EXT_OFF Rev. A, January 2019 9 450 VGS = -5V/12V, RG_ON = 8.5W, RG_OFF = 20W, FWD: same device with VGS = -5V, RG = 10W 500 400 350 400 300 Qrr (nC) Switching Energy (mJ) 600 300 Etot Eon Eoff 200 100 250 200 VDD = 400V, IS = 50A, di/dt = 2650A/ms, VGS = -5V, RG =10W 150 100 50 0 0 0 25 50 75 100 125 150 Junction Temperature, TJ (°C) 175 Figure 21. Clamped inductive switching energy vs. junction temperature at VDS = 400V and ID = 50A 0 25 50 75 100 125 150 Junction Temperature, TJ (°C) 175 Figure 22. Reverse recovery charge Qrr vs. junction temperature Applications Information SiC cascodes are enhancement-mode power switches formed by a high-voltage SiC depletion-mode JFET and a low-voltage silicon MOSFET connected in series. The silicon MOSFET serves as the control unit while the SiC JFET provides high voltage blocking in the off state. This combination of devices in a single package provides compatibility with standard gate drivers and offers superior performance in terms of low on-resistance (RDS(on)), output capacitance (Coss), gate charge (QG), and reverse recovery charge (Qrr) leading to low conduction and switching losses. The SiC cascodes also provide excellent reverse conduction capability eliminating the need for an external anti-parallel diode. Information on all products and contained herein is intended for description only. No license, express or implied, to any intellectual property rights is granted within this document. United Silicon Carbide, Inc. assumes no liability whatsoever relating to the choice, selection or use of the United Silicon Carbide, Inc. products and services described herein. Like other high performance power switches, proper PCB layout design to minimize circuit parasitics is strongly recommended due to the high dv/dt and di/dt rates. An external gate resistor is recommended when the cascode is working in the diode mode in order to achieve the optimum reverse recovery performance. For more information on cascode operation, see www.unitedsic.com. Disclaimer United Silicon Carbide, Inc. reserves the right to change or modify any of the products and their inherent physical and technical specifications without prior notice. United Silicon Carbide, Inc. assumes no responsibility or liability for any errors or inaccuracies within. Datasheet: UF3C065030K4S Rev. A, January 2019 10
UF3C065030K4S 价格&库存

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UF3C065030K4S
  •  国内价格 香港价格
  • 1+154.242601+18.55870
  • 25+134.0486325+16.12893
  • 100+115.68302100+13.91916
  • 250+106.54250250+12.81936
  • 500+103.25657500+12.42399

库存:1435