UF3C065080K4S

650V-80mW SiC Cascode Rev. A, January 2019 DATASHEET Description UF3C065080K4S CASE CASE D (1) United Silicon Carbide's cascode products co-package its highperformance F3 SiC fast JFETs with a cascode optimized MOSFET to produce the only standard gate drive SiC device in the market today. This series exhibits very fast switching using a 4-terminal TO-247package and the best reverse recovery characteristics of any device of similar ratings. These devices are excellent for switching inductive loads, and any application requiring standard gate drive. Features w Typical on-resistance RDS(on),typ of 80mW w Maximum operating temperature of 175°C w Excellent reverse recovery G (4) w Low gate charge w Low intrinsic capacitance w ESD protected, HBM class 2 KS (3) w TO-247-4L package for faster switching, clean gate waveforms S (2) 1 2 34 Typical applications w EV charging Part Number Package Marking UF3C065080K4S TO-247-4L UF3C065080K4S w PV inverters w Switch mode power supplies w Power factor correction modules w Motor drives w Induction heating Datasheet: UF3C065080K4S Rev. A, January 2019 1 Maximum Ratings Parameter Symbol VDS VGS Drain-source voltage Gate-source voltage Continuous drain current 1 ID Pulsed drain current 2 Single pulsed avalanche energy 3 Power dissipation Maximum junction temperature Operating and storage temperature IDM EAS Ptot TJ,max TJ, TSTG Max. lead temperature for soldering, 1/8” from case for 5 seconds TL Test Conditions DC TC = 25°C TC = 100°C TC = 25°C L=15mH, IAS =2.1A TC = 25°C Value Units 650 -25 to +25 31 23 65 33 190 175 -55 to 175 V V A A A mJ W °C °C 250 °C 1. Limited by TJ,max 2. Pulse width tp limited by TJ,max 3. Starting TJ = 25°C Thermal Characteristics Parameter Symbol Thermal resistance, junction-to-case RqJC Datasheet: UF3C065080K4S Test Conditions Rev. A, January 2019 Value Min Typ Max 0.61 0.79 Units °C/W 2 Electrical Characteristics (TJ = +25°C unless otherwise specified) Typical Performance - Static Parameter Drain-source breakdown voltage Total drain leakage current Total gate leakage current Drain-source on-resistance Gate threshold voltage Gate resistance Symbol Test Conditions BVDS VGS=0V, ID=1mA IDSS IGSS RDS(on) VG(th) RG Value Min Typ Max 650 V VDS=650V, VGS=0V, TJ=25°C 6 VDS=650V, VGS=0V, TJ=175°C 40 VDS=0V, TJ=25°C, VGS=-20V / +20V 6 20 VGS=12V, ID=20A, TJ=25°C 80 100 VGS=12V, ID=20A, TJ=175°C VDS=5V, ID=10mA Units 100 mA mA mW 141 4 f=1MHz, open drain 5 4.5 6 V W Typical Performance - Reverse Diode Parameter Diode continuous forward current 1 Diode pulse current 2 Forward voltage Test Conditions IS TC=25°C 31 A IS,pulse TC=25°C 65 A VFSD Reverse recovery charge Qrr Reverse recovery time trr Reverse recovery charge Qrr Reverse recovery time trr Datasheet: UF3C065080K4S Value Symbol Min Typ VGS=0V, IF=10A, TJ=25°C 1.5 VGS=0V, IF=10A, TJ=175°C 1.75 VR=400V, IF=20A, VGS=-5V, RG_EXT=10W di/dt=2200A/ms, TJ=25°C VR=400V, IF=20A, VGS=-5V, RG_EXT=10W di/dt=2200A/ms, TJ=150°C Rev. A, January 2019 Max Units 2 V 119 nC 16 ns 73 nC 11 ns 3 Typical Performance - Dynamic Parameter Value Symbol Test Conditions Ciss Coss Crss VDS=100V, VGS=0V f=100kHz 1500 104 2.6 pF Effective output capacitance, energy related Coss(er) VDS=0V to 400V, VGS=0V 77 pF Effective output capacitance, time related Coss(tr) VDS=0V to 400V, VGS=0V 176 pF COSS stored energy Eoss VDS=400V, VGS=0V 6.2 mJ Total gate charge Gate-drain charge Gate-source charge QG QGD QGS VDS=400V, ID=20A, VGS = -5V to 12V 43 11 19 nC Turn-on delay time td(on) Input capacitance Output capacitance Reverse transfer capacitance Rise time Turn-off delay time Fall time tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Turn-on delay time Rise time Turn-off delay time Fall time ETOTAL td(on) tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Datasheet: UF3C065080K4S ETOTAL VDS=400V, ID=20A, Gate Driver =-5V to +12V, Turn-on RG,EXT=8.5W, Turn-off RG,EXT=20W Inductive Load, FWD: same device with VGS = -5V, RG = 10W, TJ=25°C VDS=400V, ID=20A, Gate Driver =-5V to +12V, Turn-on RG,EXT=8.5W, Turn-off RG,EXT=20W Inductive Load, FWD: same device with VGS = -5V, RG = 10W, TJ=150°C Rev. A, January 2019 Min Typ Max Units 21 20 37 ns 8 121 41 mJ 162 17 18 36 ns 7 107 31 mJ 138 4 60 60 50 50 Drain Current, ID (A) Drain Current, ID (A) Typical Performance Diagrams 40 30 Vgs = 15V Vgs = 8V Vgs = 7.5V Vgs = 7V Vgs = 6.5V 20 10 30 Vgs = 15V Vgs = 8V 20 Vgs = 7V Vgs = 6.5V 10 0 Vgs = 6V 0 0 1 2 3 4 5 6 7 8 9 Drain-Source Voltage, VDS (V) 10 Figure 1. Typical output characteristics at TJ = 55°C, tp < 250ms 0 1 2 3 4 5 6 7 8 9 Drain-Source Voltage, VDS (V) 10 Figure 2. Typical output characteristics at TJ = 25°C, tp < 250ms 60 2.0 40 30 On Resistance, RDS_ON (P.U.) Vgs = 15V Vgs = 7V Vgs = 6.5V Vgs = 6V Vgs = 5.5V Vgs = 5V 50 Drain Current, ID (A) 40 20 10 1.5 1.0 0.5 0.0 0 0 1 2 3 4 5 6 7 8 9 Drain-Source Voltage, VDS (V) Figure 3. Typical output characteristics at TJ = 175°C, tp < 250ms Datasheet: UF3C065080K4S -75 -50 -25 0 25 50 75 100 125 150 175 Junction Temperature, TJ (°C) 10 Figure 4. Normalized on-resistance vs. temperature at VGS = 12V and ID = 20A Rev. A, January 2019 5 40 Tj = -55°C Tj = 175°C Tj = 25°C Tj = - 55°C 250 200 Drain Current, ID (A) On-Resistance, RDS(on) (mW) 300 150 100 50 Tj = 175°C 20 10 0 0 0 10 20 30 40 Drain Current, ID (A) 50 60 Figure 5. Typical drain-source on-resistances at VGS = 12V 0 2 3 4 5 6 7 8 Gate-Source Voltage, VGS (V) 9 10 Gate-Source Voltage, VGS (V) 20 5 4 3 2 1 0 -100 1 Figure 6. Typical transfer characteristics at VDS = 5V 6 Threshold Voltage, Vth (V) Tj = 25°C 30 15 10 5 0 -5 -50 0 50 100 150 Junction Temperature, TJ (°C) Figure 7. Threshold voltage vs. junction temperature at VDS = 5V and ID = 10mA Datasheet: UF3C065080K4S 0 200 10 20 30 40 Gate Charge, QG (nC) 50 60 Figure 8. Typical gate charge at VDS = 400V and ID = 20A Rev. A, January 2019 6 0 0 Vgs = -5V Vgs = 0V Vgs = 5V -10 Vgs = - 5V -5 Drain Current, ID (A) Drain Current, ID (A) -5 Vgs = 8V -15 -20 -25 Vgs = 0V Vgs = 5V -10 Vgs = 8V -15 -20 -25 -30 -30 -4 -3 -2 -1 Drain-Source Voltage, VDS (V) 0 Figure 9. 3rd quadrant characteristics at TJ = -55°C -4 -3 -2 -1 Drain-Source Voltage, VDS (V) 0 Figure 10. 3rd quadrant characteristics at TJ = 25°C 0 15 10 -10 EOSS (mJ) Drain Current, ID (A) -5 -15 Vgs = - 5V -20 5 Vgs = 0V Vgs = 5V -25 Vgs = 8V 0 -30 -4 -3 -2 -1 Drain-Source Voltage, VDS (V) Figure 11. 3rd quadrant characteristics at TJ = 175°C Datasheet: UF3C065080K4S 0 0 100 200 300 400 500 Drain-Source Voltage, VDS (V) 600 Figure 12. Typical stored energy in COSS at VGS = 0V Rev. A, January 2019 7 10,000 35 DC Drain Current, ID (A) Capacitance, C (pF) Ciss 1,000 Coss 100 10 Crss 30 25 20 15 10 5 0 1 0 100 200 300 400 500 Drain-Source Voltage, VDS (V) -75 -50 -25 0 25 50 75 100 125 150 175 Case Temperature, TC (°C) 600 Figure 13. Typical capacitances at f = 100kHz and VGS = 0V Figure 14. DC drain current derating Thermal Impedance, ZqJC (°C/W) Power Dissipation, Ptot (W) 200 150 100 50 0 -75 -50 -25 0 25 50 75 100 125 150 175 Case Temperature, TC (°C) Figure 15. Total power dissipation Datasheet: UF3C065080K4S 1 0.1 0.01 D = 0.5 D = 0.3 D = 0.1 D = 0.05 D = 0.02 D = 0.01 Single Pulse 0.001 1.E-06 1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 Pulse Time, tp (s) Figure 16. Maximum transient thermal impedance Rev. A, January 2019 8 300 100 VDD = 400V, VGS = -5V/12V RG_ON = 8.5W, RG_OFF = 20W FWD: same device with VGS = -5V, RG = 10W 10 10ms 100ms 1 1ms DC Switching Energy (mJ) Drain Current, ID (A) 1ms 250 200 Etot Eon Eoff 150 100 50 10ms 0 0.1 1 0 10 100 1000 Drain-Source Voltage, VDS (V) Figure 17. Safe operation area at TC = 25°C, D = 0, Parameter tp 5 10 15 20 Drain Current, ID (A) 25 30 Figure 18. Clamped inductive switching energy vs. drain current at TJ = 25°C 200 100 Turn-Off Energy, EOFF (mJ) Turn-on Energy, EON (mJ) 90 150 100 VDD = 400V, VGS = -5V/12V ID = 20A, TJ = 25°C FWD: same device with VGS - 5V, RG = 10W 50 80 70 60 50 40 VDD = 400V, VGS = -5V/12V ID = 20A, TJ =25°C FWD: same device with VGS = -5V, RG = 10W 30 20 10 0 0 0 5 10 15 Total External RG, RG,EXT_ON (W) Figure 19. Clamped inductive switching turn-on energy vs. RG,EXT_ON Datasheet: UF3C065080K4S 0 20 20 40 60 80 Total External RG, RG,EXT_OFF (W) 100 Figure 20. Clamped inductive switching turn-off energy vs. RG,EXT_OFF Rev. A, January 2019 9 140 Etot Eon Eoff 150 120 100 100 VGS = -5V/12V, RG_ON = 8.5W, RG_OFF = 20W, FWD: same device with VGS = -5V, RG = 10W 50 Qrr (nC) Switching Energy (mJ) 200 80 60 VDD = 400V, IS = 20A, di/dt = 2200A/ms, VGS = -5V, RG =10W 40 20 0 0 0 25 50 75 100 125 150 Junction Temperature, TJ (°C) 175 Figure 21. Clamped inductive switching energy vs. junction temperature at VDS = 400V and ID = 20A 0 25 50 75 100 125 150 Junction Temperature, TJ (°C) 175 Figure 22. Reverse recovery charge Qrr vs. junction temperature Applications Information SiC cascodes are enhancement-mode power switches formed by a high-voltage SiC depletion-mode JFET and a low-voltage silicon MOSFET connected in series. The silicon MOSFET serves as the control unit while the SiC JFET provides high voltage blocking in the off state. This combination of devices in a single package provides compatibility with standard gate drivers and offers superior performance in terms of low on-resistance (RDS(on)), output capacitance (Coss), gate charge (QG), and reverse recovery charge (Qrr) leading to low conduction and switching losses. The SiC cascodes also provide excellent reverse conduction capability eliminating the need for an external anti-parallel diode. Information on all products and contained herein is intended for description only. No license, express or implied, to any intellectual property rights is granted within this document. United Silicon Carbide, Inc. assumes no liability whatsoever relating to the choice, selection or use of the United Silicon Carbide, Inc. products and services described herein. Like other high performance power switches, proper PCB layout design to minimize circuit parasitics is strongly recommended due to the high dv/dt and di/dt rates. An external gate resistor is recommended when the cascode is working in the diode mode in order to achieve the optimum reverse recovery performance. For more information on cascode operation, see www.unitedsic.com. Disclaimer United Silicon Carbide, Inc. reserves the right to change or modify any of the products and their inherent physical and technical specifications without prior notice. United Silicon Carbide, Inc. assumes no responsibility or liability for any errors or inaccuracies within. Datasheet: UF3C065080K4S Rev. A, January 2019 10