UF3C170400K3S

1700V-410mW SiC FET Rev. A, January 2020 DATASHEET Description UF3C170400K3S CASE CASE D (2) This SiC FET device is based on a unique ‘cascode’ circuit configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device. The device’s standard gate-drive characteristics allows for a true “drop-in replacement” to Si IGBTs, Si FETs, SiC MOSFETs or Si superjunction devices. Available in the TO-247-3L package, this device exhibits ultralow gate charge and exceptional reverse recovery characteristics, making it ideal for switching inductive loads , and any application requiring standard gate drive. Features w Typical on-resistance RDS(on),typ of 410mW w Maximum operating temperature of 175°C w Excellent reverse recovery G (1) w Low gate charge w Low intrinsic capacitance w ESD protected, HBM class 2 1 2 3 Typical applications S (3) w EV charging Part Number Package Marking UF3C170400K3S TO-247-3L UF3C170400K3S w PV inverters w Switch mode power supplies w Power factor correction modules w Motor drives w Induction heating Datasheet: UF3C170400K3S Rev. A, January 2020 1 Maximum Ratings Parameter Symbol VDS VGS Drain-source voltage Gate-source voltage Continuous drain current 1 ID Pulsed drain current 2 Single pulsed avalanche energy 3 Power dissipation Maximum junction temperature Operating and storage temperature IDM EAS Ptot TJ,max TJ, TSTG Max. lead temperature for soldering, 1/8” from case for 5 seconds TL Test Conditions DC TC = 25°C TC = 100°C TC = 25°C L=15mH, IAS =1.25A TC = 25°C Value Units 1700 -25 to +25 7.6 5.9 14 11.7 100 175 -55 to 175 V V A A A mJ W °C °C 250 °C 1. Limited by TJ,max 2. Pulse width tp limited by TJ,max 3. Starting TJ = 25°C Thermal Characteristics Parameter Thermal resistance, junction-to-case Datasheet: UF3C170400K3S Symbol Test Conditions RqJC Rev. A, January 2020 Value Min Typ Max 1.2 1.5 Units °C/W 2 Electrical Characteristics (TJ = +25°C unless otherwise specified) Typical Performance - Static Parameter Drain-source breakdown voltage Total drain leakage current Total gate leakage current Drain-source on-resistance Gate threshold voltage Gate resistance Symbol Test Conditions BVDS VGS=0V, ID=1mA IDSS IGSS RDS(on) VG(th) RG Value Min Typ Max 1700 V VDS=1700V, VGS=0V, TJ=25°C 1.5 VDS=1700V, VGS=0V, TJ=175°C 5.5 VDS=0V, TJ=25°C, VGS=-20V / +20V 6 20 VGS=12V, ID=5A, TJ=25°C 410 515 VGS=12V, ID=5A, TJ=175°C VDS=5V, ID=10mA Units 60 mA mA mW 1070 3 f=1MHz, open drain 4.7 4.1 6 V W Typical Performance - Reverse Diode Parameter Diode continuous forward current 1 Diode pulse current 2 Forward voltage Test Conditions IS TC=25°C 7.6 A IS,pulse TC=25°C 14 A VFSD Reverse recovery charge Qrr Reverse recovery time trr Reverse recovery charge Qrr Reverse recovery time trr Datasheet: UF3C170400K3S Value Symbol Min Typ VGS=0V, IF=2A, TJ=25°C 1.5 VGS=0V, IF=2A, TJ=175°C 2.4 VR=1200V, IF=5A, VGS=-5V, RG_EXT=10W di/dt=4000A/ms, TJ=25°C VR=1200V, IF=5A, VGS=-5V, RG_EXT=10W di/dt=4000A/ms, TJ=150°C Rev. A, January 2020 Max Units 1.75 V 70 nC 29 ns 67 nC 27 ns 3 Typical Performance - Dynamic Parameter Value Symbol Test Conditions Ciss Coss Crss VDS=100V, VGS=0V f=100kHz 740 27 2 pF Effective output capacitance, energy related Coss(er) VDS=0V to 1200V, VGS=0V 15.5 pF Effective output capacitance, time related Coss(tr) VDS=0V to 1200V, VGS=0V 28 pF COSS stored energy Eoss VDS=1200V, VGS=0V 11.2 mJ Total gate charge Gate-drain charge Gate-source charge QG QGD QGS VDS=1200V, ID=5A, VGS = -5V to 15V 27.5 6.5 10 nC Turn-on delay time td(on) Input capacitance Output capacitance Reverse transfer capacitance Rise time Turn-off delay time Fall time tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Turn-on delay time Rise time Turn-off delay time Fall time ETOTAL td(on) tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Datasheet: UF3C170400K3S ETOTAL VDS=1200V, ID=5A, Gate Driver =-5V to +15V, Turn-on RG,EXT=1W, Turn-off RG,EXT=22W Inductive Load, FWD: same device with VGS = -5V and RG = 10W, TJ=25°C VDS=1200V, ID=5A, Gate Driver =-5V to +15V, Turn-on RG,EXT=1W, Turn-off RG,EXT=22W Inductive Load, FWD: same device with VGS = -5V and RG = 10W, TJ=150°C Rev. A, January 2020 Min Typ Max Units 17 13 34 ns 27 189 43 mJ 232 17 11 35 ns 28 158 50 mJ 208 4 10 10 9 9 8 8 Drain Current, ID (A) Drain Current, ID (A) Typical Performance Diagrams 7 6 5 Vgs = 15V 4 Vgs = 8V 3 Vgs = 6.5V 2 Vgs = 6V 1 Vgs = 5.5V 7 6 0 Vgs = 15V 4 Vgs = 8V 3 Vgs = 6V 2 Vgs = 5.5V 1 Vgs = 5V 0 0 1 2 3 4 5 6 7 8 Drain-Source Voltage, VDS (V) 9 10 Figure 1. Typical output characteristics at TJ = - 55°C, tp < 250ms 10 7 6 5 1 2 3 4 5 6 7 8 9 Drain-Source Voltage, VDS (V) 10 Figure 2. Typical output characteristics at TJ = 25°C, tp < 250ms On Resistance, RDS_ON (P.U.) 8 0 3.0 Vgs = 15V Vgs = 8V Vgs = 6V Vgs = 5.5V Vgs = 5V Vgs = 4.5V 9 Drain Current, ID (A) 5 4 3 2 2.5 2.0 1.5 1.0 0.5 1 0.0 0 0 1 2 3 4 5 6 7 8 Drain-Source Voltage, VDS (V) 9 Figure 3. Typical output characteristics at TJ = 175°C, tp < 250ms Datasheet: UF3C170400K3S -75 -50 -25 0 25 50 75 100 125 150 175 Junction Temperature, TJ (°C) 10 Figure 4. Normalized on-resistance vs. temperature at VGS = 12V and ID = 5A Rev. A, January 2020 5 10 Tj = -55°C 1250 1000 Tj = 175°C Tj = 25°C Tj = - 55°C 750 500 Tj = 175°C 6 4 2 250 0 0 0 2 4 6 Drain Current, ID (A) 8 10 Figure 5. Typical drain-source on-resistances at VGS = 12V 0 2 3 4 5 6 7 8 Gate-Source Voltage, VGS (V) 9 10 20 Gate-Source Voltage, VGS (V) Threshold Voltage, Vth (V) 1 Figure 6. Typical transfer characteristics at VDS = 5V 6 5 4 3 2 1 0 -100 Tj = 25°C 8 Drain Current, ID (A) On-Resistance, RDS(on) (mW) 1500 15 10 5 0 -5 -50 0 50 100 150 Junction Temperature, TJ (°C) Figure 7. Threshold voltage vs. junction temperature at VDS = 5V and ID = 10mA Datasheet: UF3C170400K3S 0 200 5 10 15 20 25 30 Gate Charge, QG (nC) 35 40 Figure 8. Typical gate charge at VDS = 1200V and ID = 5A Rev. A, January 2020 6 0 0 Vgs = -5V Vgs = 0V Vgs = 5V -2 Vgs = 8V -3 -4 -5 Vgs = 0V Vgs = 5V -2 Vgs = 8V -3 -4 -5 -6 -6 -4 -3 -2 -1 Drain-Source Voltage, VDS (V) 0 Figure 9. 3rd quadrant characteristics at TJ = -55°C -4 -3 -2 -1 Drain-Source Voltage, VDS (V) 0 Figure 10. 3rd quadrant characteristics at TJ = 25°C 0 25 -1 20 -2 -3 EOSS (mJ) Drain Current, ID (A) Vgs = - 5V -1 Drain Current, ID (A) Drain Current, ID (A) -1 Vgs = - 5V Vgs = 0V -4 15 10 Vgs = 5V -5 5 Vgs = 8V 0 -6 -4 -3 -2 -1 Drain-Source Voltage, VDS (V) Figure 11. 3rd quadrant characteristics at TJ = 175°C Datasheet: UF3C170400K3S 0 0 300 600 900 1200 1500 Drain-Source Voltage, VDS (V) 1800 Figure 12. Typical stored energy in COSS at VGS = 0V Rev. A, January 2020 7 8 DC Drain Current, ID (A) Capacitance, C (pF) 7 Ciss 1,000 100 Coss 10 6 5 4 3 2 Crss 1 0 1 0 -75 -50 -25 0 25 50 75 100 125 150 175 Case Temperature, TC (°C) 300 600 900 1200 1500 1800 Drain-Source Voltage, VDS (V) Figure 13. Typical capacitances at f = 100kHz and VGS = 0V Figure 14. DC drain current derating Thermal Impedance, ZqJC (°C/W) Power Dissipation, Ptot (W) 120 100 80 60 40 20 0 -75 -50 -25 0 25 50 75 100 125 150 175 Case Temperature, TC (°C) Figure 15. Total power dissipation Datasheet: UF3C170400K3S 1 0.1 0.01 D = 0.5 D = 0.3 D = 0.1 D = 0.05 D = 0.02 D = 0.01 Single Pulse 0.001 1.E-06 1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 Pulse Time, tp (s) Figure 16. Maximum transient thermal impedance Rev. A, January 2020 8 300 Switching Energy (mJ) Drain Current, ID (A) 10 10ms 1 100ms 1ms 0.1 DC 200 150 VDS = 1200V, VGS = -5V/15V RG_ON = 1W, RG_OFF = 22W FWD: same device with VGS = -5V, RG = 10W 100 10ms 50 0 0.01 1 0 10 100 1000 Drain-Source Voltage, VDS (V) Figure 17. Safe operation area at TC = 25°C, D = 0, Parameter tp 250 50 200 40 150 100 VDS = 1200V, VGS = -5V/15V ID = 5A, TJ = 25°C FWD: same device with VGS = - 5V, RG = 10W 50 2 4 Drain Current, ID (A) 6 8 Figure 18. Clamped inductive switching energy vs. drain current at TJ = 25°C Turn-Off Energy, EOFF (mJ) Turn-on Energy, EON (mJ) Etot Eon Eoff 250 30 20 VDS = 1200V, VGS = -5V/15V ID = 5A, TJ =25°C FWD: same device with VGS = -5V, RG = 10W 10 0 0 0 5 10 15 20 Total External RG, RG,EXT_ON (W) 25 Figure 19. Clamped inductive switching turn-on energy vs. RG,EXT_ON Datasheet: UF3C170400K3S 0 30 20 40 60 80 100 Total External RG, RG,EXT_OFF (W) 120 Figure 20. Clamped inductive switching turn-off energy vs. RG,EXT_OFF Rev. A, January 2020 9 100 200 80 Etot Eon Eoff 150 100 VGS = -5V/15V, RG_ON = 1W, RG_OFF = 22W, FWD: same device with VGS = -5V, RG = 10W Qrr (nC) Switching Energy (mJ) 250 50 60 40 VDS = 1200V, IS = 5A, di/dt = 4000A/ms, VGS = -5V, RG =10W 20 0 0 0 25 50 75 100 125 150 Junction Temperature, TJ (°C) 175 Figure 21. Clamped inductive switching energy vs. junction temperature at VDS = 1200V and ID = 5A 0 25 50 75 100 125 150 Junction Temperature, TJ (°C) 175 Figure 22. Reverse recovery charge Qrr vs. junction temperature Applications Information SiC FETs are enhancement-mode power switches formed by a highvoltage SiC depletion-mode JFET and a low-voltage silicon MOSFET connected in series. The silicon MOSFET serves as the control unit while the SiC JFET provides high voltage blocking in the off state. This combination of devices in a single package provides compatibility with standard gate drivers and offers superior performance in terms of low on-resistance (RDS(on)), output capacitance (Coss), gate charge (QG), and reverse recovery charge (Qrr) leading to low conduction and switching losses. The SiC FETs also provide excellent reverse conduction capability eliminating the need for an external anti-parallel diode. Information on all products and contained herein is intended for description only. No license, express or implied, to any intellectual property rights is granted within this document. UnitedSiC assumes no liability whatsoever relating to the choice, selection or use of the UnitedSiC products and services described herein. Like other high performance power switches, proper PCB layout design to minimize circuit parasitics is strongly recommended due to the high dv/dt and di/dt rates. An external gate resistor is recommended when the FET is working in the diode mode in order to achieve the optimum reverse recovery performance. For more information on SiC FET operation, see www.unitedsic.com. Disclaimer UnitedSiC reserves the right to change or modify any of the products and their inherent physical and technical specifications without prior notice. UnitedSiC assumes no responsibility or liability for any errors or inaccuracies within. Datasheet: UF3C170400K3S Rev. A, January 2020 10