UF3SC120009K4S

1200V-8.6mW SiC FET Rev. B, December 2019 DATASHEET Description UF3SC120009K4S CASE CASE D (1) This SiC FET device is based on a unique ‘cascode’ circuit configuration, in which a normally-on SiC JFET is co-packaged with a Si MOSFET to produce a normally-off SiC FET device. The device’s standard gate-drive characteristics allows for a true “drop-in replacement” to Si IGBTs, Si FETs, SiC MOSFETs or Si superjunction devices. Available in the TO-247-4L package, this device exhibits ultralow gate charge and exceptional reverse recovery characteristics, making it ideal for switching inductive loads , and any application requiring standard gate drive. Features w Typical on-resistance RDS(on),typ of 8.6mW w Maximum operating temperature of 175°C G (4) w Excellent reverse recovery w Low gate charge KS (3) w Low intrinsic capacitance S (2) 1 2 34 w ESD protected, HBM class 2 w TO-247-4L package for faster switching, clean gate waveforms Typical applications Part Number Package Marking w EV charging UF3SC120009K4S TO-247-4L UF3SC120009K4S w PV inverters w Switch mode power supplies w Power factor correction modules w Motor drives w Induction heating Datasheet: UF3SC120009K4S Rev. B, December 2019 1 Maximum Ratings Parameter Drain-source voltage Gate-source voltage Continuous drain current 1 Pulsed drain current 2 Single pulsed avalanche energy 3 Power dissipation Maximum junction temperature Symbol Test Conditions Value Units VDS VGS ID IDM EAS Ptot TJ,max DC TC < 110°C TC = 25°C L=15mH, IAS =8.6A TC = 25°C 1200 -20 to +20 120 550 555 789 175 V V A A mJ W °C -55 to 175 °C TJ, TSTG Operating and storage temperature 1. Limited by bondwires 2. Pulse width tp limited by TJ,max 3. Starting TJ = 25°C Thermal Characteristics Parameter Thermal resistance, junction-to-case Datasheet: UF3SC120009K4S Symbol Test Conditions RqJC Rev. B, December 2019 Value Min Typ Max 0.15 0.19 Units °C/W 2 Electrical Characteristics (TJ = +25°C unless otherwise specified) Typical Performance - Static Parameter Drain-source breakdown voltage Total drain leakage current Total gate leakage current Drain-source on-resistance Gate threshold voltage Gate resistance Symbol Test Conditions BVDS VGS=0V, ID=1mA IDSS IGSS RDS(on) VG(th) RG Value Min Typ Max 1200 V VDS=1200V, VGS=0V, TJ=25°C 6 VDS=1200V, VGS=0V, TJ=175°C 65 VDS=0V, TJ=25°C, VGS=-20V / +20V 5 20 VGS=12V, ID=100A, TJ=25°C 8.6 11 VGS=12V, ID=100A, TJ=125°C VGS=12V, ID=100A, TJ=175°C VDS=5V, ID=10mA Units 600 mA mA mW 13.5 18.2 4 f=1MHz, open drain 4.7 0.8 6 1.5 V W Typical Performance - Reverse Diode Parameter Diode continuous forward current 1 Diode pulse current 2 Forward voltage Test Conditions IS TC < 110°C 120 A IS,pulse TC=25°C 550 A VFSD Reverse recovery charge Qrr Reverse recovery time trr Reverse recovery charge Qrr Reverse recovery time trr Datasheet: UF3SC120009K4S Value Symbol Min Typ VGS=0V, IF=100A, TJ=25°C 1.65 VGS=0V, IF=100A, TJ=175°C 2.4 VR=800V, IF=100A, VGS=-5V, RG_EXT=22W di/dt=3700A/ms, TJ=25°C VR=800V, IF=100A, VGS=-5V, RG_EXT=22W di/dt=3700A/ms, TJ=150°C Rev. B, December 2019 Max Units 2 V 1373 nC 60 ns 1275 nC 60 ns 3 Typical Performance - Dynamic Parameter Value Symbol Test Conditions Ciss Coss Crss VDS=100V, VGS=0V f=100kHz 8512 755 9 pF Effective output capacitance, energy related Coss(er) VDS=0V to 800V, VGS=0V 395 pF Effective output capacitance, time related Coss(tr) VDS=0V to 800V, VGS=0V 870 pF COSS stored energy Eoss VDS=800V, VGS=0V 128 mJ Total gate charge Gate-drain charge Gate-source charge QG QGD QGS VDS=800V, ID=100A, VGS = -5V to 15V 234 40 96 nC Turn-on delay time td(on) Input capacitance Output capacitance Reverse transfer capacitance Rise time Turn-off delay time Fall time tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Turn-on delay time Rise time Turn-off delay time Fall time ETOTAL td(on) tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Datasheet: UF3SC120009K4S ETOTAL VDS=800V, ID=100A, Gate Driver =-5V to +15V, Turn-on RG,EXT=1.5W, Turn-off RG,EXT=5W Inductive Load, FWD: same device with VGS = -5V, RG = 5W, TJ=25°C VDS=800V, ID=100A, Gate Driver =-5V to +15V, Turn-on RG,EXT=1.5W, Turn-off RG,EXT=5W Inductive Load, FWD: same device with VGS = -5V, RG = 5W, TJ=150°C Rev. B, December 2019 Min Typ Max Units 32 58 113 ns 16 3463 722 mJ 4185 28 66 126 ns 16 3539 700 mJ 4239 4 Typical Performance - Dynamic (continued) Parameter Turn-on delay time Rise time Turn-off delay time Fall time Symbol td(on) tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Turn-on delay time Rise time Turn-off delay time Fall time ETOTAL td(on) tr td(off) tf Turn-on energy EON Turn-off energy EOFF Total switching energy Datasheet: UF3SC120009K4S ETOTAL Test Conditions VDS=800V, ID=100A, Gate Driver =-5V to +15V, Turn-on RG,EXT=1.5W, Turn-off RG,EXT=5W Inductive Load, FWD: UJ3D1250K, TJ=25°C VDS=800V, ID=100A, Gate Driver =-5V to +15V, Turn-on RG,EXT=1.5W, Turn-off RG,EXT=5W Inductive Load, FWD: UJ3D1250K, TJ=150°C Rev. B, December 2019 Value Min Typ Max Units 33 50 113 ns 15 1895 680 mJ 2575 33 52 127 ns 15 1989 595 mJ 2584 5 300 300 250 250 200 Drain Current, ID (A) Drain Current, ID (A) Typical Performance Diagrams Vgs = 15V Vgs = 8V Vgs = 7V Vgs = 6.75V Vgs = 6.5V Vgs = 6.25V 150 100 50 Vgs = 15V Vgs = 10V 150 Vgs = 8V Vgs = 7V 100 Vgs = 6.5V Vgs = 6V 50 0 0 0 1 2 3 4 5 6 7 8 Drain-Source Voltage, VDS (V) 9 10 Figure 1. Typical output characteristics at TJ = - 55°C, tp < 250ms 0 1 2 3 4 5 6 7 8 9 Drain-Source Voltage, VDS (V) 10 Figure 2. Typical output characteristics at TJ = 25°C, tp < 250ms 2.5 On Resistance, RDS_ON (P.U.) 300 250 Drain Current, ID (A) 200 200 150 Vgs = 15V Vgs = 8V Vgs = 7V Vgs = 6.5V Vgs = 6V Vgs = 5.5V 100 50 2.0 1.5 1.0 0.5 0.0 0 0 1 2 3 4 5 6 7 8 Drain-Source Voltage, VDS (V) 9 Figure 3. Typical output characteristics at TJ = 175°C, tp < 250ms Datasheet: UF3SC120009K4S -75 -50 -25 0 25 50 75 100 125 150 175 Junction Temperature, TJ (°C) 10 Figure 4. Normalized on-resistance vs. temperature at VGS = 12V and ID = 100A Rev. B, December 2019 6 250 Tj = 175°C Tj = 25°C Tj = - 55°C 25 Tj = -55°C 20 15 10 5 Tj = 175°C 150 100 50 0 0 0 50 100 150 200 Drain Current, ID (A) 250 300 Figure 5. Typical drain-source on-resistances at VGS = 12V 0 2 3 4 5 6 7 8 Gate-Source Voltage, VGS (V) 9 10 Gate-Source Voltage, VGS (V) 25 5 4 3 2 1 0 -100 1 Figure 6. Typical transfer characteristics at VDS = 5V 6 Threshold Voltage, Vth (V) Tj = 25°C 200 Drain Current, ID (A) On-Resistance, RDS(on) (mW) 30 20 15 10 5 0 -5 -50 0 50 100 150 Junction Temperature, TJ (°C) Figure 7. Threshold voltage vs. junction temperature at VDS = 5V and ID = 10mA Datasheet: UF3SC120009K4S 0 200 50 100 150 200 Gate Charge, QG (nC) 250 300 Figure 8. Typical gate charge at VDS = 800V and ID = 100A Rev. B, December 2019 7 0 0 Vgs = - 5V Vgs = 0V -50 Drain Current, ID (A) Drain Current, ID (A) Vgs = -5V Vgs = 5V Vgs = 8V -100 Vgs = 0V -50 Vgs = 5V Vgs = 8V -100 -150 -150 -200 -200 -4 -3 -2 -1 Drain-Source Voltage, VDS (V) 0 Figure 9. 3rd quadrant characteristics at TJ = -55°C -4 -3 -2 -1 Drain-Source Voltage, VDS (V) 0 Figure 10. 3rd quadrant characteristics at TJ = 25°C 0 300 -50 200 EOSS (mJ) Drain Current, ID (A) 250 -100 Vgs = - 5V 100 Vgs = 0V -150 150 Vgs = 5V 50 Vgs = 8V 0 -200 -4 -3 -2 -1 Drain-Source Voltage, VDS (V) Figure 11. 3rd quadrant characteristics at TJ = 175°C Datasheet: UF3SC120009K4S 0 0 200 400 600 800 1000 Drain-Source Voltage, VDS (V) 1200 Figure 12. Typical stored energy in COSS at VGS = 0V Rev. B, December 2019 8 1.E+05 140 Capacitance, C (pF) 1.E+03 DC Drain Current, ID (A) Ciss 1.E+04 Coss 1.E+02 1.E+01 Crss 120 100 80 60 40 20 0 1.E+00 0 -75 -50 -25 0 25 50 75 100 125 150 175 Case Temperature, TC (°C) 200 400 600 800 1000 1200 Drain-Source Voltage, VDS (V) Figure 13. Typical capacitances at f = 100kHz and VGS = 0V Figure 14. DC drain current derating 1.E+00 800 Thermal Impedance, ZqJC (°C/W) Power Dissipation, Ptot (W) 900 700 600 500 400 300 200 100 0 1.E-01 D = 0.5 D = 0.3 D = 0.1 D = 0.05 D = 0.02 D = 0.01 Single Pulse 1.E-02 1.E-03 1.E-04 1.E-06 1.E-05 1.E-04 1.E-03 1.E-02 1.E-01 1.E+00 -75 -50 -25 0 25 50 75 100 125 150 175 Case Temperature, TC (°C) Figure 15. Total power dissipation Datasheet: UF3SC120009K4S Pulse Time, tp (s) Figure 16. Maximum transient thermal impedance Rev. B, December 2019 9 6000 1ms Drain Current, ID (A) 100 10ms 10 100ms 1ms 10ms DC 1 Switching Energy (mJ) 1000 5000 4000 3000 Etot Eon Eoff 2000 1000 0 0.1 1 0 10 100 1000 Drain-Source Voltage, VDS (V) Figure 17. Safe operation area at TC = 25°C, D = 0, Parameter tp 25 50 75 100 Drain Current, ID (A) 125 150 Figure 18. Clamped inductive switching energy vs. drain current at TJ = 25°C 6000 2500 5000 Turn-Off Energy, EOFF (mJ) Turn-on Energy, EON (mJ) VDS = 800V, VGS = -5V/15V RG_ON = 1.5W, RG_OFF = 5W FWD: same device with VGS = -5V, RG = 5W 4000 3000 VDS = 800V, VGS = -5V/15V ID = 100A, TJ = 25°C FWD: same device with VGS = - 5V, RG = 5W 2000 1000 2000 1500 1000 VDS = 800V, VGS = -5V/15V ID = 100A, TJ =25°C, FWD: same device with VGS = -5V, RG = 5W 500 0 0 0 5 10 15 Total External RG, RG,EXT_ON (W) Figure 19. Clamped inductive switching turn-on energy vs. RG,EXT_ON Datasheet: UF3SC120009K4S 0 20 10 20 30 40 Total External RG, RG,EXT_OFF (W) 50 Figure 20. Clamped inductive switching turn-off energy vs. RG,EXT_OFF Rev. B, December 2019 10 1600 5000 1200 Etot Eon Eoff 3000 2000 Qrr (nC) Switching Energy (mJ) 1400 4000 VGS = -5V/15V, RG_ON = 1.5W, RG_OFF = 5W, FWD: same device with VGS = -5V, RG = 5W 1000 1000 800 VDS = 800V, IS = 100A, di/dt = 3700A/ms, VGS = -5V, RG =22W 600 400 200 0 0 0 25 50 75 100 125 150 Junction Temperature, TJ (°C) 175 Figure 21. Clamped inductive switching energy vs. junction temperature at VDS = 800V and ID = 100A 0 50 75 100 125 150 Junction Temperature, TJ (°C) 175 Figure 22. Reverse recovery charge Qrr vs. junction temperature 3500 3000 VDS = 800V, VGS = -5V/15V RG_ON = 1.5W, RG_OFF = 5W FWD: UJ3D1250K 3000 2500 Switching Energy (mJ) Switching Energy (mJ) 25 Etot Eon Eoff 2000 1500 1000 2500 2000 Etot Eon Eoff 1500 1000 VGS = -5V/15V, RG_ON = 1.5W, RG_OFF = 5W, FWD: UJ3D1250K 500 500 0 0 20 40 60 80 Drain Current, ID (A) 100 Figure 23. Clamped inductive switching energy vs. drain current at TJ = 25°C Datasheet: UF3SC120009K4S 0 120 0 25 50 75 100 125 150 Junction Temperature, TJ (°C) 175 Figure 24. Clamped inductive switching energy vs. junction temperature at VDS = 800V and ID = 100A Rev. B, December 2019 11 Applications Information SiC FETs are enhancement-mode power switches formed by a highvoltage SiC depletion-mode JFET and a low-voltage silicon MOSFET connected in series. The silicon MOSFET serves as the control unit while the SiC JFET provides high voltage blocking in the off state. This combination of devices in a single package provides compatibility with standard gate drivers and offers superior performance in terms of low on-resistance (RDS(on)), output capacitance (Coss), gate charge (QG), and reverse recovery charge (Qrr) leading to low conduction and switching losses. The SiC FETs also provide excellent reverse conduction capability eliminating the need for an external anti-parallel diode. Information on all products and contained herein is intended for description only. No license, express or implied, to any intellectual property rights is granted within this document. UnitedSiC assumes no liability whatsoever relating to the choice, selection or use of the UnitedSiC products and services described herein. Like other high performance power switches, proper PCB layout design to minimize circuit parasitics is strongly recommended due to the high dv/dt and di/dt rates. An external gate resistor is recommended when the FET is working in the diode mode in order to achieve the optimum reverse recovery performance. For more information on SiC FET operation, see www.unitedsic.com. Disclaimer UnitedSiC reserves the right to change or modify any of the products and their inherent physical and technical specifications without prior notice. UnitedSiC assumes no responsibility or liability for any errors or inaccuracies within. Datasheet: UF3SC120009K4S Rev. B, December 2019 12