123585-HMC859LC3

HMC859LC3 v00.0910 HIGH SPEED LOGIC - SMT 3 26 GHz, DIVIDE-BY-8 WITH RESET & PROGRAMMABLE OUTPUT VOLTAGE Typical Applications Features The HMC859LC3 is ideal for: Supports Clock Frequencies up to 26 GHz • High Speed Frequency Divider (up to 26 GHz) Differential or Single-Ended Operation • Clock Synthesis Fast Rise and Fall Times: 19 / 17 ps • Phase Locked Loops Low Power Consumption: 320 mW typ. • Broadband Test & Measurement Programmable Differential Output Voltage Swing: 800 - 1900 mVp-p Propagation Delay: 146 ps Single Supply: -3.3 V 16 Lead Ceramic 3x3 mm SMT Package: 9 mm2 Functional Diagram General Description The HMC859LC3 is a Divide-by-8 w/Reset designed to support clock frequencies as high as 26 GHz. During normal operation, with the reset pin not asserted, the output toggles from its prior state on the positive edge of the clock. Asserting the reset pin forces the Q output low regardless of the clock edge state (asynchronous reset assertion). Reversing the clock inputs allows for negative-edge triggered applications. All differential inputs to the HMC859LC3 are CML and terminated on-chip with 50 Ohms to the positive supply, GND, and may be DC or AC coupled. Outputs can be connected directly to a 50 Ohm ground-terminated system or drive devices with CML logic input. the HMC859LC3 also features an ouput level control pin, VR, which allows for loss compensation or signal level optimization. The HMC859LC3 operates from a single -3.3 V supply and is available in ROHS-compliant 3x3 mm SMT package. Electrical Specifications, TA = +25 ºC Vee = -3.3 V, VR = 0 V Parameter Conditions Power Supply Voltage Min. Typ. Max -3.6 -3.3 -3.0 Power Supply Current 97 Maximum Clock Rate V mA 26 GHz Input Voltage Range -1.5 0.5 V Input Differential Range 0.1 2.0 Vp-p Input Return Loss Output Amplitude 3-1 Units Frequency